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19b85c08 TP |
1 | /* |
2 | * Device Tree file for OpenBlocks AX3-4 board | |
3 | * | |
4 | * Copyright (C) 2012 Marvell | |
5 | * | |
6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | /dts-v1/; | |
29e74f8b | 14 | #include <dt-bindings/gpio/gpio.h> |
38149887 | 15 | #include "armada-xp-mv78260.dtsi" |
19b85c08 TP |
16 | |
17 | / { | |
18 | model = "PlatHome OpenBlocks AX3-4 board"; | |
19 | compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; | |
20 | ||
21 | chosen { | |
22 | bootargs = "console=ttyS0,115200 earlyprintk"; | |
23 | }; | |
24 | ||
25 | memory { | |
26 | device_type = "memory"; | |
74898364 | 27 | reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ |
19b85c08 TP |
28 | }; |
29 | ||
30 | soc { | |
0cd3754a | 31 | ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 |
de1af8d4 EG |
32 | MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 |
33 | MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>; | |
34 | ||
35 | devbus-bootcs { | |
36 | status = "okay"; | |
37 | ||
38 | /* Device Bus parameters are required */ | |
39 | ||
40 | /* Read parameters */ | |
41 | devbus,bus-width = <8>; | |
42 | devbus,turn-off-ps = <60000>; | |
43 | devbus,badr-skew-ps = <0>; | |
44 | devbus,acc-first-ps = <124000>; | |
45 | devbus,acc-next-ps = <248000>; | |
46 | devbus,rd-setup-ps = <0>; | |
47 | devbus,rd-hold-ps = <0>; | |
48 | ||
49 | /* Write parameters */ | |
50 | devbus,sync-enable = <0>; | |
51 | devbus,wr-high-ps = <60000>; | |
52 | devbus,wr-low-ps = <60000>; | |
53 | devbus,ale-wr-ps = <60000>; | |
54 | ||
55 | /* NOR 128 MiB */ | |
56 | nor@0 { | |
57 | compatible = "cfi-flash"; | |
58 | reg = <0 0x8000000>; | |
59 | bank-width = <2>; | |
60 | }; | |
61 | }; | |
00ed4a0b | 62 | |
14fd8ed0 EG |
63 | pcie-controller { |
64 | status = "okay"; | |
65 | /* Internal mini-PCIe connector */ | |
66 | pcie@1,0 { | |
67 | /* Port 0, Lane 0 */ | |
68 | status = "okay"; | |
69 | }; | |
70 | }; | |
71 | ||
467f54b2 GC |
72 | internal-regs { |
73 | serial@12000 { | |
74 | clock-frequency = <250000000>; | |
75 | status = "okay"; | |
19b85c08 | 76 | }; |
467f54b2 GC |
77 | serial@12100 { |
78 | clock-frequency = <250000000>; | |
79 | status = "okay"; | |
19b85c08 | 80 | }; |
467f54b2 GC |
81 | pinctrl { |
82 | led_pins: led-pins-0 { | |
83 | marvell,pins = "mpp49", "mpp51", "mpp53"; | |
84 | marvell,function = "gpio"; | |
85 | }; | |
19b85c08 | 86 | }; |
467f54b2 GC |
87 | leds { |
88 | compatible = "gpio-leds"; | |
89 | pinctrl-names = "default"; | |
90 | pinctrl-0 = <&led_pins>; | |
91 | ||
92 | red_led { | |
93 | label = "red_led"; | |
29e74f8b | 94 | gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; |
467f54b2 GC |
95 | default-state = "off"; |
96 | }; | |
97 | ||
98 | yellow_led { | |
99 | label = "yellow_led"; | |
29e74f8b | 100 | gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; |
467f54b2 GC |
101 | default-state = "off"; |
102 | }; | |
103 | ||
104 | green_led { | |
105 | label = "green_led"; | |
29e74f8b | 106 | gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; |
dcdf14c7 | 107 | default-state = "keep"; |
467f54b2 | 108 | }; |
19b85c08 | 109 | }; |
f69c92f4 | 110 | |
467f54b2 GC |
111 | gpio_keys { |
112 | compatible = "gpio-keys"; | |
113 | #address-cells = <1>; | |
114 | #size-cells = <0>; | |
4ca73962 | 115 | |
467f54b2 GC |
116 | button@1 { |
117 | label = "Init Button"; | |
118 | linux,code = <116>; | |
29e74f8b | 119 | gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; |
467f54b2 | 120 | }; |
4ca73962 | 121 | }; |
4ca73962 | 122 | |
467f54b2 GC |
123 | mdio { |
124 | phy0: ethernet-phy@0 { | |
125 | reg = <0>; | |
126 | }; | |
f69c92f4 | 127 | |
467f54b2 GC |
128 | phy1: ethernet-phy@1 { |
129 | reg = <1>; | |
130 | }; | |
f69c92f4 | 131 | |
467f54b2 GC |
132 | phy2: ethernet-phy@2 { |
133 | reg = <2>; | |
134 | }; | |
f69c92f4 | 135 | |
467f54b2 GC |
136 | phy3: ethernet-phy@3 { |
137 | reg = <3>; | |
138 | }; | |
f69c92f4 | 139 | }; |
f69c92f4 | 140 | |
467f54b2 GC |
141 | ethernet@70000 { |
142 | status = "okay"; | |
143 | phy = <&phy0>; | |
144 | phy-mode = "sgmii"; | |
145 | }; | |
146 | ethernet@74000 { | |
147 | status = "okay"; | |
148 | phy = <&phy1>; | |
149 | phy-mode = "sgmii"; | |
150 | }; | |
151 | ethernet@30000 { | |
152 | status = "okay"; | |
153 | phy = <&phy2>; | |
154 | phy-mode = "sgmii"; | |
155 | }; | |
156 | ethernet@34000 { | |
157 | status = "okay"; | |
158 | phy = <&phy3>; | |
159 | phy-mode = "sgmii"; | |
160 | }; | |
161 | i2c@11000 { | |
162 | status = "okay"; | |
163 | clock-frequency = <400000>; | |
164 | }; | |
165 | i2c@11100 { | |
166 | status = "okay"; | |
167 | clock-frequency = <400000>; | |
14bedd4a | 168 | |
467f54b2 GC |
169 | s35390a: s35390a@30 { |
170 | compatible = "s35390a"; | |
171 | reg = <0x30>; | |
172 | }; | |
173 | }; | |
174 | sata@a0000 { | |
175 | nr-ports = <2>; | |
176 | status = "okay"; | |
177 | }; | |
8034891b TP |
178 | |
179 | /* Front side USB 0 */ | |
467f54b2 GC |
180 | usb@50000 { |
181 | status = "okay"; | |
182 | }; | |
8034891b TP |
183 | |
184 | /* Front side USB 1 */ | |
467f54b2 GC |
185 | usb@51000 { |
186 | status = "okay"; | |
14bedd4a | 187 | }; |
95999cf0 | 188 | }; |
19b85c08 TP |
189 | }; |
190 | }; |