[deliverable/linux.git] / arch / arm / boot / dts / armada-xp-synology-ds414.dts

/*
 * Device Tree file for Synology DS414
 *
 * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the old 0xd0000000).
 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
 * bootloaders provided by Marvell. It is used in recent versions of
 * DSM software provided by Synology. Nonetheless, some earlier boards
 * were delivered with an older version of u-boot that left internal
 * registers mapped at 0xd0000000. If you have such a device you will
 * not be able to directly boot a kernel based on this Device Tree. In
 * that case, the preferred solution is to update your bootloader (e.g.
 * by upgrading to latest version of DSM, or building a new one and
 * installing it from u-boot prompt) or adjust the Devive Tree
 * (s/0xf1000000/0xd0000000/ in 'ranges' below).
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78230.dtsi"

/ {
	model = "Synology DS414";
	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
		     "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		bootargs = "console=ttyS0,115200 earlyprintk";
		stdout-path = &uart0;
	};

	memory {
		device_type = "memory";
		reg = <0 0x00000000 0 0x40000000>; /* 1GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;

		pcie-controller {
			status = "okay";

			/*
			 * Connected to Marvell 88SX7042 SATA-II controller
			 * handling the four disks.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/*
			 * Connected to EtronTech EJ168A XHCI controller
			 * providing the two rear USB 3.0 ports.
			 */
			pcie@5,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {

			/* RTC is provided by Seiko S-35390A below */
			rtc@10300 {
				status = "disabled";
			};

			spi0: spi@10600 {
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "micron,n25q064";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <20000000>;

					/*
					 * Warning!
					 *
					 * Synology u-boot uses its compiled-in environment
					 * and it seems Synology did not care to change u-boot
					 * default configuration in order to allow saving a
					 * modified environment at a sensible location. So,
					 * if you do a 'saveenv' under u-boot, your modified
					 * environment will be saved at 1MB after the start
					 * of the flash, i.e. in the middle of the uImage.
					 * For that reason, it is strongly advised not to
					 * change the default environment, unless you know
					 * what you are doing.
					 */
					partition@00000000 { /* u-boot */
						label = "RedBoot";
						reg = <0x00000000 0x000d0000>; /* 832KB */
					};

					partition@000c0000 { /* uImage */
						label = "zImage";
						reg = <0x000d0000 0x002d0000>; /* 2880KB */
					};

					partition@003a0000 { /* uInitramfs */
						label = "rd.gz";
						reg = <0x003a0000 0x00430000>; /* 4250KB */
					};

					partition@007d0000 { /* MAC address and serial number */
						label = "vendor";
						reg = <0x007d0000 0x00010000>; /* 64KB */
					};

					partition@007e0000 {
						label = "RedBoot config";
						reg = <0x007e0000 0x00010000>; /* 64KB */
					};

					partition@007f0000 {
						label = "FIS directory";
						reg = <0x007f0000 0x00010000>; /* 64KB */
					};
				};
			};

			i2c@11000 {
				clock-frequency = <400000>;
				status = "okay";

				s35390a: s35390a@30 {
					 compatible = "sii,s35390a";
					 reg = <0x30>;
				};
			};

			/* Connected to a header on device's PCB. This
			 * provides the main console for the device.
			 *
			 * Warning: the device may not boot with a 3.3V
			 * USB-serial converter connected when the power
			 * button is pressed. The converter needs to be
			 * connected a few seconds after pressing the
			 * power button. This is possibly due to UART0_TXD
			 * pin being sampled at reset (bit 0 of SAR).
			 */
			serial@12000 {
				status = "okay";
			};

			/* Connected to a Microchip PIC16F883 for power control */
			serial@12100 {
				status = "okay";
			};

			poweroff@12100 {
				compatible = "synology,power-off";
				reg = <0x12100 0x100>;
				clocks = <&coreclk 0>;
			};

			/* Front USB 2.0 port */
			usb@50000 {
				status = "okay";
			};

			mdio {
				phy0: ethernet-phy@0 { /* Marvell 88E1512 */
					reg = <0>;
				};

				phy1: ethernet-phy@1 { /* Marvell 88E1512 */
					reg = <1>;
				};
			};

			ethernet@70000 {
				status = "okay";
				pinctrl-0 = <&ge0_rgmii_pins>;
				pinctrl-names = "default";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			ethernet@74000 {
				pinctrl-0 = <&ge1_rgmii_pins>;
				pinctrl-names = "default";
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
			     &sata3_pwr_pin &sata4_pwr_pin>;
		pinctrl-names = "default";

		sata1_regulator: sata1-regulator {
			compatible = "regulator-fixed";
			reg = <1>;
			regulator-name = "SATA1 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <2000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
		};

		sata2_regulator: sata2-regulator {
			compatible = "regulator-fixed";
			reg = <2>;
			regulator-name = "SATA2 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <4000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		};

		sata3_regulator: sata3-regulator {
			compatible = "regulator-fixed";
			reg = <3>;
			regulator-name = "SATA3 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <6000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
		};

		sata4_regulator: sata4-regulator {
			compatible = "regulator-fixed";
			reg = <4>;
			regulator-name = "SATA4 Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <8000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pinctrl {
	sata1_pwr_pin: sata1-pwr-pin {
		marvell,pins = "mpp42";
		marvell,function = "gpio";
	};

	sata2_pwr_pin: sata2-pwr-pin {
		marvell,pins = "mpp44";
		marvell,function = "gpio";
	};

	sata3_pwr_pin: sata3-pwr-pin {
		marvell,pins = "mpp45";
		marvell,function = "gpio";
	};

	sata4_pwr_pin: sata4-pwr-pin {
		marvell,pins = "mpp46";
		marvell,function = "gpio";
	};

	sata1_pres_pin: sata1-pres-pin {
		marvell,pins = "mpp34";
		marvell,function = "gpio";
	};

	sata2_pres_pin: sata2-pres-pin {
		marvell,pins = "mpp35";
		marvell,function = "gpio";
	};

	sata3_pres_pin: sata3-pres-pin {
		marvell,pins = "mpp40";
		marvell,function = "gpio";
	};

	sata4_pres_pin: sata4-pres-pin {
		marvell,pins = "mpp41";
		marvell,function = "gpio";
	};

	syno_id_bit0_pin: syno-id-bit0-pin {
		marvell,pins = "mpp26";
		marvell,function = "gpio";
	};

	syno_id_bit1_pin: syno-id-bit1-pin {
		marvell,pins = "mpp28";
		marvell,function = "gpio";
	};

	syno_id_bit2_pin: syno-id-bit2-pin {
		marvell,pins = "mpp29";
		marvell,function = "gpio";
	};

	fan1_alarm_pin: fan1-alarm-pin {
		marvell,pins = "mpp33";
		marvell,function = "gpio";
	};

	fan2_alarm_pin: fan2-alarm-pin {
		marvell,pins = "mpp32";
		marvell,function = "gpio";
	};
};
Commit	Line	Data
389c74aa AE	1	/*
	2	* Device Tree file for Synology DS414
	3	*
	4	* Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*
	11	* Note: this Device Tree assumes that the bootloader has remapped the
	12	* internal registers to 0xf1000000 (instead of the old 0xd0000000).
	13	* The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
	14	* bootloaders provided by Marvell. It is used in recent versions of
	15	* DSM software provided by Synology. Nonetheless, some earlier boards
	16	* were delivered with an older version of u-boot that left internal
	17	* registers mapped at 0xd0000000. If you have such a device you will
	18	* not be able to directly boot a kernel based on this Device Tree. In
	19	* that case, the preferred solution is to update your bootloader (e.g.
	20	* by upgrading to latest version of DSM, or building a new one and
	21	* installing it from u-boot prompt) or adjust the Devive Tree
	22	* (s/0xf1000000/0xd0000000/ in 'ranges' below).
	23	*/
	24
	25	/dts-v1/;
	26
	27	#include <dt-bindings/input/input.h>
	28	#include <dt-bindings/gpio/gpio.h>
	29	#include "armada-xp-mv78230.dtsi"
	30
	31	/ {
	32	model = "Synology DS414";
	33	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
	34	"marvell,armadaxp", "marvell,armada-370-xp";
	35
	36	chosen {
	37	bootargs = "console=ttyS0,115200 earlyprintk";
	38	stdout-path = &uart0;
	39	};
	40
	41	memory {
	42	device_type = "memory";
	43	reg = <0 0x00000000 0 0x40000000>; /* 1GB */
	44	};
	45
	46	soc {
	47	ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
	48	MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
	49
	50	pcie-controller {
	51	status = "okay";
	52
	53	/*
	54	* Connected to Marvell 88SX7042 SATA-II controller
	55	* handling the four disks.
	56	*/
	57	pcie@1,0 {
	58	/* Port 0, Lane 0 */
	59	status = "okay";
	60	};
	61
	62	/*
	63	* Connected to EtronTech EJ168A XHCI controller
	64	* providing the two rear USB 3.0 ports.
65	*/
66	pcie@5,0 {
67	/* Port 1, Lane 0 */
68	status = "okay";
69	};
70	};
71
72	internal-regs {
73
74	/* RTC is provided by Seiko S-35390A below */
75	rtc@10300 {
76	status = "disabled";
77	};
78
79	spi0: spi@10600 {
80	status = "okay";
81
82	spi-flash@0 {
83	#address-cells = <1>;
84	#size-cells = <1>;
85	compatible = "micron,n25q064";
86	reg = <0>; /* Chip select 0 */
87	spi-max-frequency = <20000000>;
88
89	/*
90	* Warning!
91	*
92	* Synology u-boot uses its compiled-in environment
93	* and it seems Synology did not care to change u-boot
94	* default configuration in order to allow saving a
95	* modified environment at a sensible location. So,
96	* if you do a 'saveenv' under u-boot, your modified
97	* environment will be saved at 1MB after the start
98	* of the flash, i.e. in the middle of the uImage.
99	* For that reason, it is strongly advised not to
100	* change the default environment, unless you know
101	* what you are doing.
102	*/
103	partition@00000000 { /* u-boot */
104	label = "RedBoot";
105	reg = <0x00000000 0x000d0000>; /* 832KB */
106	};
107
108	partition@000c0000 { /* uImage */
109	label = "zImage";
110	reg = <0x000d0000 0x002d0000>; /* 2880KB */
111	};
112
113	partition@003a0000 { /* uInitramfs */
114	label = "rd.gz";
115	reg = <0x003a0000 0x00430000>; /* 4250KB */
116	};
117
118	partition@007d0000 { /* MAC address and serial number */
119	label = "vendor";
120	reg = <0x007d0000 0x00010000>; /* 64KB */
121	};
122
123	partition@007e0000 {
124	label = "RedBoot config";
125	reg = <0x007e0000 0x00010000>; /* 64KB */
126	};
127
128	partition@007f0000 {
129	label = "FIS directory";
130	reg = <0x007f0000 0x00010000>; /* 64KB */
131	};
132	};
133	};
134
135	i2c@11000 {
136	clock-frequency = <400000>;
137	status = "okay";
138
139	s35390a: s35390a@30 {
140	compatible = "sii,s35390a";
141	reg = <0x30>;
142	};
143	};
144
145	/* Connected to a header on device's PCB. This
146	* provides the main console for the device.
147	*
148	* Warning: the device may not boot with a 3.3V
149	* USB-serial converter connected when the power
150	* button is pressed. The converter needs to be
151	* connected a few seconds after pressing the
152	* power button. This is possibly due to UART0_TXD
153	* pin being sampled at reset (bit 0 of SAR).
154	*/
155	serial@12000 {
156	status = "okay";
157	};
158
159	/* Connected to a Microchip PIC16F883 for power control */
160	serial@12100 {
161	status = "okay";
162	};
163
164	poweroff@12100 {
165	compatible = "synology,power-off";
166	reg = <0x12100 0x100>;
167	clocks = <&coreclk 0>;
168	};
169
170	/* Front USB 2.0 port */
171	usb@50000 {
172	status = "okay";
173	};
174
175	mdio {
176	phy0: ethernet-phy@0 { /* Marvell 88E1512 */
177	reg = <0>;
178	};
179
180	phy1: ethernet-phy@1 { /* Marvell 88E1512 */
181	reg = <1>;
182	};
183	};
184
185	ethernet@70000 {
186	status = "okay";
70ee4e9d	187	pinctrl-0 = <&ge0_rgmii_pins>;
389c74aa AE	188	pinctrl-names = "default";
	189	phy = <&phy1>;
	190	phy-mode = "rgmii-id";
	191	};
	192
	193	ethernet@74000 {
70ee4e9d	194	pinctrl-0 = <&ge1_rgmii_pins>;
389c74aa AE	195	pinctrl-names = "default";
	196	status = "okay";
	197	phy = <&phy0>;
	198	phy-mode = "rgmii-id";
	199	};
	200	};
	201	};
	202
	203	regulators {
	204	compatible = "simple-bus";
	205	#address-cells = <1>;
	206	#size-cells = <0>;
	207	pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
	208	&sata3_pwr_pin &sata4_pwr_pin>;
	209	pinctrl-names = "default";
	210
	211	sata1_regulator: sata1-regulator {
	212	compatible = "regulator-fixed";
	213	reg = <1>;
	214	regulator-name = "SATA1 Power";
	215	regulator-min-microvolt = <5000000>;
	216	regulator-max-microvolt = <5000000>;
	217	startup-delay-us = <2000000>;
	218	enable-active-high;
	219	regulator-always-on;
	220	regulator-boot-on;
	221	gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
	222	};
	223
	224	sata2_regulator: sata2-regulator {
	225	compatible = "regulator-fixed";
	226	reg = <2>;
	227	regulator-name = "SATA2 Power";
	228	regulator-min-microvolt = <5000000>;
	229	regulator-max-microvolt = <5000000>;
	230	startup-delay-us = <4000000>;
	231	enable-active-high;
	232	regulator-always-on;
	233	regulator-boot-on;
	234	gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
	235	};
	236
	237	sata3_regulator: sata3-regulator {
	238	compatible = "regulator-fixed";
	239	reg = <3>;
	240	regulator-name = "SATA3 Power";
	241	regulator-min-microvolt = <5000000>;
	242	regulator-max-microvolt = <5000000>;
	243	startup-delay-us = <6000000>;
	244	enable-active-high;
	245	regulator-always-on;
	246	regulator-boot-on;
	247	gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
	248	};
	249
	250	sata4_regulator: sata4-regulator {
	251	compatible = "regulator-fixed";
	252	reg = <4>;
	253	regulator-name = "SATA4 Power";
	254	regulator-min-microvolt = <5000000>;
	255	regulator-max-microvolt = <5000000>;
	256	startup-delay-us = <8000000>;
	257	enable-active-high;
	258	regulator-always-on;
259	regulator-boot-on;
260	gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
261	};
262	};
263	};
264
265	&pinctrl {
266	sata1_pwr_pin: sata1-pwr-pin {
267	marvell,pins = "mpp42";
268	marvell,function = "gpio";
269	};
270
271	sata2_pwr_pin: sata2-pwr-pin {
272	marvell,pins = "mpp44";
273	marvell,function = "gpio";
274	};
275
276	sata3_pwr_pin: sata3-pwr-pin {
277	marvell,pins = "mpp45";
278	marvell,function = "gpio";
279	};
280
281	sata4_pwr_pin: sata4-pwr-pin {
282	marvell,pins = "mpp46";
283	marvell,function = "gpio";
284	};
285
286	sata1_pres_pin: sata1-pres-pin {
287	marvell,pins = "mpp34";
288	marvell,function = "gpio";
289	};
290
291	sata2_pres_pin: sata2-pres-pin {
292	marvell,pins = "mpp35";
293	marvell,function = "gpio";
294	};
295
296	sata3_pres_pin: sata3-pres-pin {
297	marvell,pins = "mpp40";
298	marvell,function = "gpio";
299	};
300
301	sata4_pres_pin: sata4-pres-pin {
302	marvell,pins = "mpp41";
303	marvell,function = "gpio";
304	};
305
306	syno_id_bit0_pin: syno-id-bit0-pin {
307	marvell,pins = "mpp26";
308	marvell,function = "gpio";
309	};
310
a02fe645	311	syno_id_bit1_pin: syno-id-bit1-pin {
389c74aa AE	312	marvell,pins = "mpp28";
	313	marvell,function = "gpio";
	314	};
	315
a02fe645	316	syno_id_bit2_pin: syno-id-bit2-pin {
389c74aa AE	317	marvell,pins = "mpp29";
	318	marvell,function = "gpio";
	319	};
	320
a02fe645	321	fan1_alarm_pin: fan1-alarm-pin {
389c74aa AE	322	marvell,pins = "mpp33";
	323	marvell,function = "gpio";
	324	};
	325
	326	fan2_alarm_pin: fan2-alarm-pin {
	327	marvell,pins = "mpp32";
	328	marvell,function = "gpio";
	329	};
	330	};