ARM: dts: exynos: Fix DTC unit name warnings in Exynos5250
[deliverable/linux.git] / arch / arm / boot / dts / at91-sama5d2_xplained.dts
CommitLineData
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NF
1/*
2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
3 *
4 * Copyright (C) 2015 Atmel,
5 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45/dts-v1/;
46#include "sama5d2.dtsi"
a9b672a6 47#include "sama5d2-pinfunc.h"
13e2a6fd 48#include <dt-bindings/mfd/atmel-flexcom.h>
ff964962 49#include <dt-bindings/gpio/gpio.h>
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NF
50
51/ {
52 model = "Atmel SAMA5D2 Xplained";
53 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
54
55 chosen {
56 stdout-path = "serial0:115200n8";
57 };
58
59 memory {
60 reg = <0x20000000 0x80000>;
61 };
62
63 clocks {
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NF
64 slow_xtal {
65 clock-frequency = <32768>;
66 };
67
68 main_xtal {
69 clock-frequency = <12000000>;
70 };
71 };
72
73 ahb {
74 usb0: gadget@00300000 {
ff964962
CP
75 atmel,vbus-gpio = <&pioA 31 GPIO_ACTIVE_HIGH>;
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_usba_vbus>;
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NF
78 status = "okay";
79 };
80
81 usb1: ohci@00400000 {
82 num-ports = <3>;
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CP
83 atmel,vbus-gpio = <0 /* &pioA 41 GPIO_ACTIVE_HIGH */
84 &pioA 42 GPIO_ACTIVE_HIGH
85 0
86 >;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_usb_default>;
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NF
89 status = "okay";
90 };
91
92 usb2: ehci@00500000 {
93 status = "okay";
94 };
95
13e2a6fd
LD
96 sdmmc0: sdio-host@a0000000 {
97 bus-width = <8>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_sdmmc0_default>;
100 non-removable;
101 mmc-ddr-1_8v;
102 status = "okay";
103 };
104
105 sdmmc1: sdio-host@b0000000 {
106 bus-width = <4>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_sdmmc1_default>;
109 status = "okay"; /* conflict with qspi0 */
110 };
111
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NF
112 apb {
113 spi0: spi@f8000000 {
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LD
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_spi0_default>;
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NF
116 status = "okay";
117
118 m25p80@0 {
119 compatible = "atmel,at25df321a";
120 reg = <0>;
121 spi-max-frequency = <50000000>;
122 };
123 };
124
125 macb0: ethernet@f8008000 {
a9b672a6 126 pinctrl-names = "default";
6c482fd1 127 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
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NF
128 phy-mode = "rmii";
129 status = "okay";
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NF
130
131 ethernet-phy@1 {
132 reg = <0x1>;
133 interrupt-parent = <&pioA>;
134 interrupts = <73 IRQ_TYPE_LEVEL_LOW>;
135 };
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136 };
137
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SW
138 pdmic@f8018000 {
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_pdmic_default>;
141 atmel,model = "PDMIC @ sama5d2_xplained";
142 atmel,mic-min-freq = <1000000>;
143 atmel,mic-max-freq = <3246000>;
144 atmel,mic-offset = <0x0>;
145 status = "okay";
146 };
147
22b5a0f7 148 uart1: serial@f8020000 {
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LD
149 pinctrl-names = "default";
150 pinctrl-0 = <&pinctrl_uart1_default>;
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NF
151 status = "okay";
152 };
153
154 i2c0: i2c@f8028000 {
155 dmas = <0>, <0>;
a9b672a6
LD
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_i2c0_default>;
0a804b57 158 i2c-sda-hold-time-ns = <350>;
22b5a0f7 159 status = "okay";
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WY
160
161 pmic: act8865@5b {
162 compatible = "active-semi,act8865";
163 reg = <0x5b>;
164 active-semi,vsel-high;
165 status = "okay";
166
167 regulators {
168 vdd_1v35_reg: DCDC_REG1 {
169 regulator-name = "VDD_1V35";
170 regulator-min-microvolt = <1350000>;
171 regulator-max-microvolt = <1350000>;
172 regulator-always-on;
173 };
174
175 vdd_1v2_reg: DCDC_REG2 {
176 regulator-name = "VDD_1V2";
177 regulator-min-microvolt = <1100000>;
178 regulator-max-microvolt = <1300000>;
179 regulator-always-on;
180 };
181
182 vdd_3v3_reg: DCDC_REG3 {
183 regulator-name = "VDD_3V3";
184 regulator-min-microvolt = <3300000>;
185 regulator-max-microvolt = <3300000>;
186 regulator-always-on;
187 };
188
189 vdd_fuse_reg: LDO_REG1 {
190 regulator-name = "VDD_FUSE";
191 regulator-min-microvolt = <2500000>;
192 regulator-max-microvolt = <2500000>;
193 regulator-always-on;
194 };
195
196 vdd_3v3_lp_reg: LDO_REG2 {
197 regulator-name = "VDD_3V3_LP";
198 regulator-min-microvolt = <3300000>;
199 regulator-max-microvolt = <3300000>;
200 regulator-always-on;
201 };
202
203 vdd_led_reg: LDO_REG3 {
204 regulator-name = "VDD_LED";
205 regulator-min-microvolt = <3300000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-always-on;
208 };
209
210 vdd_sdhc_1v8_reg: LDO_REG4 {
211 regulator-name = "VDD_SDHC_1V8";
212 regulator-min-microvolt = <1800000>;
213 regulator-max-microvolt = <1800000>;
863c1ca7 214 regulator-always-on;
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WY
215 };
216 };
217 };
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218 };
219
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LD
220 flx0: flexcom@f8034000 {
221 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
222 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
223
224 uart5: serial@200 {
225 compatible = "atmel,at91sam9260-usart";
226 reg = <0x200 0x200>;
227 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
228 clocks = <&flx0_clk>;
229 clock-names = "usart";
230 pinctrl-names = "default";
231 pinctrl-0 = <&pinctrl_flx0_default>;
232 atmel,fifo-size = <32>;
233 status = "okay";
234 };
235 };
236
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WY
237 watchdog@f8048040 {
238 status = "okay";
239 };
240
22b5a0f7 241 uart3: serial@fc008000 {
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LD
242 pinctrl-names = "default";
243 pinctrl-0 = <&pinctrl_uart3_default>;
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244 status = "okay";
245 };
246
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LD
247 flx4: flexcom@fc018000 {
248 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
249 status = "okay";
250
251 i2c2: i2c@600 {
252 compatible = "atmel,sama5d2-i2c";
253 reg = <0x600 0x200>;
254 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
255 dmas = <0>, <0>;
256 dma-names = "tx", "rx";
257 #address-cells = <1>;
258 #size-cells = <0>;
259 clocks = <&flx4_clk>;
260 pinctrl-names = "default";
261 pinctrl-0 = <&pinctrl_flx4_default>;
262 atmel,fifo-size = <16>;
263 status = "okay";
264 };
265 };
266
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267 i2c1: i2c@fc028000 {
268 dmas = <0>, <0>;
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LD
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_i2c1_default>;
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NF
271 status = "okay";
272
273 at24@54 {
274 compatible = "atmel,24c02";
275 reg = <0x54>;
276 pagesize = <16>;
277 };
278 };
a9b672a6 279
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LD
280 adc: adc@fc030000 {
281 vddana-supply = <&vdd_3v3_lp_reg>;
282 vref-supply = <&vdd_3v3_lp_reg>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&pinctrl_adc_default>;
285 status = "okay";
286 };
287
a9b672a6 288 pinctrl@fc038000 {
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LD
289 /*
290 * There is no real pinmux for ADC, if the pin
291 * is not requested by another peripheral then
292 * the muxing is done when channel is enabled.
293 * Requesting pins for ADC is GPIO is
294 * encouraged to prevent conflicts and to
295 * disable bias in order to be in the same
296 * state when the pin is not muxed to the adc.
297 */
298 pinctrl_adc_default: adc_default {
299 pinmux = <PIN_PD23__GPIO>;
300 bias-disable;
301 };
302
13e2a6fd
LD
303 pinctrl_flx0_default: flx0_default {
304 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
305 <PIN_PB29__FLEXCOM0_IO1>;
306 bias-disable;
307 };
308
309 pinctrl_flx4_default: flx4_default {
310 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
311 <PIN_PD13__FLEXCOM4_IO1>;
312 bias-disable;
313 };
314
a9b672a6
LD
315 pinctrl_i2c0_default: i2c0_default {
316 pinmux = <PIN_PD21__TWD0>,
317 <PIN_PD22__TWCK0>;
318 bias-disable;
319 };
320
321 pinctrl_i2c1_default: i2c1_default {
322 pinmux = <PIN_PD4__TWD1>,
323 <PIN_PD5__TWCK1>;
324 bias-disable;
325 };
326
c7e48d44
LD
327 pinctrl_key_gpio_default: key_gpio_default {
328 pinmux = <PIN_PB9__GPIO>;
329 bias-pull-up;
330 };
331
ed0f4b3f
WY
332 pinctrl_led_gpio_default: led_gpio_default {
333 pinmux = <PIN_PB0__GPIO>,
334 <PIN_PB5__GPIO>,
335 <PIN_PB6__GPIO>;
336 bias-pull-up;
337 };
338
a9b672a6
LD
339 pinctrl_macb0_default: macb0_default {
340 pinmux = <PIN_PB14__GTXCK>,
341 <PIN_PB15__GTXEN>,
342 <PIN_PB16__GRXDV>,
343 <PIN_PB17__GRXER>,
344 <PIN_PB18__GRX0>,
345 <PIN_PB19__GRX1>,
346 <PIN_PB20__GTX0>,
347 <PIN_PB21__GTX1>,
348 <PIN_PB22__GMDC>,
349 <PIN_PB23__GMDIO>;
350 bias-disable;
351 };
352
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NF
353 pinctrl_macb0_phy_irq: macb0_phy_irq {
354 pinmux = <PIN_PC9__GPIO>;
34ff2dc7 355 bias-disable;
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NF
356 };
357
ca6349a8
SW
358 pinctrl_pdmic_default: pdmic_default {
359 pinmux = <PIN_PB26__PDMIC_DAT>,
360 <PIN_PB27__PDMIC_CLK>;
361 bias-disable;
362 };
363
13e2a6fd
LD
364 pinctrl_sdmmc0_default: sdmmc0_default {
365 cmd_data {
366 pinmux = <PIN_PA1__SDMMC0_CMD>,
367 <PIN_PA2__SDMMC0_DAT0>,
368 <PIN_PA3__SDMMC0_DAT1>,
369 <PIN_PA4__SDMMC0_DAT2>,
370 <PIN_PA5__SDMMC0_DAT3>,
371 <PIN_PA6__SDMMC0_DAT4>,
372 <PIN_PA7__SDMMC0_DAT5>,
373 <PIN_PA8__SDMMC0_DAT6>,
374 <PIN_PA9__SDMMC0_DAT7>;
375 bias-pull-up;
376 };
377
378 ck_cd_rstn_vddsel {
379 pinmux = <PIN_PA0__SDMMC0_CK>,
380 <PIN_PA10__SDMMC0_RSTN>,
381 <PIN_PA11__SDMMC0_VDDSEL>,
382 <PIN_PA13__SDMMC0_CD>;
383 bias-disable;
384 };
385 };
386
387 pinctrl_sdmmc1_default: sdmmc1_default {
388 cmd_data {
389 pinmux = <PIN_PA28__SDMMC1_CMD>,
390 <PIN_PA18__SDMMC1_DAT0>,
391 <PIN_PA19__SDMMC1_DAT1>,
392 <PIN_PA20__SDMMC1_DAT2>,
393 <PIN_PA21__SDMMC1_DAT3>;
394 bias-pull-up;
395 };
396
397 conf-ck_cd {
398 pinmux = <PIN_PA22__SDMMC1_CK>,
399 <PIN_PA30__SDMMC1_CD>;
400 bias-disable;
401 };
402 };
403
a9b672a6
LD
404 pinctrl_spi0_default: spi0_default {
405 pinmux = <PIN_PA14__SPI0_SPCK>,
406 <PIN_PA15__SPI0_MOSI>,
407 <PIN_PA16__SPI0_MISO>,
408 <PIN_PA17__SPI0_NPCS0>;
409 bias-disable;
410 };
411
412 pinctrl_uart1_default: uart1_default {
413 pinmux = <PIN_PD2__URXD1>,
414 <PIN_PD3__UTXD1>;
415 bias-disable;
416 };
417
418 pinctrl_uart3_default: uart3_default {
419 pinmux = <PIN_PB11__URXD3>,
420 <PIN_PB12__UTXD3>;
421 bias-disable;
422 };
ff964962
CP
423
424 pinctrl_usb_default: usb_default {
425 pinmux = <PIN_PB10__GPIO>;
426 bias-disable;
427 };
428
429 pinctrl_usba_vbus: usba_vbus {
430 pinmux = <PIN_PA31__GPIO>;
431 bias-disable;
432 };
433
a9b672a6 434 };
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NF
435 };
436 };
c7e48d44
LD
437
438 gpio_keys {
439 compatible = "gpio-keys";
440
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_key_gpio_default>;
443
444 bp1 {
445 label = "PB_USER";
446 gpios = <&pioA 41 GPIO_ACTIVE_LOW>;
447 linux,code = <0x104>;
448 };
449 };
ed0f4b3f
WY
450
451 leds {
452 compatible = "gpio-leds";
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_led_gpio_default>;
455 status = "okay";
456
457 red {
458 label = "red";
459 gpios = <&pioA 38 GPIO_ACTIVE_LOW>;
460 };
461
462 green {
463 label = "green";
464 gpios = <&pioA 37 GPIO_ACTIVE_LOW>;
465 };
466
467 blue {
468 label = "blue";
469 gpios = <&pioA 32 GPIO_ACTIVE_LOW>;
470 linux,default-trigger = "heartbeat";
471 };
472 };
22b5a0f7 473};
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