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ARM: at91/dt: add pinctrl definition for at91 tc blocks
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9260.dtsi
CommitLineData
5b6089cb
JCPV		 1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
6db64d29 11#include "skeleton.dtsi"
c9d0f317 12#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 13#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 14#include <dt-bindings/gpio/gpio.h>
5b6089cb
JCPV		 15
16/ {
17 model = "Atmel AT91SAM9260 family SoC";
18 compatible = "atmel,at91sam9260";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
9e3129e9
JCPV		 27 serial5 = &uart0;
28 serial6 = &uart1;
5b6089cb
JCPV		 29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
05dcd361 34 i2c0 = &i2c0;
099343c6 35 ssc0 = &ssc0;
5b6089cb
JCPV		 36 };
37 cpus {
38 cpu@0 {
39 compatible = "arm,arm926ejs";
40 };
41 };
42
43 memory {
44 reg = <0x20000000 0x04000000>;
45 };
46
47 ahb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 apb {
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 ranges;
58
59 aic: interrupt-controller@fffff000 {
f8a073ee 60 #interrupt-cells = <3>;
5b6089cb
JCPV		 61 compatible = "atmel,at91rm9200-aic";
62 interrupt-controller;
63 reg = <0xfffff000 0x200>;
c6573943 64 atmel,external-irqs = <29 30 31>;
5b6089cb
JCPV		 65 };
66
67 ramc0: ramc@ffffea00 {
68 compatible = "atmel,at91sam9260-sdramc";
69 reg = <0xffffea00 0x200>;
70 };
71
72 pmc: pmc@fffffc00 {
73 compatible = "atmel,at91rm9200-pmc";
74 reg = <0xfffffc00 0x100>;
75 };
76
77 rstc@fffffd00 {
78 compatible = "atmel,at91sam9260-rstc";
79 reg = <0xfffffd00 0x10>;
80 };
81
82 shdwc@fffffd10 {
83 compatible = "atmel,at91sam9260-shdwc";
84 reg = <0xfffffd10 0x10>;
85 };
86
87 pit: timer@fffffd30 {
88 compatible = "atmel,at91sam9260-pit";
89 reg = <0xfffffd30 0xf>;
5e8b3bc3 90 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
5b6089cb
JCPV		 91 };
92
93 tcb0: timer@fffa0000 {
94 compatible = "atmel,at91rm9200-tcb";
95 reg = <0xfffa0000 0x100>;
5e8b3bc3
JCPV		 96 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
97 18 IRQ_TYPE_LEVEL_HIGH 0
98 19 IRQ_TYPE_LEVEL_HIGH 0>;
5b6089cb
JCPV		 99 };
100
101 tcb1: timer@fffdc000 {
102 compatible = "atmel,at91rm9200-tcb";
103 reg = <0xfffdc000 0x100>;
5e8b3bc3
JCPV		 104 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
105 27 IRQ_TYPE_LEVEL_HIGH 0
106 28 IRQ_TYPE_LEVEL_HIGH 0>;
5b6089cb
JCPV		 107 };
108
e4541ff2
JCPV		 109 pinctrl@fffff400 {
110 #address-cells = <1>;
111 #size-cells = <1>;
112 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
113 ranges = <0xfffff400 0xfffff400 0x600>;
114
5314ec8e
JCPV		 115 atmel,mux-mask = <
116 /* A B */
117 0xffffffff 0xffc00c3b /* pioA */
118 0xffffffff 0x7fff3ccf /* pioB */
119 0xffffffff 0x007fffff /* pioC */
120 >;
121
122 /* shared pinctrl settings */
ec6754a7
JCPV		 123 dbgu {
124 pinctrl_dbgu: dbgu-0 {
125 atmel,pins =
c9d0f317
JCPV		 126 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
127 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
ec6754a7
JCPV		 128 };
129 };
130
9e3129e9
JCPV		 131 usart0 {
132 pinctrl_usart0: usart0-0 {
ec6754a7 133 atmel,pins =
c9d0f317
JCPV		 134 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
135 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
ec6754a7
JCPV		 136 };
137
c58c0c5a 138 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 139 atmel,pins =
c9d0f317 140 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
c58c0c5a
JCPV		 141 };
142
143 pinctrl_usart0_cts: usart0_cts-0 {
144 atmel,pins =
c9d0f317 145 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
ec6754a7
JCPV		 146 };
147
9e3129e9 148 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
ec6754a7 149 atmel,pins =
c9d0f317
JCPV		 150 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
151 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
ec6754a7
JCPV		 152 };
153
9e3129e9 154 pinctrl_usart0_dcd: usart0_dcd-0 {
ec6754a7 155 atmel,pins =
c9d0f317 156 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
ec6754a7
JCPV		 157 };
158
9e3129e9 159 pinctrl_usart0_ri: usart0_ri-0 {
ec6754a7 160 atmel,pins =
c9d0f317 161 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
ec6754a7
JCPV		 162 };
163 };
164
9e3129e9
JCPV		 165 usart1 {
166 pinctrl_usart1: usart1-0 {
ec6754a7 167 atmel,pins =
c9d0f317
JCPV		 168 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
169 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
ec6754a7
JCPV		 170 };
171
c58c0c5a
JCPV		 172 pinctrl_usart1_rts: usart1_rts-0 {
173 atmel,pins =
c9d0f317 174 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
c58c0c5a
JCPV		 175 };
176
177 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 178 atmel,pins =
c9d0f317 179 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
ec6754a7
JCPV		 180 };
181 };
182
9e3129e9
JCPV		 183 usart2 {
184 pinctrl_usart2: usart2-0 {
ec6754a7 185 atmel,pins =
c9d0f317
JCPV		 186 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
187 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
ec6754a7
JCPV		 188 };
189
c58c0c5a 190 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 191 atmel,pins =
c9d0f317 192 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
c58c0c5a
JCPV		 193 };
194
195 pinctrl_usart2_cts: usart2_cts-0 {
196 atmel,pins =
c9d0f317 197 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
ec6754a7
JCPV		 198 };
199 };
200
9e3129e9
JCPV		 201 usart3 {
202 pinctrl_usart3: usart3-0 {
ec6754a7 203 atmel,pins =
c9d0f317
JCPV		 204 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
205 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
ec6754a7
JCPV		 206 };
207
c58c0c5a
JCPV		 208 pinctrl_usart3_rts: usart3_rts-0 {
209 atmel,pins =
c9d0f317 210 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
c58c0c5a
JCPV		 211 };
212
213 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 214 atmel,pins =
c9d0f317 215 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
ec6754a7
JCPV		 216 };
217 };
218
9e3129e9
JCPV		 219 uart0 {
220 pinctrl_uart0: uart0-0 {
ec6754a7 221 atmel,pins =
c9d0f317
JCPV		 222 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
223 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
ec6754a7
JCPV		 224 };
225 };
226
9e3129e9
JCPV		 227 uart1 {
228 pinctrl_uart1: uart1-0 {
ec6754a7 229 atmel,pins =
c9d0f317
JCPV		 230 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
231 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
ec6754a7
JCPV		 232 };
233 };
5314ec8e 234
7a38d450
JCPV		 235 nand {
236 pinctrl_nand: nand-0 {
237 atmel,pins =
c9d0f317
JCPV		 238 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
239 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
7a38d450
JCPV		 240 };
241 };
242
d9b4fe83
JCPV		 243 macb {
244 pinctrl_macb_rmii: macb_rmii-0 {
245 atmel,pins =
c9d0f317
JCPV		 246 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
247 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
248 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
249 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
250 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
251 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
252 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
253 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
254 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
255 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
d9b4fe83
JCPV		 256 };
257
258 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
259 atmel,pins =
c9d0f317
JCPV		 260 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
261 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
262 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
263 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
264 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
265 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
266 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
267 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
d9b4fe83
JCPV		 268 };
269
270 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
271 atmel,pins =
c9d0f317
JCPV		 272 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
273 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
274 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
275 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
276 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
277 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
278 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
279 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
d9b4fe83
JCPV		 280 };
281 };
282
d4fe9ac7
JCPV		 283 mmc0 {
284 pinctrl_mmc0_clk: mmc0_clk-0 {
285 atmel,pins =
c9d0f317 286 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
d4fe9ac7
JCPV		 287 };
288
289 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
290 atmel,pins =
c9d0f317
JCPV		 291 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
292 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
d4fe9ac7
JCPV		 293 };
294
295 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
296 atmel,pins =
c9d0f317
JCPV		 297 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
298 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
299 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
d4fe9ac7
JCPV		 300 };
301
302 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
303 atmel,pins =
c9d0f317
JCPV		 304 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
305 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
d4fe9ac7
JCPV		 306 };
307
308 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
309 atmel,pins =
c9d0f317
JCPV		 310 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
311 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
312 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
d4fe9ac7
JCPV		 313 };
314 };
315
544ae6b2
BS		 316 ssc0 {
317 pinctrl_ssc0_tx: ssc0_tx-0 {
318 atmel,pins =
c9d0f317
JCPV		 319 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
320 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
321 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
544ae6b2
BS		 322 };
323
324 pinctrl_ssc0_rx: ssc0_rx-0 {
325 atmel,pins =
c9d0f317
JCPV		 326 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
327 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
328 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
544ae6b2
BS		 329 };
330 };
331
a68b728f
WY		 332 spi0 {
333 pinctrl_spi0: spi0-0 {
334 atmel,pins =
c9d0f317
JCPV		 335 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
336 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
337 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
a68b728f
WY		 338 };
339 };
340
341 spi1 {
342 pinctrl_spi1: spi1-0 {
343 atmel,pins =
c9d0f317
JCPV		 344 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
345 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
346 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
a68b728f
WY		 347 };
348 };
349
f89ae61b
JCPV		 350 i2c_gpio0 {
351 pinctrl_i2c_gpio0: i2c_gpio0-0 {
352 atmel,pins =
353 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
354 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
355 };
356 };
357
028633c2
BB		 358 tcb0 {
359 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
360 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
361 };
362
363 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
364 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
365 };
366
367 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
368 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
369 };
370
371 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
372 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
373 };
374
375 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
376 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
377 };
378
379 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
380 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
381 };
382
383 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
384 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
385 };
386
387 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
388 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
389 };
390
391 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
392 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
393 };
394 };
395
396 tcb1 {
397 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
398 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
399 };
400
401 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
402 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
403 };
404
405 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
406 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
407 };
408
409 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
410 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
411 };
412
413 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
414 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
415 };
416
417 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
418 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
419 };
420
421 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
422 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
423 };
424
425 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
426 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
427 };
428
429 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
430 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
431 };
432 };
433
e4541ff2
JCPV		 434 pioA: gpio@fffff400 {
435 compatible = "atmel,at91rm9200-gpio";
436 reg = <0xfffff400 0x200>;
5e8b3bc3 437 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 438 #gpio-cells = <2>;
439 gpio-controller;
440 interrupt-controller;
441 #interrupt-cells = <2>;
442 };
443
444 pioB: gpio@fffff600 {
445 compatible = "atmel,at91rm9200-gpio";
446 reg = <0xfffff600 0x200>;
5e8b3bc3 447 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 448 #gpio-cells = <2>;
449 gpio-controller;
450 interrupt-controller;
451 #interrupt-cells = <2>;
452 };
453
454 pioC: gpio@fffff800 {
455 compatible = "atmel,at91rm9200-gpio";
456 reg = <0xfffff800 0x200>;
5e8b3bc3 457 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 458 #gpio-cells = <2>;
459 gpio-controller;
460 interrupt-controller;
461 #interrupt-cells = <2>;
462 };
5b6089cb
JCPV		 463 };
464
465 dbgu: serial@fffff200 {
466 compatible = "atmel,at91sam9260-usart";
467 reg = <0xfffff200 0x200>;
5e8b3bc3 468 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 469 pinctrl-names = "default";
470 pinctrl-0 = <&pinctrl_dbgu>;
5b6089cb
JCPV		 471 status = "disabled";
472 };
473
474 usart0: serial@fffb0000 {
475 compatible = "atmel,at91sam9260-usart";
476 reg = <0xfffb0000 0x200>;
5e8b3bc3 477 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 478 atmel,use-dma-rx;
479 atmel,use-dma-tx;
ec6754a7 480 pinctrl-names = "default";
9e3129e9 481 pinctrl-0 = <&pinctrl_usart0>;
5b6089cb
JCPV		 482 status = "disabled";
483 };
484
485 usart1: serial@fffb4000 {
486 compatible = "atmel,at91sam9260-usart";
487 reg = <0xfffb4000 0x200>;
5e8b3bc3 488 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 489 atmel,use-dma-rx;
490 atmel,use-dma-tx;
ec6754a7 491 pinctrl-names = "default";
9e3129e9 492 pinctrl-0 = <&pinctrl_usart1>;
5b6089cb
JCPV		 493 status = "disabled";
494 };
495
496 usart2: serial@fffb8000 {
497 compatible = "atmel,at91sam9260-usart";
498 reg = <0xfffb8000 0x200>;
5e8b3bc3 499 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 500 atmel,use-dma-rx;
501 atmel,use-dma-tx;
ec6754a7 502 pinctrl-names = "default";
9e3129e9 503 pinctrl-0 = <&pinctrl_usart2>;
5b6089cb
JCPV		 504 status = "disabled";
505 };
506
507 usart3: serial@fffd0000 {
508 compatible = "atmel,at91sam9260-usart";
509 reg = <0xfffd0000 0x200>;
5e8b3bc3 510 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 511 atmel,use-dma-rx;
512 atmel,use-dma-tx;
ec6754a7 513 pinctrl-names = "default";
9e3129e9 514 pinctrl-0 = <&pinctrl_usart3>;
5b6089cb
JCPV		 515 status = "disabled";
516 };
517
9e3129e9 518 uart0: serial@fffd4000 {
5b6089cb
JCPV		 519 compatible = "atmel,at91sam9260-usart";
520 reg = <0xfffd4000 0x200>;
5e8b3bc3 521 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 522 atmel,use-dma-rx;
523 atmel,use-dma-tx;
ec6754a7 524 pinctrl-names = "default";
9e3129e9 525 pinctrl-0 = <&pinctrl_uart0>;
5b6089cb
JCPV		 526 status = "disabled";
527 };
528
9e3129e9 529 uart1: serial@fffd8000 {
5b6089cb
JCPV		 530 compatible = "atmel,at91sam9260-usart";
531 reg = <0xfffd8000 0x200>;
5e8b3bc3 532 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
5b6089cb
JCPV		 533 atmel,use-dma-rx;
534 atmel,use-dma-tx;
ec6754a7 535 pinctrl-names = "default";
9e3129e9 536 pinctrl-0 = <&pinctrl_uart1>;
5b6089cb
JCPV		 537 status = "disabled";
538 };
539
540 macb0: ethernet@fffc4000 {
541 compatible = "cdns,at32ap7000-macb", "cdns,macb";
542 reg = <0xfffc4000 0x100>;
5e8b3bc3 543 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_macb_rmii>;
5b6089cb
JCPV		 546 status = "disabled";
547 };
548
549 usb1: gadget@fffa4000 {
550 compatible = "atmel,at91rm9200-udc";
551 reg = <0xfffa4000 0x4000>;
5e8b3bc3 552 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
5b6089cb
JCPV		 553 status = "disabled";
554 };
73d68d91 555
05dcd361
LD		 556 i2c0: i2c@fffac000 {
557 compatible = "atmel,at91sam9260-i2c";
558 reg = <0xfffac000 0x100>;
5e8b3bc3 559 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD		 560 #address-cells = <1>;
561 #size-cells = <0>;
562 status = "disabled";
563 };
564
9873137a
LD		 565 mmc0: mmc@fffa8000 {
566 compatible = "atmel,hsmci";
567 reg = <0xfffa8000 0x600>;
5e8b3bc3 568 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
9873137a
LD		 569 #address-cells = <1>;
570 #size-cells = <0>;
571 status = "disabled";
572 };
573
099343c6
BS		 574 ssc0: ssc@fffbc000 {
575 compatible = "atmel,at91rm9200-ssc";
576 reg = <0xfffbc000 0x4000>;
5e8b3bc3 577 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 578 pinctrl-names = "default";
579 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
046e7d68 580 status = "disabled";
099343c6
BS		 581 };
582
d50f88a0
RG		 583 spi0: spi@fffc8000 {
584 #address-cells = <1>;
585 #size-cells = <0>;
586 compatible = "atmel,at91rm9200-spi";
587 reg = <0xfffc8000 0x200>;
5e8b3bc3 588 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 589 pinctrl-names = "default";
590 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 591 status = "disabled";
592 };
593
594 spi1: spi@fffcc000 {
595 #address-cells = <1>;
596 #size-cells = <0>;
597 compatible = "atmel,at91rm9200-spi";
598 reg = <0xfffcc000 0x200>;
5e8b3bc3 599 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG		 602 status = "disabled";
603 };
604
73d68d91
NF		 605 adc0: adc@fffe0000 {
606 compatible = "atmel,at91sam9260-adc";
607 reg = <0xfffe0000 0x100>;
5e8b3bc3 608 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
73d68d91
NF		 609 atmel,adc-use-external-triggers;
610 atmel,adc-channels-used = <0xf>;
611 atmel,adc-vref = <3300>;
612 atmel,adc-num-channels = <4>;
613 atmel,adc-startup-time = <15>;
614 atmel,adc-channel-base = <0x30>;
615 atmel,adc-drdy-mask = <0x10000>;
616 atmel,adc-status-register = <0x1c>;
617 atmel,adc-trigger-register = <0x04>;
4b50da65
LD		 618 atmel,adc-res = <8 10>;
619 atmel,adc-res-names = "lowres", "highres";
620 atmel,adc-use-res = "highres";
73d68d91
NF		 621
622 trigger@0 {
623 trigger-name = "timer-counter-0";
624 trigger-value = <0x1>;
625 };
626 trigger@1 {
627 trigger-name = "timer-counter-1";
628 trigger-value = <0x3>;
629 };
630
631 trigger@2 {
632 trigger-name = "timer-counter-2";
633 trigger-value = <0x5>;
634 };
635
636 trigger@3 {
637 trigger-name = "external";
638 trigger-value = <0x13>;
639 trigger-external;
640 };
641 };
7492e7ca
FP		 642
643 watchdog@fffffd40 {
644 compatible = "atmel,at91sam9260-wdt";
645 reg = <0xfffffd40 0x10>;
646 status = "disabled";
647 };
5b6089cb
JCPV		 648 };
649
650 nand0: nand@40000000 {
651 compatible = "atmel,at91rm9200-nand";
652 #address-cells = <1>;
653 #size-cells = <1>;
654 reg = <0x40000000 0x10000000
655 0xffffe800 0x200
656 >;
657 atmel,nand-addr-offset = <21>;
658 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 659 pinctrl-names = "default";
660 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 661 gpios = <&pioC 13 GPIO_ACTIVE_HIGH
662 &pioC 14 GPIO_ACTIVE_HIGH
5b6089cb
JCPV		 663 0
664 >;
665 status = "disabled";
666 };
667
668 usb0: ohci@00500000 {
669 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
670 reg = <0x00500000 0x100000>;
5e8b3bc3 671 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
5b6089cb
JCPV		 672 status = "disabled";
673 };
674 };
675
676 i2c@0 {
677 compatible = "i2c-gpio";
92f8629b
JCPV		 678 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
679 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
5b6089cb
JCPV		 680 >;
681 i2c-gpio,sda-open-drain;
682 i2c-gpio,scl-open-drain;
683 i2c-gpio,delay-us = <2>; /* ~100 kHz */
684 #address-cells = <1>;
685 #size-cells = <0>;
f89ae61b
JCPV		 686 pinctrl-names = "default";
687 pinctrl-0 = <&pinctrl_i2c_gpio0>;
5b6089cb
JCPV		 688 status = "disabled";
689 };
690};
Linux kernel - Deliverables
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