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ARM: at91: dt: use #include for all device trees
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9260.dtsi
CommitLineData
5b6089cb
JCPV		 1/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
6db64d29 11#include "skeleton.dtsi"
5b6089cb
JCPV		 12
13/ {
14 model = "Atmel AT91SAM9260 family SoC";
15 compatible = "atmel,at91sam9260";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
9e3129e9
JCPV		 24 serial5 = &uart0;
25 serial6 = &uart1;
5b6089cb
JCPV		 26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 tcb0 = &tcb0;
30 tcb1 = &tcb1;
05dcd361 31 i2c0 = &i2c0;
099343c6 32 ssc0 = &ssc0;
5b6089cb
JCPV		 33 };
34 cpus {
35 cpu@0 {
36 compatible = "arm,arm926ejs";
37 };
38 };
39
40 memory {
41 reg = <0x20000000 0x04000000>;
42 };
43
44 ahb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49
50 apb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55
56 aic: interrupt-controller@fffff000 {
f8a073ee 57 #interrupt-cells = <3>;
5b6089cb
JCPV		 58 compatible = "atmel,at91rm9200-aic";
59 interrupt-controller;
60 reg = <0xfffff000 0x200>;
c6573943 61 atmel,external-irqs = <29 30 31>;
5b6089cb
JCPV		 62 };
63
64 ramc0: ramc@ffffea00 {
65 compatible = "atmel,at91sam9260-sdramc";
66 reg = <0xffffea00 0x200>;
67 };
68
69 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
74 rstc@fffffd00 {
75 compatible = "atmel,at91sam9260-rstc";
76 reg = <0xfffffd00 0x10>;
77 };
78
79 shdwc@fffffd10 {
80 compatible = "atmel,at91sam9260-shdwc";
81 reg = <0xfffffd10 0x10>;
82 };
83
84 pit: timer@fffffd30 {
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffd30 0xf>;
f8a073ee 87 interrupts = <1 4 7>;
5b6089cb
JCPV		 88 };
89
90 tcb0: timer@fffa0000 {
91 compatible = "atmel,at91rm9200-tcb";
92 reg = <0xfffa0000 0x100>;
f8a073ee 93 interrupts = <17 4 0 18 4 0 19 4 0>;
5b6089cb
JCPV		 94 };
95
96 tcb1: timer@fffdc000 {
97 compatible = "atmel,at91rm9200-tcb";
98 reg = <0xfffdc000 0x100>;
f8a073ee 99 interrupts = <26 4 0 27 4 0 28 4 0>;
5b6089cb
JCPV		 100 };
101
e4541ff2
JCPV		 102 pinctrl@fffff400 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
106 ranges = <0xfffff400 0xfffff400 0x600>;
107
5314ec8e
JCPV		 108 atmel,mux-mask = <
109 /* A B */
110 0xffffffff 0xffc00c3b /* pioA */
111 0xffffffff 0x7fff3ccf /* pioB */
112 0xffffffff 0x007fffff /* pioC */
113 >;
114
115 /* shared pinctrl settings */
ec6754a7
JCPV		 116 dbgu {
117 pinctrl_dbgu: dbgu-0 {
118 atmel,pins =
119 <1 14 0x1 0x0 /* PB14 periph A */
120 1 15 0x1 0x1>; /* PB15 periph with pullup */
121 };
122 };
123
9e3129e9
JCPV		 124 usart0 {
125 pinctrl_usart0: usart0-0 {
ec6754a7
JCPV		 126 atmel,pins =
127 <1 4 0x1 0x0 /* PB4 periph A */
128 1 5 0x1 0x0>; /* PB5 periph A */
129 };
130
c58c0c5a 131 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 132 atmel,pins =
c58c0c5a
JCPV		 133 <1 26 0x1 0x0>; /* PB26 periph A */
134 };
135
136 pinctrl_usart0_cts: usart0_cts-0 {
137 atmel,pins =
138 <1 27 0x1 0x0>; /* PB27 periph A */
ec6754a7
JCPV		 139 };
140
9e3129e9 141 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
ec6754a7
JCPV		 142 atmel,pins =
143 <1 24 0x1 0x0 /* PB24 periph A */
144 1 22 0x1 0x0>; /* PB22 periph A */
145 };
146
9e3129e9 147 pinctrl_usart0_dcd: usart0_dcd-0 {
ec6754a7
JCPV		 148 atmel,pins =
149 <1 23 0x1 0x0>; /* PB23 periph A */
150 };
151
9e3129e9 152 pinctrl_usart0_ri: usart0_ri-0 {
ec6754a7
JCPV		 153 atmel,pins =
154 <1 25 0x1 0x0>; /* PB25 periph A */
155 };
156 };
157
9e3129e9
JCPV		 158 usart1 {
159 pinctrl_usart1: usart1-0 {
ec6754a7 160 atmel,pins =
f10491ff
DG		 161 <1 6 0x1 0x1 /* PB6 periph A with pullup */
162 1 7 0x1 0x0>; /* PB7 periph A */
ec6754a7
JCPV		 163 };
164
c58c0c5a
JCPV		 165 pinctrl_usart1_rts: usart1_rts-0 {
166 atmel,pins =
167 <1 28 0x1 0x0>; /* PB28 periph A */
168 };
169
170 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 171 atmel,pins =
c58c0c5a 172 <1 29 0x1 0x0>; /* PB29 periph A */
ec6754a7
JCPV		 173 };
174 };
175
9e3129e9
JCPV		 176 usart2 {
177 pinctrl_usart2: usart2-0 {
ec6754a7
JCPV		 178 atmel,pins =
179 <1 8 0x1 0x1 /* PB8 periph A with pullup */
180 1 9 0x1 0x0>; /* PB9 periph A */
181 };
182
c58c0c5a 183 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 184 atmel,pins =
c58c0c5a
JCPV		 185 <0 4 0x1 0x0>; /* PA4 periph A */
186 };
187
188 pinctrl_usart2_cts: usart2_cts-0 {
189 atmel,pins =
190 <0 5 0x1 0x0>; /* PA5 periph A */
ec6754a7
JCPV		 191 };
192 };
193
9e3129e9
JCPV		 194 usart3 {
195 pinctrl_usart3: usart3-0 {
ec6754a7 196 atmel,pins =
f10491ff
DG		 197 <1 10 0x1 0x1 /* PB10 periph A with pullup */
198 1 11 0x1 0x0>; /* PB11 periph A */
ec6754a7
JCPV		 199 };
200
c58c0c5a
JCPV		 201 pinctrl_usart3_rts: usart3_rts-0 {
202 atmel,pins =
f10491ff 203 <2 8 0x2 0x0>; /* PC8 periph B */
c58c0c5a
JCPV		 204 };
205
206 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 207 atmel,pins =
f10491ff 208 <2 10 0x2 0x0>; /* PC10 periph B */
ec6754a7
JCPV		 209 };
210 };
211
9e3129e9
JCPV		 212 uart0 {
213 pinctrl_uart0: uart0-0 {
ec6754a7
JCPV		 214 atmel,pins =
215 <0 31 0x2 0x1 /* PA31 periph B with pullup */
216 0 30 0x2 0x0>; /* PA30 periph B */
217 };
218 };
219
9e3129e9
JCPV		 220 uart1 {
221 pinctrl_uart1: uart1-0 {
ec6754a7 222 atmel,pins =
f10491ff
DG		 223 <1 12 0x1 0x1 /* PB12 periph A with pullup */
224 1 13 0x1 0x0>; /* PB13 periph A */
ec6754a7
JCPV		 225 };
226 };
5314ec8e 227
7a38d450
JCPV		 228 nand {
229 pinctrl_nand: nand-0 {
230 atmel,pins =
231 <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
232 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
233 };
234 };
235
d9b4fe83
JCPV		 236 macb {
237 pinctrl_macb_rmii: macb_rmii-0 {
238 atmel,pins =
239 <0 12 0x1 0x0 /* PA12 periph A */
240 0 13 0x1 0x0 /* PA13 periph A */
241 0 14 0x1 0x0 /* PA14 periph A */
242 0 15 0x1 0x0 /* PA15 periph A */
243 0 16 0x1 0x0 /* PA16 periph A */
244 0 17 0x1 0x0 /* PA17 periph A */
245 0 18 0x1 0x0 /* PA18 periph A */
246 0 19 0x1 0x0 /* PA19 periph A */
247 0 20 0x1 0x0 /* PA20 periph A */
248 0 21 0x1 0x0>; /* PA21 periph A */
249 };
250
251 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
252 atmel,pins =
253 <0 22 0x2 0x0 /* PA22 periph B */
254 0 23 0x2 0x0 /* PA23 periph B */
255 0 24 0x2 0x0 /* PA24 periph B */
256 0 25 0x2 0x0 /* PA25 periph B */
257 0 26 0x2 0x0 /* PA26 periph B */
258 0 27 0x2 0x0 /* PA27 periph B */
259 0 28 0x2 0x0 /* PA28 periph B */
260 0 29 0x2 0x0>; /* PA29 periph B */
261 };
262
263 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
264 atmel,pins =
265 <0 10 0x2 0x0 /* PA10 periph B */
266 0 11 0x2 0x0 /* PA11 periph B */
267 0 24 0x2 0x0 /* PA24 periph B */
268 0 25 0x2 0x0 /* PA25 periph B */
269 0 26 0x2 0x0 /* PA26 periph B */
270 0 27 0x2 0x0 /* PA27 periph B */
271 0 28 0x2 0x0 /* PA28 periph B */
272 0 29 0x2 0x0>; /* PA29 periph B */
273 };
274 };
275
d4fe9ac7
JCPV		 276 mmc0 {
277 pinctrl_mmc0_clk: mmc0_clk-0 {
278 atmel,pins =
279 <0 8 0x1 0x0>; /* PA8 periph A */
280 };
281
282 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
283 atmel,pins =
284 <0 7 0x1 0x1 /* PA7 periph A with pullup */
285 0 6 0x1 0x1>; /* PA6 periph A with pullup */
286 };
287
288 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
289 atmel,pins =
290 <0 9 0x1 0x1 /* PA9 periph A with pullup */
291 0 10 0x1 0x1 /* PA10 periph A with pullup */
292 0 11 0x1 0x1>; /* PA11 periph A with pullup */
293 };
294
295 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
296 atmel,pins =
297 <0 1 0x2 0x1 /* PA1 periph B with pullup */
298 0 0 0x2 0x1>; /* PA0 periph B with pullup */
299 };
300
301 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
302 atmel,pins =
303 <0 5 0x2 0x1 /* PA5 periph B with pullup */
304 0 4 0x2 0x1 /* PA4 periph B with pullup */
305 0 3 0x2 0x1>; /* PA3 periph B with pullup */
306 };
307 };
308
544ae6b2
BS		 309 ssc0 {
310 pinctrl_ssc0_tx: ssc0_tx-0 {
311 atmel,pins =
312 <1 16 0x1 0x0 /* PB16 periph A */
313 1 17 0x1 0x0 /* PB17 periph A */
314 1 18 0x1 0x0>; /* PB18 periph A */
315 };
316
317 pinctrl_ssc0_rx: ssc0_rx-0 {
318 atmel,pins =
319 <1 19 0x1 0x0 /* PB19 periph A */
320 1 20 0x1 0x0 /* PB20 periph A */
321 1 21 0x1 0x0>; /* PB21 periph A */
322 };
323 };
324
a68b728f
WY		 325 spi0 {
326 pinctrl_spi0: spi0-0 {
327 atmel,pins =
328 <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
329 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
330 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
331 };
332 };
333
334 spi1 {
335 pinctrl_spi1: spi1-0 {
336 atmel,pins =
337 <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
338 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
339 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
340 };
341 };
342
e4541ff2
JCPV		 343 pioA: gpio@fffff400 {
344 compatible = "atmel,at91rm9200-gpio";
345 reg = <0xfffff400 0x200>;
346 interrupts = <2 4 1>;
347 #gpio-cells = <2>;
348 gpio-controller;
349 interrupt-controller;
350 #interrupt-cells = <2>;
351 };
352
353 pioB: gpio@fffff600 {
354 compatible = "atmel,at91rm9200-gpio";
355 reg = <0xfffff600 0x200>;
356 interrupts = <3 4 1>;
357 #gpio-cells = <2>;
358 gpio-controller;
359 interrupt-controller;
360 #interrupt-cells = <2>;
361 };
362
363 pioC: gpio@fffff800 {
364 compatible = "atmel,at91rm9200-gpio";
365 reg = <0xfffff800 0x200>;
366 interrupts = <4 4 1>;
367 #gpio-cells = <2>;
368 gpio-controller;
369 interrupt-controller;
370 #interrupt-cells = <2>;
371 };
5b6089cb
JCPV		 372 };
373
374 dbgu: serial@fffff200 {
375 compatible = "atmel,at91sam9260-usart";
376 reg = <0xfffff200 0x200>;
f8a073ee 377 interrupts = <1 4 7>;
ec6754a7
JCPV		 378 pinctrl-names = "default";
379 pinctrl-0 = <&pinctrl_dbgu>;
5b6089cb
JCPV		 380 status = "disabled";
381 };
382
383 usart0: serial@fffb0000 {
384 compatible = "atmel,at91sam9260-usart";
385 reg = <0xfffb0000 0x200>;
f8a073ee 386 interrupts = <6 4 5>;
5b6089cb
JCPV		 387 atmel,use-dma-rx;
388 atmel,use-dma-tx;
ec6754a7 389 pinctrl-names = "default";
9e3129e9 390 pinctrl-0 = <&pinctrl_usart0>;
5b6089cb
JCPV		 391 status = "disabled";
392 };
393
394 usart1: serial@fffb4000 {
395 compatible = "atmel,at91sam9260-usart";
396 reg = <0xfffb4000 0x200>;
f8a073ee 397 interrupts = <7 4 5>;
5b6089cb
JCPV		 398 atmel,use-dma-rx;
399 atmel,use-dma-tx;
ec6754a7 400 pinctrl-names = "default";
9e3129e9 401 pinctrl-0 = <&pinctrl_usart1>;
5b6089cb
JCPV		 402 status = "disabled";
403 };
404
405 usart2: serial@fffb8000 {
406 compatible = "atmel,at91sam9260-usart";
407 reg = <0xfffb8000 0x200>;
f8a073ee 408 interrupts = <8 4 5>;
5b6089cb
JCPV		 409 atmel,use-dma-rx;
410 atmel,use-dma-tx;
ec6754a7 411 pinctrl-names = "default";
9e3129e9 412 pinctrl-0 = <&pinctrl_usart2>;
5b6089cb
JCPV		 413 status = "disabled";
414 };
415
416 usart3: serial@fffd0000 {
417 compatible = "atmel,at91sam9260-usart";
418 reg = <0xfffd0000 0x200>;
f8a073ee 419 interrupts = <23 4 5>;
5b6089cb
JCPV		 420 atmel,use-dma-rx;
421 atmel,use-dma-tx;
ec6754a7 422 pinctrl-names = "default";
9e3129e9 423 pinctrl-0 = <&pinctrl_usart3>;
5b6089cb
JCPV		 424 status = "disabled";
425 };
426
9e3129e9 427 uart0: serial@fffd4000 {
5b6089cb
JCPV		 428 compatible = "atmel,at91sam9260-usart";
429 reg = <0xfffd4000 0x200>;
f8a073ee 430 interrupts = <24 4 5>;
5b6089cb
JCPV		 431 atmel,use-dma-rx;
432 atmel,use-dma-tx;
ec6754a7 433 pinctrl-names = "default";
9e3129e9 434 pinctrl-0 = <&pinctrl_uart0>;
5b6089cb
JCPV		 435 status = "disabled";
436 };
437
9e3129e9 438 uart1: serial@fffd8000 {
5b6089cb
JCPV		 439 compatible = "atmel,at91sam9260-usart";
440 reg = <0xfffd8000 0x200>;
f8a073ee 441 interrupts = <25 4 5>;
5b6089cb
JCPV		 442 atmel,use-dma-rx;
443 atmel,use-dma-tx;
ec6754a7 444 pinctrl-names = "default";
9e3129e9 445 pinctrl-0 = <&pinctrl_uart1>;
5b6089cb
JCPV		 446 status = "disabled";
447 };
448
449 macb0: ethernet@fffc4000 {
450 compatible = "cdns,at32ap7000-macb", "cdns,macb";
451 reg = <0xfffc4000 0x100>;
f8a073ee 452 interrupts = <21 4 3>;
d9b4fe83
JCPV		 453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_macb_rmii>;
5b6089cb
JCPV		 455 status = "disabled";
456 };
457
458 usb1: gadget@fffa4000 {
459 compatible = "atmel,at91rm9200-udc";
460 reg = <0xfffa4000 0x4000>;
f8a073ee 461 interrupts = <10 4 2>;
5b6089cb
JCPV		 462 status = "disabled";
463 };
73d68d91 464
05dcd361
LD		 465 i2c0: i2c@fffac000 {
466 compatible = "atmel,at91sam9260-i2c";
467 reg = <0xfffac000 0x100>;
468 interrupts = <11 4 6>;
469 #address-cells = <1>;
470 #size-cells = <0>;
471 status = "disabled";
472 };
473
9873137a
LD		 474 mmc0: mmc@fffa8000 {
475 compatible = "atmel,hsmci";
476 reg = <0xfffa8000 0x600>;
477 interrupts = <9 4 0>;
478 #address-cells = <1>;
479 #size-cells = <0>;
480 status = "disabled";
481 };
482
099343c6
BS		 483 ssc0: ssc@fffbc000 {
484 compatible = "atmel,at91rm9200-ssc";
485 reg = <0xfffbc000 0x4000>;
486 interrupts = <14 4 5>;
544ae6b2
BS		 487 pinctrl-names = "default";
488 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
046e7d68 489 status = "disabled";
099343c6
BS		 490 };
491
d50f88a0
RG		 492 spi0: spi@fffc8000 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "atmel,at91rm9200-spi";
496 reg = <0xfffc8000 0x200>;
497 interrupts = <12 4 3>;
a68b728f
WY		 498 pinctrl-names = "default";
499 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 500 status = "disabled";
501 };
502
503 spi1: spi@fffcc000 {
504 #address-cells = <1>;
505 #size-cells = <0>;
506 compatible = "atmel,at91rm9200-spi";
507 reg = <0xfffcc000 0x200>;
508 interrupts = <13 4 3>;
a68b728f
WY		 509 pinctrl-names = "default";
510 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG		 511 status = "disabled";
512 };
513
73d68d91
NF		 514 adc0: adc@fffe0000 {
515 compatible = "atmel,at91sam9260-adc";
516 reg = <0xfffe0000 0x100>;
f8a073ee 517 interrupts = <5 4 0>;
73d68d91
NF		 518 atmel,adc-use-external-triggers;
519 atmel,adc-channels-used = <0xf>;
520 atmel,adc-vref = <3300>;
521 atmel,adc-num-channels = <4>;
522 atmel,adc-startup-time = <15>;
523 atmel,adc-channel-base = <0x30>;
524 atmel,adc-drdy-mask = <0x10000>;
525 atmel,adc-status-register = <0x1c>;
526 atmel,adc-trigger-register = <0x04>;
4b50da65
LD		 527 atmel,adc-res = <8 10>;
528 atmel,adc-res-names = "lowres", "highres";
529 atmel,adc-use-res = "highres";
73d68d91
NF		 530
531 trigger@0 {
532 trigger-name = "timer-counter-0";
533 trigger-value = <0x1>;
534 };
535 trigger@1 {
536 trigger-name = "timer-counter-1";
537 trigger-value = <0x3>;
538 };
539
540 trigger@2 {
541 trigger-name = "timer-counter-2";
542 trigger-value = <0x5>;
543 };
544
545 trigger@3 {
546 trigger-name = "external";
547 trigger-value = <0x13>;
548 trigger-external;
549 };
550 };
7492e7ca
FP		 551
552 watchdog@fffffd40 {
553 compatible = "atmel,at91sam9260-wdt";
554 reg = <0xfffffd40 0x10>;
555 status = "disabled";
556 };
5b6089cb
JCPV		 557 };
558
559 nand0: nand@40000000 {
560 compatible = "atmel,at91rm9200-nand";
561 #address-cells = <1>;
562 #size-cells = <1>;
563 reg = <0x40000000 0x10000000
564 0xffffe800 0x200
565 >;
566 atmel,nand-addr-offset = <21>;
567 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 568 pinctrl-names = "default";
569 pinctrl-0 = <&pinctrl_nand>;
5b6089cb
JCPV		 570 gpios = <&pioC 13 0
571 &pioC 14 0
572 0
573 >;
574 status = "disabled";
575 };
576
577 usb0: ohci@00500000 {
578 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
579 reg = <0x00500000 0x100000>;
f8a073ee 580 interrupts = <20 4 2>;
5b6089cb
JCPV		 581 status = "disabled";
582 };
583 };
584
585 i2c@0 {
586 compatible = "i2c-gpio";
587 gpios = <&pioA 23 0 /* sda */
588 &pioA 24 0 /* scl */
589 >;
590 i2c-gpio,sda-open-drain;
591 i2c-gpio,scl-open-drain;
592 i2c-gpio,delay-us = <2>; /* ~100 kHz */
593 #address-cells = <1>;
594 #size-cells = <0>;
595 status = "disabled";
596 };
597};
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