[deliverable/linux.git] / arch / arm / boot / dts / at91sam9263.dtsi

/*
 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
 *
 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 only.
 */

#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Atmel AT91SAM9263 family SoC";
	compatible = "atmel,at91sam9263";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		i2c0 = &i2c0;
		ssc0 = &ssc0;
		ssc1 = &ssc1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x08000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <30 31>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			ramc: ramc@ffffe200 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffe200 0x200
				       0xffffe800 0x200>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9260-rstc";
				reg = <0xfffffd00 0x10>;
			};

			shdwc@fffffd10 {
				compatible = "atmel,at91sam9260-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

				atmel,mux-mask = <
				      /*    A         B     */
				       0xfffffffb 0xffffe07f  /* pioA */
				       0x0007ffff 0x39072fff  /* pioB */
				       0xffffffff 0x3ffffff8  /* pioC */
				       0xfffffbff 0xffffffff  /* pioD */
				       0xffe00fff 0xfbfcff00  /* pioE */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC30 periph A */
							 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PC31 periph with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA26 periph A with pullup */
							 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA27 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA28 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA29 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PD0 periph A with pullup */
							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD1 periph A */
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD7 periph B */
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD8 periph B */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PD2 periph A with pullup */
							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD3 periph A */
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD5 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD6 periph B */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PA22 gpio RDY pin pull_up*/
							 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD15 gpio enable pin pull_up */
					};
				};

				macb {
					pinctrl_macb_rmii: macb_rmii-0 {
						atmel,pins =
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
					};

					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
						atmel,pins =
							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC20 periph B */
							 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC21 periph B */
							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC22 periph B */
							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC23 periph B */
							 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC24 periph B */
							 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC27 periph B */
							 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PE22 periph B */
					};
				};

				mmc0 {
					pinctrl_mmc0_clk: mmc0_clk-0 {
						atmel,pins =
							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA12 periph A */
					};

					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA0 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
					};

					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA17 periph A with pullup */
					};

					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
					};
				};

				mmc1 {
					pinctrl_mmc1_clk: mmc1_clk-0 {
						atmel,pins =
							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
					};

					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA8 periph A with pullup */
					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
					};

					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA21 periph A with pullup */
							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA22 periph A with pullup */
					};

					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA23 periph A with pullup */
							 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA25 periph A with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB0 periph B */
							 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB1 periph B */
							 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB3 periph B */
							 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B */
							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B */
					};
				};

				ssc1 {
					pinctrl_ssc1_tx: ssc1_tx-0 {
						atmel,pins =
							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
							 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
					};

					pinctrl_ssc1_rx: ssc1_rx-0 {
						atmel,pins =
							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB10 periph A */
							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA0 periph B SPI0_MISO pin */
							 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA1 periph B SPI0_MOSI pin */
							 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA2 periph B SPI0_SPCK pin */
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A SPI1_MISO pin */
							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A SPI1_MOSI pin */
							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A SPI1_SPCK pin */
					};
				};

				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			ssc0: ssc@fff98000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfff98000 0x4000>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

			ssc1: ssc@fff9c000 {
				compatible = "atmel,at91rm9200-ssc";
				reg = <0xfff9c000 0x4000>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb_rmii>;
				status = "disabled";
			};

			usb1: gadget@fff78000 {
				compatible = "atmel,at91rm9200-udc";
				reg = <0xfff78000 0x4000>;
				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
				status = "disabled";
			};

			i2c0: i2c@fff88000 {
				compatible = "atmel,at91sam9263-i2c";
				reg = <0xfff88000 0x100>;
				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc0: mmc@fff80000 {
				compatible = "atmel,hsmci";
				reg = <0xfff80000 0x600>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@fff84000 {
				compatible = "atmel,hsmci";
				reg = <0xfff84000 0x600>;
				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			watchdog@fffffd40 {
				compatible = "atmel,at91sam9260-wdt";
				reg = <0xfffffd40 0x10>;
				status = "disabled";
			};

			spi0: spi@fffa4000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa4000 0x200>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				status = "disabled";
			};

			spi1: spi@fffa8000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xfffa8000 0x200>;
				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe000 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioA 22 GPIO_ACTIVE_HIGH
				 &pioD 15 GPIO_ACTIVE_HIGH
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00a00000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00a00000 0x100000>;
			interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
4abb3677 JCPV	1	/*
	2	* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
	3	*
	4	* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
	5	*
	6	* Licensed under GPLv2 only.
	7	*/
	8
6db64d29	9	#include "skeleton.dtsi"
c9d0f317	10	#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3	11	#include <dt-bindings/interrupt-controller/irq.h>
92f8629b	12	#include <dt-bindings/gpio/gpio.h>
4abb3677 JCPV	13
	14	/ {
	15	model = "Atmel AT91SAM9263 family SoC";
	16	compatible = "atmel,at91sam9263";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	gpio0 = &pioA;
	25	gpio1 = &pioB;
	26	gpio2 = &pioC;
	27	gpio3 = &pioD;
	28	gpio4 = &pioE;
	29	tcb0 = &tcb0;
05dcd361	30	i2c0 = &i2c0;
099343c6 BS	31	ssc0 = &ssc0;
099343c6 BS	32	ssc1 = &ssc1;
4abb3677 JCPV	33	};
	34	cpus {
	35	cpu@0 {
	36	compatible = "arm,arm926ejs";
	37	};
	38	};
	39
	40	memory {
	41	reg = <0x20000000 0x08000000>;
	42	};
	43
	44	ahb {
	45	compatible = "simple-bus";
	46	#address-cells = <1>;
	47	#size-cells = <1>;
	48	ranges;
	49
	50	apb {
	51	compatible = "simple-bus";
	52	#address-cells = <1>;
	53	#size-cells = <1>;
	54	ranges;
	55
	56	aic: interrupt-controller@fffff000 {
f8a073ee	57	#interrupt-cells = <3>;
4abb3677 JCPV	58	compatible = "atmel,at91rm9200-aic";
	59	interrupt-controller;
	60	reg = <0xfffff000 0x200>;
c6573943	61	atmel,external-irqs = <30 31>;
4abb3677 JCPV	62	};
	63
	64	pmc: pmc@fffffc00 {
	65	compatible = "atmel,at91rm9200-pmc";
	66	reg = <0xfffffc00 0x100>;
	67	};
	68
	69	ramc: ramc@ffffe200 {
	70	compatible = "atmel,at91sam9260-sdramc";
	71	reg = <0xffffe200 0x200
	72	0xffffe800 0x200>;
	73	};
	74
	75	pit: timer@fffffd30 {
	76	compatible = "atmel,at91sam9260-pit";
	77	reg = <0xfffffd30 0xf>;
5e8b3bc3	78	interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
4abb3677 JCPV	79	};
	80
	81	tcb0: timer@fff7c000 {
	82	compatible = "atmel,at91rm9200-tcb";
	83	reg = <0xfff7c000 0x100>;
5e8b3bc3	84	interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
4abb3677 JCPV	85	};
	86
	87	rstc@fffffd00 {
	88	compatible = "atmel,at91sam9260-rstc";
	89	reg = <0xfffffd00 0x10>;
	90	};
	91
	92	shdwc@fffffd10 {
	93	compatible = "atmel,at91sam9260-shdwc";
	94	reg = <0xfffffd10 0x10>;
	95	};
	96
e4541ff2 JCPV	97	pinctrl@fffff200 {
	98	#address-cells = <1>;
	99	#size-cells = <1>;
	100	compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
	101	ranges = <0xfffff200 0xfffff200 0xa00>;
	102
5314ec8e JCPV	103	atmel,mux-mask = <
	104	/* A B */
	105	0xfffffffb 0xffffe07f /* pioA */
	106	0x0007ffff 0x39072fff /* pioB */
	107	0xffffffff 0x3ffffff8 /* pioC */
	108	0xfffffbff 0xffffffff /* pioD */
	109	0xffe00fff 0xfbfcff00 /* pioE */
	110	>;
	111
	112	/* shared pinctrl settings */
ec6754a7 JCPV	113	dbgu {
	114	pinctrl_dbgu: dbgu-0 {
	115	atmel,pins =
c9d0f317 JCPV	116	<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
c9d0f317 JCPV	117	AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
ec6754a7 JCPV	118	};
	119	};
	120
9e3129e9 JCPV	121	usart0 {
9e3129e9 JCPV	122	pinctrl_usart0: usart0-0 {
ec6754a7	123	atmel,pins =
c9d0f317 JCPV	124	<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
c9d0f317 JCPV	125	AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
ec6754a7 JCPV	126	};
ec6754a7 JCPV	127
c58c0c5a	128	pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7	129	atmel,pins =
c9d0f317	130	<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
c58c0c5a JCPV	131	};
	132
	133	pinctrl_usart0_cts: usart0_cts-0 {
	134	atmel,pins =
c9d0f317	135	<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
ec6754a7 JCPV	136	};
	137	};
	138
9e3129e9 JCPV	139	usart1 {
9e3129e9 JCPV	140	pinctrl_usart1: usart1-0 {
ec6754a7	141	atmel,pins =
c9d0f317 JCPV	142	<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
c9d0f317 JCPV	143	AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
ec6754a7 JCPV	144	};
ec6754a7 JCPV	145
c58c0c5a	146	pinctrl_usart1_rts: usart1_rts-0 {
ec6754a7	147	atmel,pins =
c9d0f317	148	<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
c58c0c5a JCPV	149	};
	150
	151	pinctrl_usart1_cts: usart1_cts-0 {
	152	atmel,pins =
c9d0f317	153	<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
ec6754a7 JCPV	154	};
	155	};
	156
9e3129e9 JCPV	157	usart2 {
9e3129e9 JCPV	158	pinctrl_usart2: usart2-0 {
ec6754a7	159	atmel,pins =
c9d0f317 JCPV	160	<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
c9d0f317 JCPV	161	AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
ec6754a7 JCPV	162	};
ec6754a7 JCPV	163
c58c0c5a JCPV	164	pinctrl_usart2_rts: usart2_rts-0 {
c58c0c5a JCPV	165	atmel,pins =
c9d0f317	166	<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
c58c0c5a JCPV	167	};
	168
	169	pinctrl_usart2_cts: usart2_cts-0 {
ec6754a7	170	atmel,pins =
c9d0f317	171	<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
ec6754a7 JCPV	172	};
ec6754a7 JCPV	173	};
5314ec8e	174
7a38d450 JCPV	175	nand {
	176	pinctrl_nand: nand-0 {
	177	atmel,pins =
c9d0f317 JCPV	178	<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
c9d0f317 JCPV	179	AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
7a38d450 JCPV	180	};
	181	};
	182
d9b4fe83 JCPV	183	macb {
	184	pinctrl_macb_rmii: macb_rmii-0 {
	185	atmel,pins =
c9d0f317 JCPV	186	<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
	187	AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
	188	AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
	189	AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
	190	AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
	191	AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
	192	AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
	193	AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
	194	AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
	195	AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
d9b4fe83 JCPV	196	};
	197
	198	pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
	199	atmel,pins =
c9d0f317 JCPV	200	<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
	201	AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
	202	AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
	203	AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
	204	AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
	205	AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
	206	AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
	207	AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
d9b4fe83 JCPV	208	};
	209	};
	210
d4fe9ac7 JCPV	211	mmc0 {
	212	pinctrl_mmc0_clk: mmc0_clk-0 {
	213	atmel,pins =
c9d0f317	214	<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
d4fe9ac7 JCPV	215	};
	216
	217	pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
	218	atmel,pins =
c9d0f317 JCPV	219	<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
c9d0f317 JCPV	220	AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
d4fe9ac7 JCPV	221	};
	222
	223	pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
	224	atmel,pins =
c9d0f317 JCPV	225	<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
	226	AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
	227	AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
d4fe9ac7 JCPV	228	};
	229
	230	pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
	231	atmel,pins =
c9d0f317 JCPV	232	<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
c9d0f317 JCPV	233	AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
d4fe9ac7 JCPV	234	};
	235
	236	pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
	237	atmel,pins =
c9d0f317 JCPV	238	<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
	239	AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
	240	AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
d4fe9ac7 JCPV	241	};
	242	};
	243
	244	mmc1 {
	245	pinctrl_mmc1_clk: mmc1_clk-0 {
	246	atmel,pins =
c9d0f317	247	<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
d4fe9ac7 JCPV	248	};
	249
	250	pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
	251	atmel,pins =
c9d0f317 JCPV	252	<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
c9d0f317 JCPV	253	AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
d4fe9ac7 JCPV	254	};
	255
	256	pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
	257	atmel,pins =
c9d0f317 JCPV	258	<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
	259	AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
	260	AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
d4fe9ac7 JCPV	261	};
	262
	263	pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
	264	atmel,pins =
c9d0f317 JCPV	265	<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
c9d0f317 JCPV	266	AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
d4fe9ac7 JCPV	267	};
	268
	269	pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
	270	atmel,pins =
c9d0f317 JCPV	271	<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
	272	AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
	273	AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
d4fe9ac7 JCPV	274	};
	275	};
	276
544ae6b2 BS	277	ssc0 {
	278	pinctrl_ssc0_tx: ssc0_tx-0 {
	279	atmel,pins =
c9d0f317 JCPV	280	<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
	281	AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
	282	AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
544ae6b2 BS	283	};
	284
	285	pinctrl_ssc0_rx: ssc0_rx-0 {
	286	atmel,pins =
c9d0f317 JCPV	287	<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
	288	AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
	289	AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
544ae6b2 BS	290	};
	291	};
	292
	293	ssc1 {
	294	pinctrl_ssc1_tx: ssc1_tx-0 {
	295	atmel,pins =
c9d0f317 JCPV	296	<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
	297	AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
	298	AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
544ae6b2 BS	299	};
	300
	301	pinctrl_ssc1_rx: ssc1_rx-0 {
	302	atmel,pins =
c9d0f317 JCPV	303	<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
	304	AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
	305	AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
544ae6b2 BS	306	};
	307	};
	308
a68b728f WY	309	spi0 {
	310	pinctrl_spi0: spi0-0 {
	311	atmel,pins =
c9d0f317 JCPV	312	<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
	313	AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
	314	AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
a68b728f WY	315	};
	316	};
	317
	318	spi1 {
	319	pinctrl_spi1: spi1-0 {
	320	atmel,pins =
c9d0f317 JCPV	321	<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
	322	AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
	323	AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
a68b728f WY	324	};
	325	};
	326
e4541ff2 JCPV	327	pioA: gpio@fffff200 {
	328	compatible = "atmel,at91rm9200-gpio";
	329	reg = <0xfffff200 0x200>;
5e8b3bc3	330	interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2 JCPV	331	#gpio-cells = <2>;
	332	gpio-controller;
	333	interrupt-controller;
	334	#interrupt-cells = <2>;
	335	};
	336
	337	pioB: gpio@fffff400 {
	338	compatible = "atmel,at91rm9200-gpio";
	339	reg = <0xfffff400 0x200>;
5e8b3bc3	340	interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2 JCPV	341	#gpio-cells = <2>;
	342	gpio-controller;
	343	interrupt-controller;
	344	#interrupt-cells = <2>;
	345	};
	346
	347	pioC: gpio@fffff600 {
	348	compatible = "atmel,at91rm9200-gpio";
	349	reg = <0xfffff600 0x200>;
5e8b3bc3	350	interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2 JCPV	351	#gpio-cells = <2>;
	352	gpio-controller;
	353	interrupt-controller;
	354	#interrupt-cells = <2>;
	355	};
	356
	357	pioD: gpio@fffff800 {
	358	compatible = "atmel,at91rm9200-gpio";
	359	reg = <0xfffff800 0x200>;
5e8b3bc3	360	interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2 JCPV	361	#gpio-cells = <2>;
	362	gpio-controller;
	363	interrupt-controller;
	364	#interrupt-cells = <2>;
	365	};
	366
	367	pioE: gpio@fffffa00 {
	368	compatible = "atmel,at91rm9200-gpio";
	369	reg = <0xfffffa00 0x200>;
5e8b3bc3	370	interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2 JCPV	371	#gpio-cells = <2>;
	372	gpio-controller;
	373	interrupt-controller;
	374	#interrupt-cells = <2>;
5314ec8e	375	};
4abb3677 JCPV	376	};
	377
	378	dbgu: serial@ffffee00 {
	379	compatible = "atmel,at91sam9260-usart";
	380	reg = <0xffffee00 0x200>;
5e8b3bc3	381	interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7 JCPV	382	pinctrl-names = "default";
ec6754a7 JCPV	383	pinctrl-0 = <&pinctrl_dbgu>;
4abb3677 JCPV	384	status = "disabled";
	385	};
	386
	387	usart0: serial@fff8c000 {
	388	compatible = "atmel,at91sam9260-usart";
	389	reg = <0xfff8c000 0x200>;
5e8b3bc3	390	interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
4abb3677 JCPV	391	atmel,use-dma-rx;
4abb3677 JCPV	392	atmel,use-dma-tx;
ec6754a7	393	pinctrl-names = "default";
9e3129e9	394	pinctrl-0 = <&pinctrl_usart0>;
4abb3677 JCPV	395	status = "disabled";
	396	};
	397
	398	usart1: serial@fff90000 {
	399	compatible = "atmel,at91sam9260-usart";
	400	reg = <0xfff90000 0x200>;
5e8b3bc3	401	interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
4abb3677 JCPV	402	atmel,use-dma-rx;
4abb3677 JCPV	403	atmel,use-dma-tx;
ec6754a7	404	pinctrl-names = "default";
9e3129e9	405	pinctrl-0 = <&pinctrl_usart1>;
4abb3677 JCPV	406	status = "disabled";
	407	};
	408
	409	usart2: serial@fff94000 {
	410	compatible = "atmel,at91sam9260-usart";
	411	reg = <0xfff94000 0x200>;
5e8b3bc3	412	interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
4abb3677 JCPV	413	atmel,use-dma-rx;
4abb3677 JCPV	414	atmel,use-dma-tx;
ec6754a7	415	pinctrl-names = "default";
9e3129e9	416	pinctrl-0 = <&pinctrl_usart2>;
4abb3677 JCPV	417	status = "disabled";
	418	};
	419
099343c6 BS	420	ssc0: ssc@fff98000 {
	421	compatible = "atmel,at91rm9200-ssc";
	422	reg = <0xfff98000 0x4000>;
5e8b3bc3	423	interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2 BS	424	pinctrl-names = "default";
544ae6b2 BS	425	pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc	426	status = "disabled";
099343c6 BS	427	};
	428
	429	ssc1: ssc@fff9c000 {
	430	compatible = "atmel,at91rm9200-ssc";
	431	reg = <0xfff9c000 0x4000>;
5e8b3bc3	432	interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2 BS	433	pinctrl-names = "default";
544ae6b2 BS	434	pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc	435	status = "disabled";
099343c6 BS	436	};
099343c6 BS	437
4abb3677 JCPV	438	macb0: ethernet@fffbc000 {
	439	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	440	reg = <0xfffbc000 0x100>;
5e8b3bc3	441	interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83 JCPV	442	pinctrl-names = "default";
d9b4fe83 JCPV	443	pinctrl-0 = <&pinctrl_macb_rmii>;
4abb3677 JCPV	444	status = "disabled";
	445	};
	446
	447	usb1: gadget@fff78000 {
	448	compatible = "atmel,at91rm9200-udc";
	449	reg = <0xfff78000 0x4000>;
5e8b3bc3	450	interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
4abb3677 JCPV	451	status = "disabled";
4abb3677 JCPV	452	};
05dcd361 LD	453
	454	i2c0: i2c@fff88000 {
	455	compatible = "atmel,at91sam9263-i2c";
	456	reg = <0xfff88000 0x100>;
5e8b3bc3	457	interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361 LD	458	#address-cells = <1>;
	459	#size-cells = <0>;
	460	status = "disabled";
	461	};
9873137a LD	462
	463	mmc0: mmc@fff80000 {
	464	compatible = "atmel,hsmci";
	465	reg = <0xfff80000 0x600>;
5e8b3bc3	466	interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
9873137a LD	467	#address-cells = <1>;
	468	#size-cells = <0>;
	469	status = "disabled";
	470	};
	471
	472	mmc1: mmc@fff84000 {
	473	compatible = "atmel,hsmci";
	474	reg = <0xfff84000 0x600>;
5e8b3bc3	475	interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
9873137a LD	476	#address-cells = <1>;
	477	#size-cells = <0>;
	478	status = "disabled";
	479	};
db5b0ae0	480
7492e7ca FP	481	watchdog@fffffd40 {
	482	compatible = "atmel,at91sam9260-wdt";
	483	reg = <0xfffffd40 0x10>;
	484	status = "disabled";
	485	};
d50f88a0 RG	486
	487	spi0: spi@fffa4000 {
	488	#address-cells = <1>;
	489	#size-cells = <0>;
	490	compatible = "atmel,at91rm9200-spi";
	491	reg = <0xfffa4000 0x200>;
5e8b3bc3	492	interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f WY	493	pinctrl-names = "default";
a68b728f WY	494	pinctrl-0 = <&pinctrl_spi0>;
d50f88a0 RG	495	status = "disabled";
	496	};
	497
	498	spi1: spi@fffa8000 {
	499	#address-cells = <1>;
	500	#size-cells = <0>;
	501	compatible = "atmel,at91rm9200-spi";
	502	reg = <0xfffa8000 0x200>;
5e8b3bc3	503	interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f WY	504	pinctrl-names = "default";
a68b728f WY	505	pinctrl-0 = <&pinctrl_spi1>;
d50f88a0 RG	506	status = "disabled";
d50f88a0 RG	507	};
4abb3677 JCPV	508	};
	509
	510	nand0: nand@40000000 {
	511	compatible = "atmel,at91rm9200-nand";
	512	#address-cells = <1>;
	513	#size-cells = <1>;
	514	reg = <0x40000000 0x10000000
	515	0xffffe000 0x200
	516	>;
	517	atmel,nand-addr-offset = <21>;
	518	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	519	pinctrl-names = "default";
7a38d450 JCPV	520	pinctrl-0 = <&pinctrl_nand>;
92f8629b JCPV	521	gpios = <&pioA 22 GPIO_ACTIVE_HIGH
92f8629b JCPV	522	&pioD 15 GPIO_ACTIVE_HIGH
4abb3677 JCPV	523	0
	524	>;
	525	status = "disabled";
	526	};
	527
	528	usb0: ohci@00a00000 {
	529	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	530	reg = <0x00a00000 0x100000>;
5e8b3bc3	531	interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
4abb3677 JCPV	532	status = "disabled";
	533	};
	534	};
	535
	536	i2c@0 {
	537	compatible = "i2c-gpio";
92f8629b JCPV	538	gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
92f8629b JCPV	539	&pioB 5 GPIO_ACTIVE_HIGH /* scl */
4abb3677 JCPV	540	>;
	541	i2c-gpio,sda-open-drain;
	542	i2c-gpio,scl-open-drain;
	543	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	544	#address-cells = <1>;
	545	#size-cells = <0>;
	546	status = "disabled";
	547	};
	548	};