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ARM: at91: prepare common clk transition for sam9g45
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
CommitLineData
49fe2ba3
NF		 1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
d4ae89c8 13#include <dt-bindings/dma/at91.h>
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
49fe2ba3
NF		 17
18/ {
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
21f81872
NF		 29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 gpio3 = &pioD;
33 gpio4 = &pioE;
3a61a5da
NF		 34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
05dcd361
LD		 36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
099343c6
BS		 38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
f3ab0527 40 pwm0 = &pwm0;
49fe2ba3
NF		 41 };
42 cpus {
e757a6ee
LP		 43 #address-cells = <0>;
44 #size-cells = <0>;
45
46 cpu {
47 compatible = "arm,arm926ej-s";
48 device_type = "cpu";
49fe2ba3
NF		 49 };
50 };
51
dcce6ce8 52 memory {
49fe2ba3
NF		 53 reg = <0x70000000 0x10000000>;
54 };
55
56 ahb {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <1>;
60 ranges;
61
62 apb {
63 compatible = "simple-bus";
64 #address-cells = <1>;
65 #size-cells = <1>;
66 ranges;
67
68 aic: interrupt-controller@fffff000 {
f8a073ee 69 #interrupt-cells = <3>;
49fe2ba3
NF		 70 compatible = "atmel,at91rm9200-aic";
71 interrupt-controller;
49fe2ba3 72 reg = <0xfffff000 0x200>;
c6573943 73 atmel,external-irqs = <31>;
49fe2ba3
NF		 74 };
75
a7776ec6
JCPV		 76 ramc0: ramc@ffffe400 {
77 compatible = "atmel,at91sam9g45-ddramc";
78 reg = <0xffffe400 0x200
79 0xffffe600 0x200>;
80 };
81
eb5e76ff
JCPV		 82 pmc: pmc@fffffc00 {
83 compatible = "atmel,at91rm9200-pmc";
84 reg = <0xfffffc00 0x100>;
85 };
86
c8082d34
JCPV		 87 rstc@fffffd00 {
88 compatible = "atmel,at91sam9g45-rstc";
89 reg = <0xfffffd00 0x10>;
90 };
91
23fa648f
JCPV		 92 pit: timer@fffffd30 {
93 compatible = "atmel,at91sam9260-pit";
94 reg = <0xfffffd30 0xf>;
5e8b3bc3 95 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
23fa648f
JCPV		 96 };
97
3a61a5da 98
82015c4e
JCPV		 99 shdwc@fffffd10 {
100 compatible = "atmel,at91sam9rl-shdwc";
101 reg = <0xfffffd10 0x10>;
102 };
103
3a61a5da
NF		 104 tcb0: timer@fff7c000 {
105 compatible = "atmel,at91rm9200-tcb";
106 reg = <0xfff7c000 0x100>;
5e8b3bc3 107 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 108 };
109
110 tcb1: timer@fffd4000 {
111 compatible = "atmel,at91rm9200-tcb";
112 reg = <0xfffd4000 0x100>;
5e8b3bc3 113 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 114 };
115
49fe2ba3
NF		 116 dma: dma-controller@ffffec00 {
117 compatible = "atmel,at91sam9g45-dma";
118 reg = <0xffffec00 0x200>;
5e8b3bc3 119 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 120 #dma-cells = <2>;
49fe2ba3
NF		 121 };
122
e4541ff2
JCPV		 123 pinctrl@fffff200 {
124 #address-cells = <1>;
125 #size-cells = <1>;
126 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
127 ranges = <0xfffff200 0xfffff200 0xa00>;
128
5314ec8e
JCPV		 129 atmel,mux-mask = <
130 /* A B */
131 0xffffffff 0xffc003ff /* pioA */
132 0xffffffff 0x800f8f00 /* pioB */
133 0xffffffff 0x00000e00 /* pioC */
134 0xffffffff 0xff0c1381 /* pioD */
135 0xffffffff 0x81ffff81 /* pioE */
136 >;
137
138 /* shared pinctrl settings */
72e6caca
AB		 139 adc0 {
140 pinctrl_adc0_adtrg: adc0_adtrg {
141 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
142 };
143 pinctrl_adc0_ad0: adc0_ad0 {
144 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
145 };
146 pinctrl_adc0_ad1: adc0_ad1 {
147 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
148 };
149 pinctrl_adc0_ad2: adc0_ad2 {
150 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
151 };
152 pinctrl_adc0_ad3: adc0_ad3 {
153 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
154 };
155 pinctrl_adc0_ad4: adc0_ad4 {
156 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
157 };
158 pinctrl_adc0_ad5: adc0_ad5 {
159 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
160 };
161 pinctrl_adc0_ad6: adc0_ad6 {
162 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
163 };
164 pinctrl_adc0_ad7: adc0_ad7 {
165 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
166 };
167 };
168
ec6754a7
JCPV		 169 dbgu {
170 pinctrl_dbgu: dbgu-0 {
171 atmel,pins =
c9d0f317
JCPV		 172 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
173 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
ec6754a7
JCPV		 174 };
175 };
176
cd127e1d
LD		 177 i2c0 {
178 pinctrl_i2c0: i2c0-0 {
179 atmel,pins =
180 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
181 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
182 };
183 };
184
185 i2c1 {
186 pinctrl_i2c1: i2c1-0 {
187 atmel,pins =
188 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
189 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
190 };
191 };
192
9e3129e9
JCPV		 193 usart0 {
194 pinctrl_usart0: usart0-0 {
ec6754a7 195 atmel,pins =
c9d0f317
JCPV		 196 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
197 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
ec6754a7
JCPV		 198 };
199
c58c0c5a 200 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 201 atmel,pins =
c9d0f317 202 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
c58c0c5a
JCPV		 203 };
204
205 pinctrl_usart0_cts: usart0_cts-0 {
206 atmel,pins =
c9d0f317 207 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
ec6754a7
JCPV		 208 };
209 };
210
211 uart1 {
9e3129e9 212 pinctrl_usart1: usart1-0 {
ec6754a7 213 atmel,pins =
c9d0f317
JCPV		 214 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
215 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
ec6754a7
JCPV		 216 };
217
c58c0c5a
JCPV		 218 pinctrl_usart1_rts: usart1_rts-0 {
219 atmel,pins =
c9d0f317 220 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
c58c0c5a
JCPV		 221 };
222
223 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 224 atmel,pins =
c9d0f317 225 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
ec6754a7
JCPV		 226 };
227 };
228
9e3129e9
JCPV		 229 usart2 {
230 pinctrl_usart2: usart2-0 {
ec6754a7 231 atmel,pins =
c9d0f317
JCPV		 232 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
233 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
ec6754a7
JCPV		 234 };
235
c58c0c5a 236 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 237 atmel,pins =
c9d0f317 238 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
c58c0c5a
JCPV		 239 };
240
241 pinctrl_usart2_cts: usart2_cts-0 {
242 atmel,pins =
c9d0f317 243 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
ec6754a7
JCPV		 244 };
245 };
246
9e3129e9
JCPV		 247 usart3 {
248 pinctrl_usart3: usart3-0 {
ec6754a7 249 atmel,pins =
c9d0f317
JCPV		 250 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
251 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
ec6754a7
JCPV		 252 };
253
c58c0c5a
JCPV		 254 pinctrl_usart3_rts: usart3_rts-0 {
255 atmel,pins =
c9d0f317 256 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
c58c0c5a
JCPV		 257 };
258
259 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 260 atmel,pins =
c9d0f317 261 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
ec6754a7
JCPV		 262 };
263 };
5314ec8e 264
7a38d450
JCPV		 265 nand {
266 pinctrl_nand: nand-0 {
267 atmel,pins =
c9d0f317
JCPV		 268 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
269 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
7a38d450
JCPV		 270 };
271 };
272
d9b4fe83
JCPV		 273 macb {
274 pinctrl_macb_rmii: macb_rmii-0 {
275 atmel,pins =
c9d0f317
JCPV		 276 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
277 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
278 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
279 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
280 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
281 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
282 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
283 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
284 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
285 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
d9b4fe83
JCPV		 286 };
287
288 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
289 atmel,pins =
c9d0f317
JCPV		 290 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
291 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
292 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
293 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
294 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
295 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
296 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
297 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
d9b4fe83
JCPV		 298 };
299 };
300
d4fe9ac7
JCPV		 301 mmc0 {
302 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
303 atmel,pins =
c9d0f317
JCPV		 304 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
305 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
306 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
d4fe9ac7
JCPV		 307 };
308
309 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
310 atmel,pins =
c9d0f317
JCPV		 311 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
312 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
313 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
d4fe9ac7
JCPV		 314 };
315
316 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
317 atmel,pins =
c9d0f317
JCPV		 318 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
319 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
320 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
321 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
d4fe9ac7
JCPV		 322 };
323 };
324
325 mmc1 {
326 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
327 atmel,pins =
c9d0f317
JCPV		 328 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
329 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
330 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
d4fe9ac7
JCPV		 331 };
332
333 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
334 atmel,pins =
c9d0f317
JCPV		 335 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
336 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
337 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
d4fe9ac7
JCPV		 338 };
339
340 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
341 atmel,pins =
c9d0f317
JCPV		 342 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
343 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
344 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
345 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
d4fe9ac7
JCPV		 346 };
347 };
348
544ae6b2
BS		 349 ssc0 {
350 pinctrl_ssc0_tx: ssc0_tx-0 {
351 atmel,pins =
c9d0f317
JCPV		 352 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
353 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
354 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
544ae6b2
BS		 355 };
356
357 pinctrl_ssc0_rx: ssc0_rx-0 {
358 atmel,pins =
c9d0f317
JCPV		 359 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
360 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
361 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
544ae6b2
BS		 362 };
363 };
364
365 ssc1 {
366 pinctrl_ssc1_tx: ssc1_tx-0 {
367 atmel,pins =
c9d0f317
JCPV		 368 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
369 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
370 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
544ae6b2
BS		 371 };
372
373 pinctrl_ssc1_rx: ssc1_rx-0 {
374 atmel,pins =
c9d0f317
JCPV		 375 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
376 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
377 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
544ae6b2
BS		 378 };
379 };
380
a68b728f
WY		 381 spi0 {
382 pinctrl_spi0: spi0-0 {
383 atmel,pins =
c9d0f317
JCPV		 384 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
385 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
386 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
a68b728f
WY		 387 };
388 };
389
390 spi1 {
391 pinctrl_spi1: spi1-0 {
392 atmel,pins =
c9d0f317
JCPV		 393 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
394 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
395 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
a68b728f
WY		 396 };
397 };
398
028633c2
BB		 399 tcb0 {
400 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
401 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
402 };
403
404 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
405 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
406 };
407
408 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
409 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
410 };
411
412 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
413 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
414 };
415
416 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
417 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
418 };
419
420 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
421 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
422 };
423
424 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
425 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
426 };
427
428 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
429 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
433 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
434 };
435 };
436
437 tcb1 {
438 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
439 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
440 };
441
442 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
443 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
444 };
445
446 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
447 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 };
449
450 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
451 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
452 };
453
454 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
455 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
456 };
457
458 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
459 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
460 };
461
462 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
463 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464 };
465
466 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
467 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 };
469
470 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
471 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 };
473 };
474
ddee65b3
JCPV		 475 fb {
476 pinctrl_fb: fb-0 {
477 atmel,pins =
478 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
479 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
480 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
481 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
482 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
483 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
484 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
485 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
486 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
487 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
488 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
489 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
490 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
491 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
492 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
493 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
494 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
495 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
496 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
497 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
498 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
499 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
500 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
501 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
502 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
503 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
504 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
505 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
506 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
507 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
508 };
509 };
510
e4541ff2
JCPV		 511 pioA: gpio@fffff200 {
512 compatible = "atmel,at91rm9200-gpio";
513 reg = <0xfffff200 0x200>;
5e8b3bc3 514 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 515 #gpio-cells = <2>;
516 gpio-controller;
517 interrupt-controller;
518 #interrupt-cells = <2>;
519 };
520
521 pioB: gpio@fffff400 {
522 compatible = "atmel,at91rm9200-gpio";
523 reg = <0xfffff400 0x200>;
5e8b3bc3 524 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 525 #gpio-cells = <2>;
526 gpio-controller;
527 interrupt-controller;
528 #interrupt-cells = <2>;
529 };
530
531 pioC: gpio@fffff600 {
532 compatible = "atmel,at91rm9200-gpio";
533 reg = <0xfffff600 0x200>;
5e8b3bc3 534 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 535 #gpio-cells = <2>;
536 gpio-controller;
537 interrupt-controller;
538 #interrupt-cells = <2>;
539 };
540
541 pioD: gpio@fffff800 {
542 compatible = "atmel,at91rm9200-gpio";
543 reg = <0xfffff800 0x200>;
5e8b3bc3 544 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 545 #gpio-cells = <2>;
546 gpio-controller;
547 interrupt-controller;
548 #interrupt-cells = <2>;
549 };
550
551 pioE: gpio@fffffa00 {
552 compatible = "atmel,at91rm9200-gpio";
553 reg = <0xfffffa00 0x200>;
5e8b3bc3 554 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 555 #gpio-cells = <2>;
556 gpio-controller;
557 interrupt-controller;
558 #interrupt-cells = <2>;
559 };
21f81872
NF		 560 };
561
49fe2ba3
NF		 562 dbgu: serial@ffffee00 {
563 compatible = "atmel,at91sam9260-usart";
564 reg = <0xffffee00 0x200>;
5e8b3bc3 565 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 566 pinctrl-names = "default";
567 pinctrl-0 = <&pinctrl_dbgu>;
49fe2ba3
NF		 568 status = "disabled";
569 };
570
571 usart0: serial@fff8c000 {
572 compatible = "atmel,at91sam9260-usart";
573 reg = <0xfff8c000 0x200>;
5e8b3bc3 574 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 575 atmel,use-dma-rx;
576 atmel,use-dma-tx;
ec6754a7 577 pinctrl-names = "default";
9e3129e9 578 pinctrl-0 = <&pinctrl_usart0>;
49fe2ba3
NF		 579 status = "disabled";
580 };
581
582 usart1: serial@fff90000 {
583 compatible = "atmel,at91sam9260-usart";
584 reg = <0xfff90000 0x200>;
5e8b3bc3 585 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 586 atmel,use-dma-rx;
587 atmel,use-dma-tx;
ec6754a7 588 pinctrl-names = "default";
9e3129e9 589 pinctrl-0 = <&pinctrl_usart1>;
49fe2ba3
NF		 590 status = "disabled";
591 };
592
593 usart2: serial@fff94000 {
594 compatible = "atmel,at91sam9260-usart";
595 reg = <0xfff94000 0x200>;
5e8b3bc3 596 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 597 atmel,use-dma-rx;
598 atmel,use-dma-tx;
ec6754a7 599 pinctrl-names = "default";
9e3129e9 600 pinctrl-0 = <&pinctrl_usart2>;
49fe2ba3
NF		 601 status = "disabled";
602 };
603
604 usart3: serial@fff98000 {
605 compatible = "atmel,at91sam9260-usart";
606 reg = <0xfff98000 0x200>;
5e8b3bc3 607 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 608 atmel,use-dma-rx;
609 atmel,use-dma-tx;
ec6754a7 610 pinctrl-names = "default";
9e3129e9 611 pinctrl-0 = <&pinctrl_usart3>;
49fe2ba3
NF		 612 status = "disabled";
613 };
0d4f99d8
NF		 614
615 macb0: ethernet@fffbc000 {
616 compatible = "cdns,at32ap7000-macb", "cdns,macb";
617 reg = <0xfffbc000 0x100>;
5e8b3bc3 618 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_macb_rmii>;
0d4f99d8
NF		 621 status = "disabled";
622 };
93b298ba 623
05dcd361
LD		 624 i2c0: i2c@fff84000 {
625 compatible = "atmel,at91sam9g10-i2c";
626 reg = <0xfff84000 0x100>;
5e8b3bc3 627 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
cd127e1d
LD		 628 pinctrl-names = "default";
629 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 630 #address-cells = <1>;
631 #size-cells = <0>;
632 status = "disabled";
633 };
634
635 i2c1: i2c@fff88000 {
636 compatible = "atmel,at91sam9g10-i2c";
637 reg = <0xfff88000 0x100>;
5e8b3bc3 638 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
cd127e1d
LD		 639 pinctrl-names = "default";
640 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 641 #address-cells = <1>;
642 #size-cells = <0>;
643 status = "disabled";
644 };
645
099343c6
BS		 646 ssc0: ssc@fff9c000 {
647 compatible = "atmel,at91sam9g45-ssc";
648 reg = <0xfff9c000 0x4000>;
5e8b3bc3 649 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 650 pinctrl-names = "default";
651 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc 652 status = "disabled";
099343c6
BS		 653 };
654
655 ssc1: ssc@fffa0000 {
656 compatible = "atmel,at91sam9g45-ssc";
657 reg = <0xfffa0000 0x4000>;
5e8b3bc3 658 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 659 pinctrl-names = "default";
660 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc 661 status = "disabled";
099343c6
BS		 662 };
663
93b298ba 664 adc0: adc@fffb0000 {
e1abeb72
AB		 665 #address-cells = <1>;
666 #size-cells = <0>;
72e6caca 667 compatible = "atmel,at91sam9g45-adc";
93b298ba 668 reg = <0xfffb0000 0x100>;
5e8b3bc3 669 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
93b298ba
MR		 670 atmel,adc-channels-used = <0xff>;
671 atmel,adc-vref = <3300>;
93b298ba 672 atmel,adc-startup-time = <40>;
4b50da65
LD		 673 atmel,adc-res = <8 10>;
674 atmel,adc-res-names = "lowres", "highres";
675 atmel,adc-use-res = "highres";
93b298ba
MR		 676
677 trigger@0 {
e1abeb72 678 reg = <0>;
93b298ba
MR		 679 trigger-name = "external-rising";
680 trigger-value = <0x1>;
681 trigger-external;
682 };
683 trigger@1 {
e1abeb72 684 reg = <1>;
93b298ba
MR		 685 trigger-name = "external-falling";
686 trigger-value = <0x2>;
687 trigger-external;
688 };
689
690 trigger@2 {
e1abeb72 691 reg = <2>;
93b298ba
MR		 692 trigger-name = "external-any";
693 trigger-value = <0x3>;
694 trigger-external;
695 };
696
697 trigger@3 {
e1abeb72 698 reg = <3>;
93b298ba
MR		 699 trigger-name = "continuous";
700 trigger-value = <0x6>;
701 };
702 };
9873137a 703
f3ab0527
BS		 704 pwm0: pwm@fffb8000 {
705 compatible = "atmel,at91sam9rl-pwm";
706 reg = <0xfffb8000 0x300>;
707 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
708 #pwm-cells = <3>;
709 status = "disabled";
710 };
711
9873137a
LD		 712 mmc0: mmc@fff80000 {
713 compatible = "atmel,hsmci";
714 reg = <0xfff80000 0x600>;
5e8b3bc3 715 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
0645b93f 716 pinctrl-names = "default";
d4ae89c8 717 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 718 dma-names = "rxtx";
9873137a
LD		 719 #address-cells = <1>;
720 #size-cells = <0>;
721 status = "disabled";
722 };
723
724 mmc1: mmc@fffd0000 {
725 compatible = "atmel,hsmci";
726 reg = <0xfffd0000 0x600>;
5e8b3bc3 727 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
0645b93f 728 pinctrl-names = "default";
d4ae89c8 729 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
05c1bc97 730 dma-names = "rxtx";
9873137a
LD		 731 #address-cells = <1>;
732 #size-cells = <0>;
733 status = "disabled";
db5b0ae0
LT		 734 };
735
7492e7ca
FP		 736 watchdog@fffffd40 {
737 compatible = "atmel,at91sam9260-wdt";
738 reg = <0xfffffd40 0x10>;
fe46aa67
BB		 739 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
740 atmel,watchdog-type = "hardware";
741 atmel,reset-type = "all";
742 atmel,dbg-halt;
743 atmel,idle-halt;
7492e7ca 744 status = "disabled";
d50f88a0
RG		 745 };
746
747 spi0: spi@fffa4000 {
748 #address-cells = <1>;
749 #size-cells = <0>;
750 compatible = "atmel,at91rm9200-spi";
751 reg = <0xfffa4000 0x200>;
752 interrupts = <14 4 3>;
a68b728f
WY		 753 pinctrl-names = "default";
754 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 755 status = "disabled";
756 };
757
758 spi1: spi@fffa8000 {
759 #address-cells = <1>;
760 #size-cells = <0>;
761 compatible = "atmel,at91rm9200-spi";
762 reg = <0xfffa8000 0x200>;
763 interrupts = <15 4 3>;
a68b728f
WY		 764 pinctrl-names = "default";
765 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0 766 status = "disabled";
9873137a 767 };
3cba498f
JCPV		 768
769 usb2: gadget@fff78000 {
770 #address-cells = <1>;
771 #size-cells = <0>;
772 compatible = "atmel,at91sam9rl-udc";
773 reg = <0x00600000 0x80000
774 0xfff78000 0x400>;
775 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
776 status = "disabled";
777
778 ep0 {
779 reg = <0>;
780 atmel,fifo-size = <64>;
781 atmel,nb-banks = <1>;
782 };
783
784 ep1 {
785 reg = <1>;
786 atmel,fifo-size = <1024>;
787 atmel,nb-banks = <2>;
788 atmel,can-dma;
789 atmel,can-isoc;
790 };
791
792 ep2 {
793 reg = <2>;
794 atmel,fifo-size = <1024>;
795 atmel,nb-banks = <2>;
796 atmel,can-dma;
797 atmel,can-isoc;
798 };
799
800 ep3 {
801 reg = <3>;
802 atmel,fifo-size = <1024>;
803 atmel,nb-banks = <3>;
804 atmel,can-dma;
805 };
806
807 ep4 {
808 reg = <4>;
809 atmel,fifo-size = <1024>;
810 atmel,nb-banks = <3>;
811 atmel,can-dma;
812 };
813
814 ep5 {
815 reg = <5>;
816 atmel,fifo-size = <1024>;
817 atmel,nb-banks = <3>;
818 atmel,can-dma;
819 atmel,can-isoc;
820 };
821
822 ep6 {
823 reg = <6>;
824 atmel,fifo-size = <1024>;
825 atmel,nb-banks = <3>;
826 atmel,can-dma;
827 atmel,can-isoc;
828 };
829 };
49fe2ba3 830 };
d6a01661 831
ddee65b3
JCPV		 832 fb0: fb@0x00500000 {
833 compatible = "atmel,at91sam9g45-lcdc";
834 reg = <0x00500000 0x1000>;
835 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
836 pinctrl-names = "default";
837 pinctrl-0 = <&pinctrl_fb>;
838 status = "disabled";
839 };
840
d6a01661
JCPV		 841 nand0: nand@40000000 {
842 compatible = "atmel,at91rm9200-nand";
843 #address-cells = <1>;
844 #size-cells = <1>;
845 reg = <0x40000000 0x10000000
846 0xffffe200 0x200
847 >;
848 atmel,nand-addr-offset = <21>;
849 atmel,nand-cmd-offset = <22>;
e8b2da6e 850 atmel,nand-has-dma;
7a38d450
JCPV		 851 pinctrl-names = "default";
852 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 853 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
854 &pioC 14 GPIO_ACTIVE_HIGH
d6a01661
JCPV		 855 0
856 >;
857 status = "disabled";
858 };
6a062459
JCPV		 859
860 usb0: ohci@00700000 {
861 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
862 reg = <0x00700000 0x100000>;
5e8b3bc3 863 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 864 status = "disabled";
865 };
62c5553a
JCPV		 866
867 usb1: ehci@00800000 {
868 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
869 reg = <0x00800000 0x100000>;
5e8b3bc3 870 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 871 status = "disabled";
872 };
49fe2ba3 873 };
8f24bdaa
JCPV		 874
875 i2c@0 {
876 compatible = "i2c-gpio";
92f8629b
JCPV		 877 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
878 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
8f24bdaa
JCPV		 879 >;
880 i2c-gpio,sda-open-drain;
881 i2c-gpio,scl-open-drain;
882 i2c-gpio,delay-us = <5>; /* ~100 kHz */
883 #address-cells = <1>;
884 #size-cells = <0>;
885 status = "disabled";
886 };
49fe2ba3 887};
Linux kernel - Deliverables
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