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ARM: at91: sam9x5ek add udc DT support
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
CommitLineData
49fe2ba3
NF		 1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
d4ae89c8 13#include <dt-bindings/dma/at91.h>
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
49fe2ba3
NF		 17
18/ {
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
21f81872
NF		 29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 gpio3 = &pioD;
33 gpio4 = &pioE;
3a61a5da
NF		 34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
05dcd361
LD		 36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
099343c6
BS		 38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
49fe2ba3
NF		 40 };
41 cpus {
42 cpu@0 {
43 compatible = "arm,arm926ejs";
44 };
45 };
46
dcce6ce8 47 memory {
49fe2ba3
NF		 48 reg = <0x70000000 0x10000000>;
49 };
50
51 ahb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 apb {
58 compatible = "simple-bus";
59 #address-cells = <1>;
60 #size-cells = <1>;
61 ranges;
62
63 aic: interrupt-controller@fffff000 {
f8a073ee 64 #interrupt-cells = <3>;
49fe2ba3
NF		 65 compatible = "atmel,at91rm9200-aic";
66 interrupt-controller;
49fe2ba3 67 reg = <0xfffff000 0x200>;
c6573943 68 atmel,external-irqs = <31>;
49fe2ba3
NF		 69 };
70
a7776ec6
JCPV		 71 ramc0: ramc@ffffe400 {
72 compatible = "atmel,at91sam9g45-ddramc";
73 reg = <0xffffe400 0x200
74 0xffffe600 0x200>;
75 };
76
eb5e76ff
JCPV		 77 pmc: pmc@fffffc00 {
78 compatible = "atmel,at91rm9200-pmc";
79 reg = <0xfffffc00 0x100>;
80 };
81
c8082d34
JCPV		 82 rstc@fffffd00 {
83 compatible = "atmel,at91sam9g45-rstc";
84 reg = <0xfffffd00 0x10>;
85 };
86
23fa648f
JCPV		 87 pit: timer@fffffd30 {
88 compatible = "atmel,at91sam9260-pit";
89 reg = <0xfffffd30 0xf>;
5e8b3bc3 90 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
23fa648f
JCPV		 91 };
92
3a61a5da 93
82015c4e
JCPV		 94 shdwc@fffffd10 {
95 compatible = "atmel,at91sam9rl-shdwc";
96 reg = <0xfffffd10 0x10>;
97 };
98
3a61a5da
NF		 99 tcb0: timer@fff7c000 {
100 compatible = "atmel,at91rm9200-tcb";
101 reg = <0xfff7c000 0x100>;
5e8b3bc3 102 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 103 };
104
105 tcb1: timer@fffd4000 {
106 compatible = "atmel,at91rm9200-tcb";
107 reg = <0xfffd4000 0x100>;
5e8b3bc3 108 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 109 };
110
49fe2ba3
NF		 111 dma: dma-controller@ffffec00 {
112 compatible = "atmel,at91sam9g45-dma";
113 reg = <0xffffec00 0x200>;
5e8b3bc3 114 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 115 #dma-cells = <2>;
49fe2ba3
NF		 116 };
117
e4541ff2
JCPV		 118 pinctrl@fffff200 {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
122 ranges = <0xfffff200 0xfffff200 0xa00>;
123
5314ec8e
JCPV		 124 atmel,mux-mask = <
125 /* A B */
126 0xffffffff 0xffc003ff /* pioA */
127 0xffffffff 0x800f8f00 /* pioB */
128 0xffffffff 0x00000e00 /* pioC */
129 0xffffffff 0xff0c1381 /* pioD */
130 0xffffffff 0x81ffff81 /* pioE */
131 >;
132
133 /* shared pinctrl settings */
ec6754a7
JCPV		 134 dbgu {
135 pinctrl_dbgu: dbgu-0 {
136 atmel,pins =
c9d0f317
JCPV		 137 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
138 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
ec6754a7
JCPV		 139 };
140 };
141
9e3129e9
JCPV		 142 usart0 {
143 pinctrl_usart0: usart0-0 {
ec6754a7 144 atmel,pins =
c9d0f317
JCPV		 145 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
146 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
ec6754a7
JCPV		 147 };
148
c58c0c5a 149 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 150 atmel,pins =
c9d0f317 151 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
c58c0c5a
JCPV		 152 };
153
154 pinctrl_usart0_cts: usart0_cts-0 {
155 atmel,pins =
c9d0f317 156 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
ec6754a7
JCPV		 157 };
158 };
159
160 uart1 {
9e3129e9 161 pinctrl_usart1: usart1-0 {
ec6754a7 162 atmel,pins =
c9d0f317
JCPV		 163 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
164 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
ec6754a7
JCPV		 165 };
166
c58c0c5a
JCPV		 167 pinctrl_usart1_rts: usart1_rts-0 {
168 atmel,pins =
c9d0f317 169 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
c58c0c5a
JCPV		 170 };
171
172 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 173 atmel,pins =
c9d0f317 174 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
ec6754a7
JCPV		 175 };
176 };
177
9e3129e9
JCPV		 178 usart2 {
179 pinctrl_usart2: usart2-0 {
ec6754a7 180 atmel,pins =
c9d0f317
JCPV		 181 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
182 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
ec6754a7
JCPV		 183 };
184
c58c0c5a 185 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 186 atmel,pins =
c9d0f317 187 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
c58c0c5a
JCPV		 188 };
189
190 pinctrl_usart2_cts: usart2_cts-0 {
191 atmel,pins =
c9d0f317 192 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
ec6754a7
JCPV		 193 };
194 };
195
9e3129e9
JCPV		 196 usart3 {
197 pinctrl_usart3: usart3-0 {
ec6754a7 198 atmel,pins =
c9d0f317
JCPV		 199 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
200 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
ec6754a7
JCPV		 201 };
202
c58c0c5a
JCPV		 203 pinctrl_usart3_rts: usart3_rts-0 {
204 atmel,pins =
c9d0f317 205 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
c58c0c5a
JCPV		 206 };
207
208 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 209 atmel,pins =
c9d0f317 210 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
ec6754a7
JCPV		 211 };
212 };
5314ec8e 213
7a38d450
JCPV		 214 nand {
215 pinctrl_nand: nand-0 {
216 atmel,pins =
c9d0f317
JCPV		 217 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
218 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
7a38d450
JCPV		 219 };
220 };
221
d9b4fe83
JCPV		 222 macb {
223 pinctrl_macb_rmii: macb_rmii-0 {
224 atmel,pins =
c9d0f317
JCPV		 225 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
226 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
227 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
228 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
229 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
230 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
231 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
232 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
233 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
234 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
d9b4fe83
JCPV		 235 };
236
237 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
238 atmel,pins =
c9d0f317
JCPV		 239 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
240 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
241 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
242 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
243 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
244 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
245 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
246 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
d9b4fe83
JCPV		 247 };
248 };
249
d4fe9ac7
JCPV		 250 mmc0 {
251 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
252 atmel,pins =
c9d0f317
JCPV		 253 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
254 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
255 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
d4fe9ac7
JCPV		 256 };
257
258 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
259 atmel,pins =
c9d0f317
JCPV		 260 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
261 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
262 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
d4fe9ac7
JCPV		 263 };
264
265 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
266 atmel,pins =
c9d0f317
JCPV		 267 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
268 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
269 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
270 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
d4fe9ac7
JCPV		 271 };
272 };
273
274 mmc1 {
275 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
276 atmel,pins =
c9d0f317
JCPV		 277 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
278 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
279 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
d4fe9ac7
JCPV		 280 };
281
282 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
283 atmel,pins =
c9d0f317
JCPV		 284 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
285 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
286 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
d4fe9ac7
JCPV		 287 };
288
289 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
290 atmel,pins =
c9d0f317
JCPV		 291 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
292 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
293 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
294 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
d4fe9ac7
JCPV		 295 };
296 };
297
544ae6b2
BS		 298 ssc0 {
299 pinctrl_ssc0_tx: ssc0_tx-0 {
300 atmel,pins =
c9d0f317
JCPV		 301 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
302 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
303 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
544ae6b2
BS		 304 };
305
306 pinctrl_ssc0_rx: ssc0_rx-0 {
307 atmel,pins =
c9d0f317
JCPV		 308 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
309 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
310 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
544ae6b2
BS		 311 };
312 };
313
314 ssc1 {
315 pinctrl_ssc1_tx: ssc1_tx-0 {
316 atmel,pins =
c9d0f317
JCPV		 317 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
318 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
319 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
544ae6b2
BS		 320 };
321
322 pinctrl_ssc1_rx: ssc1_rx-0 {
323 atmel,pins =
c9d0f317
JCPV		 324 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
325 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
326 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
544ae6b2
BS		 327 };
328 };
329
a68b728f
WY		 330 spi0 {
331 pinctrl_spi0: spi0-0 {
332 atmel,pins =
c9d0f317
JCPV		 333 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
334 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
335 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
a68b728f
WY		 336 };
337 };
338
339 spi1 {
340 pinctrl_spi1: spi1-0 {
341 atmel,pins =
c9d0f317
JCPV		 342 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
343 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
344 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
a68b728f
WY		 345 };
346 };
347
028633c2
BB		 348 tcb0 {
349 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
350 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
351 };
352
353 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
354 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
355 };
356
357 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
358 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
359 };
360
361 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
362 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
363 };
364
365 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
366 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
367 };
368
369 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
370 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
371 };
372
373 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
374 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
375 };
376
377 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
378 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
382 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
383 };
384 };
385
386 tcb1 {
387 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
388 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
389 };
390
391 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
392 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
393 };
394
395 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
396 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
397 };
398
399 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
400 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
401 };
402
403 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
404 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
405 };
406
407 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
408 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 };
410
411 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
412 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413 };
414
415 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
416 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 };
418
419 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
420 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422 };
423
e4541ff2
JCPV		 424 pioA: gpio@fffff200 {
425 compatible = "atmel,at91rm9200-gpio";
426 reg = <0xfffff200 0x200>;
5e8b3bc3 427 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 428 #gpio-cells = <2>;
429 gpio-controller;
430 interrupt-controller;
431 #interrupt-cells = <2>;
432 };
433
434 pioB: gpio@fffff400 {
435 compatible = "atmel,at91rm9200-gpio";
436 reg = <0xfffff400 0x200>;
5e8b3bc3 437 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 438 #gpio-cells = <2>;
439 gpio-controller;
440 interrupt-controller;
441 #interrupt-cells = <2>;
442 };
443
444 pioC: gpio@fffff600 {
445 compatible = "atmel,at91rm9200-gpio";
446 reg = <0xfffff600 0x200>;
5e8b3bc3 447 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 448 #gpio-cells = <2>;
449 gpio-controller;
450 interrupt-controller;
451 #interrupt-cells = <2>;
452 };
453
454 pioD: gpio@fffff800 {
455 compatible = "atmel,at91rm9200-gpio";
456 reg = <0xfffff800 0x200>;
5e8b3bc3 457 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 458 #gpio-cells = <2>;
459 gpio-controller;
460 interrupt-controller;
461 #interrupt-cells = <2>;
462 };
463
464 pioE: gpio@fffffa00 {
465 compatible = "atmel,at91rm9200-gpio";
466 reg = <0xfffffa00 0x200>;
5e8b3bc3 467 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 468 #gpio-cells = <2>;
469 gpio-controller;
470 interrupt-controller;
471 #interrupt-cells = <2>;
472 };
21f81872
NF		 473 };
474
49fe2ba3
NF		 475 dbgu: serial@ffffee00 {
476 compatible = "atmel,at91sam9260-usart";
477 reg = <0xffffee00 0x200>;
5e8b3bc3 478 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_dbgu>;
49fe2ba3
NF		 481 status = "disabled";
482 };
483
484 usart0: serial@fff8c000 {
485 compatible = "atmel,at91sam9260-usart";
486 reg = <0xfff8c000 0x200>;
5e8b3bc3 487 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 488 atmel,use-dma-rx;
489 atmel,use-dma-tx;
ec6754a7 490 pinctrl-names = "default";
9e3129e9 491 pinctrl-0 = <&pinctrl_usart0>;
49fe2ba3
NF		 492 status = "disabled";
493 };
494
495 usart1: serial@fff90000 {
496 compatible = "atmel,at91sam9260-usart";
497 reg = <0xfff90000 0x200>;
5e8b3bc3 498 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 499 atmel,use-dma-rx;
500 atmel,use-dma-tx;
ec6754a7 501 pinctrl-names = "default";
9e3129e9 502 pinctrl-0 = <&pinctrl_usart1>;
49fe2ba3
NF		 503 status = "disabled";
504 };
505
506 usart2: serial@fff94000 {
507 compatible = "atmel,at91sam9260-usart";
508 reg = <0xfff94000 0x200>;
5e8b3bc3 509 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 510 atmel,use-dma-rx;
511 atmel,use-dma-tx;
ec6754a7 512 pinctrl-names = "default";
9e3129e9 513 pinctrl-0 = <&pinctrl_usart2>;
49fe2ba3
NF		 514 status = "disabled";
515 };
516
517 usart3: serial@fff98000 {
518 compatible = "atmel,at91sam9260-usart";
519 reg = <0xfff98000 0x200>;
5e8b3bc3 520 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 521 atmel,use-dma-rx;
522 atmel,use-dma-tx;
ec6754a7 523 pinctrl-names = "default";
9e3129e9 524 pinctrl-0 = <&pinctrl_usart3>;
49fe2ba3
NF		 525 status = "disabled";
526 };
0d4f99d8
NF		 527
528 macb0: ethernet@fffbc000 {
529 compatible = "cdns,at32ap7000-macb", "cdns,macb";
530 reg = <0xfffbc000 0x100>;
5e8b3bc3 531 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 532 pinctrl-names = "default";
533 pinctrl-0 = <&pinctrl_macb_rmii>;
0d4f99d8
NF		 534 status = "disabled";
535 };
93b298ba 536
05dcd361
LD		 537 i2c0: i2c@fff84000 {
538 compatible = "atmel,at91sam9g10-i2c";
539 reg = <0xfff84000 0x100>;
5e8b3bc3 540 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD		 541 #address-cells = <1>;
542 #size-cells = <0>;
543 status = "disabled";
544 };
545
546 i2c1: i2c@fff88000 {
547 compatible = "atmel,at91sam9g10-i2c";
548 reg = <0xfff88000 0x100>;
5e8b3bc3 549 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD		 550 #address-cells = <1>;
551 #size-cells = <0>;
552 status = "disabled";
553 };
554
099343c6
BS		 555 ssc0: ssc@fff9c000 {
556 compatible = "atmel,at91sam9g45-ssc";
557 reg = <0xfff9c000 0x4000>;
5e8b3bc3 558 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc 561 status = "disabled";
099343c6
BS		 562 };
563
564 ssc1: ssc@fffa0000 {
565 compatible = "atmel,at91sam9g45-ssc";
566 reg = <0xfffa0000 0x4000>;
5e8b3bc3 567 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 568 pinctrl-names = "default";
569 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc 570 status = "disabled";
099343c6
BS		 571 };
572
93b298ba
MR		 573 adc0: adc@fffb0000 {
574 compatible = "atmel,at91sam9260-adc";
575 reg = <0xfffb0000 0x100>;
5e8b3bc3 576 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
93b298ba
MR		 577 atmel,adc-use-external-triggers;
578 atmel,adc-channels-used = <0xff>;
579 atmel,adc-vref = <3300>;
580 atmel,adc-num-channels = <8>;
581 atmel,adc-startup-time = <40>;
582 atmel,adc-channel-base = <0x30>;
583 atmel,adc-drdy-mask = <0x10000>;
584 atmel,adc-status-register = <0x1c>;
585 atmel,adc-trigger-register = <0x08>;
4b50da65
LD		 586 atmel,adc-res = <8 10>;
587 atmel,adc-res-names = "lowres", "highres";
588 atmel,adc-use-res = "highres";
93b298ba
MR		 589
590 trigger@0 {
591 trigger-name = "external-rising";
592 trigger-value = <0x1>;
593 trigger-external;
594 };
595 trigger@1 {
596 trigger-name = "external-falling";
597 trigger-value = <0x2>;
598 trigger-external;
599 };
600
601 trigger@2 {
602 trigger-name = "external-any";
603 trigger-value = <0x3>;
604 trigger-external;
605 };
606
607 trigger@3 {
608 trigger-name = "continuous";
609 trigger-value = <0x6>;
610 };
611 };
9873137a
LD		 612
613 mmc0: mmc@fff80000 {
614 compatible = "atmel,hsmci";
615 reg = <0xfff80000 0x600>;
5e8b3bc3 616 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 617 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 618 dma-names = "rxtx";
9873137a
LD		 619 #address-cells = <1>;
620 #size-cells = <0>;
621 status = "disabled";
622 };
623
624 mmc1: mmc@fffd0000 {
625 compatible = "atmel,hsmci";
626 reg = <0xfffd0000 0x600>;
5e8b3bc3 627 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 628 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
05c1bc97 629 dma-names = "rxtx";
9873137a
LD		 630 #address-cells = <1>;
631 #size-cells = <0>;
632 status = "disabled";
db5b0ae0
LT		 633 };
634
7492e7ca
FP		 635 watchdog@fffffd40 {
636 compatible = "atmel,at91sam9260-wdt";
637 reg = <0xfffffd40 0x10>;
638 status = "disabled";
d50f88a0
RG		 639 };
640
641 spi0: spi@fffa4000 {
642 #address-cells = <1>;
643 #size-cells = <0>;
644 compatible = "atmel,at91rm9200-spi";
645 reg = <0xfffa4000 0x200>;
646 interrupts = <14 4 3>;
a68b728f
WY		 647 pinctrl-names = "default";
648 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 649 status = "disabled";
650 };
651
652 spi1: spi@fffa8000 {
653 #address-cells = <1>;
654 #size-cells = <0>;
655 compatible = "atmel,at91rm9200-spi";
656 reg = <0xfffa8000 0x200>;
657 interrupts = <15 4 3>;
a68b728f
WY		 658 pinctrl-names = "default";
659 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0 660 status = "disabled";
9873137a 661 };
49fe2ba3 662 };
d6a01661
JCPV		 663
664 nand0: nand@40000000 {
665 compatible = "atmel,at91rm9200-nand";
666 #address-cells = <1>;
667 #size-cells = <1>;
668 reg = <0x40000000 0x10000000
669 0xffffe200 0x200
670 >;
671 atmel,nand-addr-offset = <21>;
672 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 673 pinctrl-names = "default";
674 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 675 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
676 &pioC 14 GPIO_ACTIVE_HIGH
d6a01661
JCPV		 677 0
678 >;
679 status = "disabled";
680 };
6a062459
JCPV		 681
682 usb0: ohci@00700000 {
683 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
684 reg = <0x00700000 0x100000>;
5e8b3bc3 685 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 686 status = "disabled";
687 };
62c5553a
JCPV		 688
689 usb1: ehci@00800000 {
690 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
691 reg = <0x00800000 0x100000>;
5e8b3bc3 692 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 693 status = "disabled";
694 };
49fe2ba3 695 };
8f24bdaa
JCPV		 696
697 i2c@0 {
698 compatible = "i2c-gpio";
92f8629b
JCPV		 699 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
700 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
8f24bdaa
JCPV		 701 >;
702 i2c-gpio,sda-open-drain;
703 i2c-gpio,scl-open-drain;
704 i2c-gpio,delay-us = <5>; /* ~100 kHz */
705 #address-cells = <1>;
706 #size-cells = <0>;
707 status = "disabled";
708 };
49fe2ba3 709};
Linux kernel - Deliverables
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