projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 49fe2ba3 NF |
1 | /* |
| 2 | * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC | |
| 3 | * applies to AT91SAM9G45, AT91SAM9M10, | |
| 4 | * AT91SAM9G46, AT91SAM9M11 SoC | |
| 5 | * | |
| 6 | * Copyright (C) 2011 Atmel, | |
| 7 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> | |
| 8 | * | |
| 9 | * Licensed under GPLv2 or later. | |
| 10 | */ | |
| 11 | ||
| 6db64d29 | 12 | #include "skeleton.dtsi" |
| d4ae89c8 | 13 | #include <dt-bindings/dma/at91.h> |
| c9d0f317 | 14 | #include <dt-bindings/pinctrl/at91.h> |
| 5e8b3bc3 | 15 | #include <dt-bindings/interrupt-controller/irq.h> |
| 92f8629b | 16 | #include <dt-bindings/gpio/gpio.h> |
| 6f368c30 | 17 | #include <dt-bindings/clock/at91.h> |
| 49fe2ba3 NF |
18 | |
| 19 | / { | |
| 20 | model = "Atmel AT91SAM9G45 family SoC"; | |
| 21 | compatible = "atmel,at91sam9g45"; | |
| 22 | interrupt-parent = <&aic>; | |
| 23 | ||
| 24 | aliases { | |
| 25 | serial0 = &dbgu; | |
| 26 | serial1 = &usart0; | |
| 27 | serial2 = &usart1; | |
| 28 | serial3 = &usart2; | |
| 29 | serial4 = &usart3; | |
| 21f81872 NF |
30 | gpio0 = &pioA; |
| 31 | gpio1 = &pioB; | |
| 32 | gpio2 = &pioC; | |
| 33 | gpio3 = &pioD; | |
| 34 | gpio4 = &pioE; | |
| 3a61a5da NF |
35 | tcb0 = &tcb0; |
| 36 | tcb1 = &tcb1; | |
| 05dcd361 LD |
37 | i2c0 = &i2c0; |
| 38 | i2c1 = &i2c1; | |
| 099343c6 BS |
39 | ssc0 = &ssc0; |
| 40 | ssc1 = &ssc1; | |
| f3ab0527 | 41 | pwm0 = &pwm0; |
| 49fe2ba3 NF |
42 | }; |
| 43 | cpus { | |
| e757a6ee LP |
44 | #address-cells = <0>; |
| 45 | #size-cells = <0>; | |
| 46 | ||
| 47 | cpu { | |
| 48 | compatible = "arm,arm926ej-s"; | |
| 49 | device_type = "cpu"; | |
| 49fe2ba3 NF |
50 | }; |
| 51 | }; | |
| 52 | ||
| dcce6ce8 | 53 | memory { |
| 49fe2ba3 NF |
54 | reg = <0x70000000 0x10000000>; |
| 55 | }; | |
| 56 | ||
| 6f368c30 AB |
57 | clocks { |
| 58 | slow_xtal: slow_xtal { | |
| 59 | compatible = "fixed-clock"; | |
| 60 | #clock-cells = <0>; | |
| 61 | clock-frequency = <0>; | |
| 62 | }; | |
| 63 | ||
| 64 | main_xtal: main_xtal { | |
| 65 | compatible = "fixed-clock"; | |
| 66 | #clock-cells = <0>; | |
| 67 | clock-frequency = <0>; | |
| 68 | }; | |
| 69 | ||
| 70 | adc_op_clk: adc_op_clk{ | |
| 71 | compatible = "fixed-clock"; | |
| 72 | #clock-cells = <0>; | |
| 73 | clock-frequency = <300000>; | |
| 74 | }; | |
| 75 | }; | |
| 76 | ||
| f04660e4 AB |
77 | sram: sram@00300000 { |
| 78 | compatible = "mmio-sram"; | |
| 79 | reg = <0x00300000 0x10000>; | |
| 80 | }; | |
| 81 | ||
| 49fe2ba3 NF |
82 | ahb { |
| 83 | compatible = "simple-bus"; | |
| 84 | #address-cells = <1>; | |
| 85 | #size-cells = <1>; | |
| 86 | ranges; | |
| 87 | ||
| 88 | apb { | |
| 89 | compatible = "simple-bus"; | |
| 90 | #address-cells = <1>; | |
| 91 | #size-cells = <1>; | |
| 92 | ranges; | |
| 93 | ||
| 94 | aic: interrupt-controller@fffff000 { | |
| f8a073ee | 95 | #interrupt-cells = <3>; |
| 49fe2ba3 NF |
96 | compatible = "atmel,at91rm9200-aic"; |
| 97 | interrupt-controller; | |
| 49fe2ba3 | 98 | reg = <0xfffff000 0x200>; |
| c6573943 | 99 | atmel,external-irqs = <31>; |
| 49fe2ba3 NF |
100 | }; |
| 101 | ||
| a7776ec6 JCPV |
102 | ramc0: ramc@ffffe400 { |
| 103 | compatible = "atmel,at91sam9g45-ddramc"; | |
| 1e165a7d | 104 | reg = <0xffffe400 0x200>; |
| 464d6e18 NF |
105 | clocks = <&ddrck>; |
| 106 | clock-names = "ddrck"; | |
| 1e165a7d MR |
107 | }; |
| 108 | ||
| 109 | ramc1: ramc@ffffe600 { | |
| 110 | compatible = "atmel,at91sam9g45-ddramc"; | |
| 111 | reg = <0xffffe600 0x200>; | |
| 6f368c30 AB |
112 | clocks = <&ddrck>; |
| 113 | clock-names = "ddrck"; | |
| a7776ec6 JCPV |
114 | }; |
| 115 | ||
| eb5e76ff | 116 | pmc: pmc@fffffc00 { |
| 6f368c30 | 117 | compatible = "atmel,at91sam9g45-pmc"; |
| eb5e76ff | 118 | reg = <0xfffffc00 0x100>; |
| 6f368c30 AB |
119 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 120 | interrupt-controller; | |
| 121 | #address-cells = <1>; | |
| 122 | #size-cells = <0>; | |
| 123 | #interrupt-cells = <1>; | |
| 124 | ||
| 125 | main_osc: main_osc { | |
| 126 | compatible = "atmel,at91rm9200-clk-main-osc"; | |
| 127 | #clock-cells = <0>; | |
| 128 | interrupts-extended = <&pmc AT91_PMC_MOSCS>; | |
| 129 | clocks = <&main_xtal>; | |
| 130 | }; | |
| 131 | ||
| 132 | main: mainck { | |
| 133 | compatible = "atmel,at91rm9200-clk-main"; | |
| 134 | #clock-cells = <0>; | |
| 135 | clocks = <&main_osc>; | |
| 136 | }; | |
| 137 | ||
| 138 | plla: pllack { | |
| 139 | compatible = "atmel,at91rm9200-clk-pll"; | |
| 140 | #clock-cells = <0>; | |
| 141 | interrupts-extended = <&pmc AT91_PMC_LOCKA>; | |
| 142 | clocks = <&main>; | |
| 143 | reg = <0>; | |
| 144 | atmel,clk-input-range = <2000000 32000000>; | |
| 145 | #atmel,pll-clk-output-range-cells = <4>; | |
| 146 | atmel,pll-clk-output-ranges = <745000000 800000000 0 0 | |
| 147 | 695000000 750000000 1 0 | |
| 148 | 645000000 700000000 2 0 | |
| 149 | 595000000 650000000 3 0 | |
| 150 | 545000000 600000000 0 1 | |
| 151 | 495000000 555000000 1 1 | |
| 152 | 445000000 500000000 2 1 | |
| 153 | 400000000 450000000 3 1>; | |
| 154 | }; | |
| 155 | ||
| 156 | plladiv: plladivck { | |
| 157 | compatible = "atmel,at91sam9x5-clk-plldiv"; | |
| 158 | #clock-cells = <0>; | |
| 159 | clocks = <&plla>; | |
| 160 | }; | |
| 161 | ||
| 162 | utmi: utmick { | |
| 163 | compatible = "atmel,at91sam9x5-clk-utmi"; | |
| 164 | #clock-cells = <0>; | |
| 165 | interrupts-extended = <&pmc AT91_PMC_LOCKU>; | |
| 166 | clocks = <&main>; | |
| 167 | }; | |
| 168 | ||
| 169 | mck: masterck { | |
| 170 | compatible = "atmel,at91rm9200-clk-master"; | |
| 171 | #clock-cells = <0>; | |
| 172 | interrupts-extended = <&pmc AT91_PMC_MCKRDY>; | |
| 97735da4 | 173 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; |
| 6f368c30 AB |
174 | atmel,clk-output-range = <0 133333333>; |
| 175 | atmel,clk-divisors = <1 2 4 3>; | |
| 176 | }; | |
| 177 | ||
| 178 | usb: usbck { | |
| 179 | compatible = "atmel,at91sam9x5-clk-usb"; | |
| 180 | #clock-cells = <0>; | |
| 181 | clocks = <&plladiv>, <&utmi>; | |
| 182 | }; | |
| 183 | ||
| 184 | prog: progck { | |
| 185 | compatible = "atmel,at91sam9g45-clk-programmable"; | |
| 186 | #address-cells = <1>; | |
| 187 | #size-cells = <0>; | |
| 188 | interrupt-parent = <&pmc>; | |
| 97735da4 | 189 | clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; |
| 6f368c30 AB |
190 | |
| 191 | prog0: prog0 { | |
| 192 | #clock-cells = <0>; | |
| 193 | reg = <0>; | |
| 194 | interrupts = <AT91_PMC_PCKRDY(0)>; | |
| 195 | }; | |
| 196 | ||
| 197 | prog1: prog1 { | |
| 198 | #clock-cells = <0>; | |
| 199 | reg = <1>; | |
| 200 | interrupts = <AT91_PMC_PCKRDY(1)>; | |
| 201 | }; | |
| 202 | }; | |
| 203 | ||
| 204 | systemck { | |
| 205 | compatible = "atmel,at91rm9200-clk-system"; | |
| 206 | #address-cells = <1>; | |
| 207 | #size-cells = <0>; | |
| 208 | ||
| 209 | ddrck: ddrck { | |
| 210 | #clock-cells = <0>; | |
| 211 | reg = <2>; | |
| 212 | clocks = <&mck>; | |
| 213 | }; | |
| 214 | ||
| 215 | uhpck: uhpck { | |
| 216 | #clock-cells = <0>; | |
| 217 | reg = <6>; | |
| 218 | clocks = <&usb>; | |
| 219 | }; | |
| 220 | ||
| 221 | pck0: pck0 { | |
| 222 | #clock-cells = <0>; | |
| 223 | reg = <8>; | |
| 224 | clocks = <&prog0>; | |
| 225 | }; | |
| 226 | ||
| 227 | pck1: pck1 { | |
| 228 | #clock-cells = <0>; | |
| 229 | reg = <9>; | |
| 230 | clocks = <&prog1>; | |
| 231 | }; | |
| 232 | }; | |
| 233 | ||
| 234 | periphck { | |
| 235 | compatible = "atmel,at91rm9200-clk-peripheral"; | |
| 236 | #address-cells = <1>; | |
| 237 | #size-cells = <0>; | |
| 238 | clocks = <&mck>; | |
| 239 | ||
| 240 | pioA_clk: pioA_clk { | |
| 241 | #clock-cells = <0>; | |
| 242 | reg = <2>; | |
| 243 | }; | |
| 244 | ||
| 245 | pioB_clk: pioB_clk { | |
| 246 | #clock-cells = <0>; | |
| 247 | reg = <3>; | |
| 248 | }; | |
| 249 | ||
| 250 | pioC_clk: pioC_clk { | |
| 251 | #clock-cells = <0>; | |
| 252 | reg = <4>; | |
| 253 | }; | |
| 254 | ||
| 255 | pioDE_clk: pioDE_clk { | |
| 256 | #clock-cells = <0>; | |
| 257 | reg = <5>; | |
| 258 | }; | |
| 259 | ||
| 260 | trng_clk: trng_clk { | |
| 261 | #clock-cells = <0>; | |
| 262 | reg = <6>; | |
| 263 | }; | |
| 264 | ||
| 265 | usart0_clk: usart0_clk { | |
| 266 | #clock-cells = <0>; | |
| 267 | reg = <7>; | |
| 268 | }; | |
| 269 | ||
| 270 | usart1_clk: usart1_clk { | |
| 271 | #clock-cells = <0>; | |
| 272 | reg = <8>; | |
| 273 | }; | |
| 274 | ||
| 275 | usart2_clk: usart2_clk { | |
| 276 | #clock-cells = <0>; | |
| 277 | reg = <9>; | |
| 278 | }; | |
| 279 | ||
| 280 | usart3_clk: usart3_clk { | |
| 281 | #clock-cells = <0>; | |
| 282 | reg = <10>; | |
| 283 | }; | |
| 284 | ||
| 285 | mci0_clk: mci0_clk { | |
| 286 | #clock-cells = <0>; | |
| 287 | reg = <11>; | |
| 288 | }; | |
| 289 | ||
| 290 | twi0_clk: twi0_clk { | |
| 291 | #clock-cells = <0>; | |
| 292 | reg = <12>; | |
| 293 | }; | |
| 294 | ||
| 295 | twi1_clk: twi1_clk { | |
| 296 | #clock-cells = <0>; | |
| 297 | reg = <13>; | |
| 298 | }; | |
| 299 | ||
| 300 | spi0_clk: spi0_clk { | |
| 301 | #clock-cells = <0>; | |
| 302 | reg = <14>; | |
| 303 | }; | |
| 304 | ||
| 305 | spi1_clk: spi1_clk { | |
| 306 | #clock-cells = <0>; | |
| 307 | reg = <15>; | |
| 308 | }; | |
| 309 | ||
| 310 | ssc0_clk: ssc0_clk { | |
| 311 | #clock-cells = <0>; | |
| 312 | reg = <16>; | |
| 313 | }; | |
| 314 | ||
| 315 | ssc1_clk: ssc1_clk { | |
| 316 | #clock-cells = <0>; | |
| 317 | reg = <17>; | |
| 318 | }; | |
| 319 | ||
| 320 | tcb0_clk: tcb0_clk { | |
| 321 | #clock-cells = <0>; | |
| 322 | reg = <18>; | |
| 323 | }; | |
| 324 | ||
| 325 | pwm_clk: pwm_clk { | |
| 326 | #clock-cells = <0>; | |
| 327 | reg = <19>; | |
| 328 | }; | |
| 329 | ||
| 330 | adc_clk: adc_clk { | |
| 331 | #clock-cells = <0>; | |
| 332 | reg = <20>; | |
| 333 | }; | |
| 334 | ||
| 335 | dma0_clk: dma0_clk { | |
| 336 | #clock-cells = <0>; | |
| 337 | reg = <21>; | |
| 338 | }; | |
| 339 | ||
| 340 | uhphs_clk: uhphs_clk { | |
| 341 | #clock-cells = <0>; | |
| 342 | reg = <22>; | |
| 343 | }; | |
| 344 | ||
| 345 | lcd_clk: lcd_clk { | |
| 346 | #clock-cells = <0>; | |
| 347 | reg = <23>; | |
| 348 | }; | |
| 349 | ||
| 350 | ac97_clk: ac97_clk { | |
| 351 | #clock-cells = <0>; | |
| 352 | reg = <24>; | |
| 353 | }; | |
| 354 | ||
| 355 | macb0_clk: macb0_clk { | |
| 356 | #clock-cells = <0>; | |
| 357 | reg = <25>; | |
| 358 | }; | |
| 359 | ||
| 360 | isi_clk: isi_clk { | |
| 361 | #clock-cells = <0>; | |
| 362 | reg = <26>; | |
| 363 | }; | |
| 364 | ||
| 365 | udphs_clk: udphs_clk { | |
| 366 | #clock-cells = <0>; | |
| 367 | reg = <27>; | |
| 368 | }; | |
| 369 | ||
| 370 | aestdessha_clk: aestdessha_clk { | |
| 371 | #clock-cells = <0>; | |
| 372 | reg = <28>; | |
| 373 | }; | |
| 374 | ||
| 375 | mci1_clk: mci1_clk { | |
| 376 | #clock-cells = <0>; | |
| 377 | reg = <29>; | |
| 378 | }; | |
| 379 | ||
| 380 | vdec_clk: vdec_clk { | |
| 381 | #clock-cells = <0>; | |
| 382 | reg = <30>; | |
| 383 | }; | |
| 384 | }; | |
| eb5e76ff JCPV |
385 | }; |
| 386 | ||
| c8082d34 JCPV |
387 | rstc@fffffd00 { |
| 388 | compatible = "atmel,at91sam9g45-rstc"; | |
| 389 | reg = <0xfffffd00 0x10>; | |
| 390 | }; | |
| 391 | ||
| 23fa648f JCPV |
392 | pit: timer@fffffd30 { |
| 393 | compatible = "atmel,at91sam9260-pit"; | |
| 394 | reg = <0xfffffd30 0xf>; | |
| 5e8b3bc3 | 395 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 6f368c30 | 396 | clocks = <&mck>; |
| 23fa648f JCPV |
397 | }; |
| 398 | ||
| 3a61a5da | 399 | |
| 82015c4e JCPV |
400 | shdwc@fffffd10 { |
| 401 | compatible = "atmel,at91sam9rl-shdwc"; | |
| 402 | reg = <0xfffffd10 0x10>; | |
| 403 | }; | |
| 404 | ||
| 3a61a5da NF |
405 | tcb0: timer@fff7c000 { |
| 406 | compatible = "atmel,at91rm9200-tcb"; | |
| 407 | reg = <0xfff7c000 0x100>; | |
| 5e8b3bc3 | 408 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; |
| 6f368c30 AB |
409 | clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>; |
| 410 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
| 3a61a5da NF |
411 | }; |
| 412 | ||
| 413 | tcb1: timer@fffd4000 { | |
| 414 | compatible = "atmel,at91rm9200-tcb"; | |
| 415 | reg = <0xfffd4000 0x100>; | |
| 5e8b3bc3 | 416 | interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>; |
| 6f368c30 AB |
417 | clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>; |
| 418 | clock-names = "t0_clk", "t1_clk", "t2_clk"; | |
| 3a61a5da NF |
419 | }; |
| 420 | ||
| 49fe2ba3 NF |
421 | dma: dma-controller@ffffec00 { |
| 422 | compatible = "atmel,at91sam9g45-dma"; | |
| 423 | reg = <0xffffec00 0x200>; | |
| 5e8b3bc3 | 424 | interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; |
| 980ce7d9 | 425 | #dma-cells = <2>; |
| 6f368c30 AB |
426 | clocks = <&dma0_clk>; |
| 427 | clock-names = "dma_clk"; | |
| 49fe2ba3 NF |
428 | }; |
| 429 | ||
| e4541ff2 JCPV |
430 | pinctrl@fffff200 { |
| 431 | #address-cells = <1>; | |
| 432 | #size-cells = <1>; | |
| 433 | compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; | |
| 434 | ranges = <0xfffff200 0xfffff200 0xa00>; | |
| 435 | ||
| 5314ec8e JCPV |
436 | atmel,mux-mask = < |
| 437 | /* A B */ | |
| 438 | 0xffffffff 0xffc003ff /* pioA */ | |
| 439 | 0xffffffff 0x800f8f00 /* pioB */ | |
| 440 | 0xffffffff 0x00000e00 /* pioC */ | |
| 441 | 0xffffffff 0xff0c1381 /* pioD */ | |
| 442 | 0xffffffff 0x81ffff81 /* pioE */ | |
| 443 | >; | |
| 444 | ||
| 445 | /* shared pinctrl settings */ | |
| 72e6caca AB |
446 | adc0 { |
| 447 | pinctrl_adc0_adtrg: adc0_adtrg { | |
| 448 | atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 449 | }; | |
| 450 | pinctrl_adc0_ad0: adc0_ad0 { | |
| 451 | atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 452 | }; | |
| 453 | pinctrl_adc0_ad1: adc0_ad1 { | |
| 454 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 455 | }; | |
| 456 | pinctrl_adc0_ad2: adc0_ad2 { | |
| 457 | atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 458 | }; | |
| 459 | pinctrl_adc0_ad3: adc0_ad3 { | |
| 460 | atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 461 | }; | |
| 462 | pinctrl_adc0_ad4: adc0_ad4 { | |
| 463 | atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 464 | }; | |
| 465 | pinctrl_adc0_ad5: adc0_ad5 { | |
| 466 | atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 467 | }; | |
| 468 | pinctrl_adc0_ad6: adc0_ad6 { | |
| 469 | atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 470 | }; | |
| 471 | pinctrl_adc0_ad7: adc0_ad7 { | |
| 472 | atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; | |
| 473 | }; | |
| 474 | }; | |
| 475 | ||
| ec6754a7 JCPV |
476 | dbgu { |
| 477 | pinctrl_dbgu: dbgu-0 { | |
| 478 | atmel,pins = | |
| c9d0f317 JCPV |
479 | <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */ |
| 480 | AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */ | |
| ec6754a7 JCPV |
481 | }; |
| 482 | }; | |
| 483 | ||
| cd127e1d LD |
484 | i2c0 { |
| 485 | pinctrl_i2c0: i2c0-0 { | |
| 486 | atmel,pins = | |
| 487 | <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */ | |
| 488 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */ | |
| 489 | }; | |
| 490 | }; | |
| 491 | ||
| 492 | i2c1 { | |
| 493 | pinctrl_i2c1: i2c1-0 { | |
| 494 | atmel,pins = | |
| 495 | <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */ | |
| 496 | AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */ | |
| 497 | }; | |
| 498 | }; | |
| 499 | ||
| accda273 | 500 | isi { |
| 917cdc5f JW |
501 | pinctrl_isi_data_0_7: isi-0-data-0-7 { |
| 502 | atmel,pins = | |
| 503 | <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */ | |
| 504 | AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */ | |
| 505 | AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */ | |
| 506 | AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */ | |
| 507 | AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */ | |
| 508 | AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */ | |
| 509 | AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */ | |
| 510 | AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */ | |
| 511 | AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */ | |
| 512 | AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */ | |
| 513 | AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */ | |
| 514 | }; | |
| 515 | ||
| 516 | pinctrl_isi_data_8_9: isi-0-data-8-9 { | |
| 517 | atmel,pins = | |
| 518 | <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */ | |
| 519 | AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */ | |
| 520 | }; | |
| 521 | ||
| 522 | pinctrl_isi_data_10_11: isi-0-data-10-11 { | |
| 523 | atmel,pins = | |
| 524 | <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */ | |
| 525 | AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */ | |
| accda273 BB |
526 | }; |
| 527 | }; | |
| 528 | ||
| 9e3129e9 JCPV |
529 | usart0 { |
| 530 | pinctrl_usart0: usart0-0 { | |
| ec6754a7 | 531 | atmel,pins = |
| c9d0f317 JCPV |
532 | <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */ |
| 533 | AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */ | |
| ec6754a7 JCPV |
534 | }; |
| 535 | ||
| c58c0c5a | 536 | pinctrl_usart0_rts: usart0_rts-0 { |
| ec6754a7 | 537 | atmel,pins = |
| c9d0f317 | 538 | <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */ |
| c58c0c5a JCPV |
539 | }; |
| 540 | ||
| 541 | pinctrl_usart0_cts: usart0_cts-0 { | |
| 542 | atmel,pins = | |
| c9d0f317 | 543 | <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */ |
| ec6754a7 JCPV |
544 | }; |
| 545 | }; | |
| 546 | ||
| 547 | uart1 { | |
| 9e3129e9 | 548 | pinctrl_usart1: usart1-0 { |
| ec6754a7 | 549 | atmel,pins = |
| c9d0f317 JCPV |
550 | <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */ |
| 551 | AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */ | |
| ec6754a7 JCPV |
552 | }; |
| 553 | ||
| c58c0c5a JCPV |
554 | pinctrl_usart1_rts: usart1_rts-0 { |
| 555 | atmel,pins = | |
| c9d0f317 | 556 | <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */ |
| c58c0c5a JCPV |
557 | }; |
| 558 | ||
| 559 | pinctrl_usart1_cts: usart1_cts-0 { | |
| ec6754a7 | 560 | atmel,pins = |
| c9d0f317 | 561 | <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */ |
| ec6754a7 JCPV |
562 | }; |
| 563 | }; | |
| 564 | ||
| 9e3129e9 JCPV |
565 | usart2 { |
| 566 | pinctrl_usart2: usart2-0 { | |
| ec6754a7 | 567 | atmel,pins = |
| c9d0f317 JCPV |
568 | <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */ |
| 569 | AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */ | |
| ec6754a7 JCPV |
570 | }; |
| 571 | ||
| c58c0c5a | 572 | pinctrl_usart2_rts: usart2_rts-0 { |
| ec6754a7 | 573 | atmel,pins = |
| c9d0f317 | 574 | <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */ |
| c58c0c5a JCPV |
575 | }; |
| 576 | ||
| 577 | pinctrl_usart2_cts: usart2_cts-0 { | |
| 578 | atmel,pins = | |
| c9d0f317 | 579 | <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */ |
| ec6754a7 JCPV |
580 | }; |
| 581 | }; | |
| 582 | ||
| 9e3129e9 JCPV |
583 | usart3 { |
| 584 | pinctrl_usart3: usart3-0 { | |
| ec6754a7 | 585 | atmel,pins = |
| c9d0f317 JCPV |
586 | <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */ |
| 587 | AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ | |
| ec6754a7 JCPV |
588 | }; |
| 589 | ||
| c58c0c5a JCPV |
590 | pinctrl_usart3_rts: usart3_rts-0 { |
| 591 | atmel,pins = | |
| c9d0f317 | 592 | <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */ |
| c58c0c5a JCPV |
593 | }; |
| 594 | ||
| 595 | pinctrl_usart3_cts: usart3_cts-0 { | |
| ec6754a7 | 596 | atmel,pins = |
| c9d0f317 | 597 | <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */ |
| ec6754a7 JCPV |
598 | }; |
| 599 | }; | |
| 5314ec8e | 600 | |
| 7a38d450 JCPV |
601 | nand { |
| 602 | pinctrl_nand: nand-0 { | |
| 603 | atmel,pins = | |
| c9d0f317 JCPV |
604 | <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/ |
| 605 | AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */ | |
| 7a38d450 JCPV |
606 | }; |
| 607 | }; | |
| 608 | ||
| d9b4fe83 JCPV |
609 | macb { |
| 610 | pinctrl_macb_rmii: macb_rmii-0 { | |
| 611 | atmel,pins = | |
| c9d0f317 JCPV |
612 | <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */ |
| 613 | AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */ | |
| 614 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */ | |
| 615 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */ | |
| 616 | AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */ | |
| 617 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */ | |
| 618 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */ | |
| 619 | AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ | |
| 620 | AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */ | |
| 621 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */ | |
| d9b4fe83 JCPV |
622 | }; |
| 623 | ||
| 624 | pinctrl_macb_rmii_mii: macb_rmii_mii-0 { | |
| 625 | atmel,pins = | |
| c9d0f317 JCPV |
626 | <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */ |
| 627 | AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */ | |
| 628 | AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */ | |
| 629 | AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */ | |
| 630 | AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ | |
| 631 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ | |
| 632 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */ | |
| 633 | AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */ | |
| d9b4fe83 JCPV |
634 | }; |
| 635 | }; | |
| 636 | ||
| d4fe9ac7 JCPV |
637 | mmc0 { |
| 638 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | |
| 639 | atmel,pins = | |
| c9d0f317 JCPV |
640 | <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */ |
| 641 | AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ | |
| 642 | AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */ | |
| d4fe9ac7 JCPV |
643 | }; |
| 644 | ||
| 645 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | |
| 646 | atmel,pins = | |
| c9d0f317 JCPV |
647 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ |
| 648 | AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ | |
| 649 | AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ | |
| d4fe9ac7 JCPV |
650 | }; |
| 651 | ||
| 652 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { | |
| 653 | atmel,pins = | |
| c9d0f317 JCPV |
654 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ |
| 655 | AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ | |
| 656 | AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ | |
| 657 | AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */ | |
| d4fe9ac7 JCPV |
658 | }; |
| 659 | }; | |
| 660 | ||
| 661 | mmc1 { | |
| 662 | pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 { | |
| 663 | atmel,pins = | |
| c9d0f317 JCPV |
664 | <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */ |
| 665 | AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */ | |
| 666 | AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */ | |
| d4fe9ac7 JCPV |
667 | }; |
| 668 | ||
| 669 | pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { | |
| 670 | atmel,pins = | |
| c9d0f317 JCPV |
671 | <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ |
| 672 | AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */ | |
| 673 | AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */ | |
| d4fe9ac7 JCPV |
674 | }; |
| 675 | ||
| 676 | pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 { | |
| 677 | atmel,pins = | |
| c9d0f317 JCPV |
678 | <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */ |
| 679 | AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */ | |
| 680 | AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */ | |
| 681 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */ | |
| d4fe9ac7 JCPV |
682 | }; |
| 683 | }; | |
| 684 | ||
| 544ae6b2 BS |
685 | ssc0 { |
| 686 | pinctrl_ssc0_tx: ssc0_tx-0 { | |
| 687 | atmel,pins = | |
| c9d0f317 JCPV |
688 | <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */ |
| 689 | AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */ | |
| 690 | AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */ | |
| 544ae6b2 BS |
691 | }; |
| 692 | ||
| 693 | pinctrl_ssc0_rx: ssc0_rx-0 { | |
| 694 | atmel,pins = | |
| c9d0f317 JCPV |
695 | <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */ |
| 696 | AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */ | |
| 697 | AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */ | |
| 544ae6b2 BS |
698 | }; |
| 699 | }; | |
| 700 | ||
| 701 | ssc1 { | |
| 702 | pinctrl_ssc1_tx: ssc1_tx-0 { | |
| 703 | atmel,pins = | |
| c9d0f317 JCPV |
704 | <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */ |
| 705 | AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */ | |
| 706 | AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */ | |
| 544ae6b2 BS |
707 | }; |
| 708 | ||
| 709 | pinctrl_ssc1_rx: ssc1_rx-0 { | |
| 710 | atmel,pins = | |
| c9d0f317 JCPV |
711 | <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */ |
| 712 | AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */ | |
| 713 | AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */ | |
| 544ae6b2 BS |
714 | }; |
| 715 | }; | |
| 716 | ||
| a68b728f WY |
717 | spi0 { |
| 718 | pinctrl_spi0: spi0-0 { | |
| 719 | atmel,pins = | |
| c9d0f317 JCPV |
720 | <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */ |
| 721 | AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */ | |
| 722 | AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */ | |
| a68b728f WY |
723 | }; |
| 724 | }; | |
| 725 | ||
| 726 | spi1 { | |
| 727 | pinctrl_spi1: spi1-0 { | |
| 728 | atmel,pins = | |
| c9d0f317 JCPV |
729 | <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */ |
| 730 | AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */ | |
| 731 | AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */ | |
| a68b728f WY |
732 | }; |
| 733 | }; | |
| 734 | ||
| 028633c2 BB |
735 | tcb0 { |
| 736 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | |
| 737 | atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 738 | }; | |
| 739 | ||
| 740 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | |
| 741 | atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 742 | }; | |
| 743 | ||
| 744 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | |
| 745 | atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 746 | }; | |
| 747 | ||
| 748 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | |
| 749 | atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 750 | }; | |
| 751 | ||
| 752 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | |
| 753 | atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 754 | }; | |
| 755 | ||
| 756 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | |
| 757 | atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 758 | }; | |
| 759 | ||
| 760 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | |
| 761 | atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 762 | }; | |
| 763 | ||
| 764 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | |
| 765 | atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; | |
| 766 | }; | |
| 767 | ||
| 768 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | |
| 769 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 770 | }; | |
| 771 | }; | |
| 772 | ||
| 773 | tcb1 { | |
| 774 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { | |
| 775 | atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 776 | }; | |
| 777 | ||
| 778 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { | |
| 779 | atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 780 | }; | |
| 781 | ||
| 782 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { | |
| 783 | atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 784 | }; | |
| 785 | ||
| 786 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { | |
| 787 | atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 788 | }; | |
| 789 | ||
| 790 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { | |
| 791 | atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 792 | }; | |
| 793 | ||
| 794 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { | |
| 795 | atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 796 | }; | |
| 797 | ||
| 798 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { | |
| 799 | atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 800 | }; | |
| 801 | ||
| 802 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { | |
| 803 | atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 804 | }; | |
| 805 | ||
| 806 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { | |
| 807 | atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; | |
| 808 | }; | |
| 809 | }; | |
| 810 | ||
| ddee65b3 JCPV |
811 | fb { |
| 812 | pinctrl_fb: fb-0 { | |
| 813 | atmel,pins = | |
| 814 | <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */ | |
| 815 | AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */ | |
| 816 | AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */ | |
| 817 | AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */ | |
| 818 | AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */ | |
| 819 | AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */ | |
| 820 | AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */ | |
| 821 | AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */ | |
| 822 | AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */ | |
| 823 | AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */ | |
| 824 | AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */ | |
| 825 | AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */ | |
| 826 | AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */ | |
| 827 | AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */ | |
| 828 | AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */ | |
| 829 | AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */ | |
| 830 | AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */ | |
| 831 | AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */ | |
| 832 | AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */ | |
| 833 | AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */ | |
| 834 | AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ | |
| 835 | AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */ | |
| 836 | AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ | |
| 837 | AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ | |
| 838 | AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ | |
| 839 | AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ | |
| 840 | AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ | |
| 841 | AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ | |
| 842 | AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ | |
| 843 | AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ | |
| 844 | }; | |
| 845 | }; | |
| 846 | ||
| e4541ff2 JCPV |
847 | pioA: gpio@fffff200 { |
| 848 | compatible = "atmel,at91rm9200-gpio"; | |
| 849 | reg = <0xfffff200 0x200>; | |
| 5e8b3bc3 | 850 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
851 | #gpio-cells = <2>; |
| 852 | gpio-controller; | |
| 853 | interrupt-controller; | |
| 854 | #interrupt-cells = <2>; | |
| 6f368c30 | 855 | clocks = <&pioA_clk>; |
| e4541ff2 JCPV |
856 | }; |
| 857 | ||
| 858 | pioB: gpio@fffff400 { | |
| 859 | compatible = "atmel,at91rm9200-gpio"; | |
| 860 | reg = <0xfffff400 0x200>; | |
| 5e8b3bc3 | 861 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
862 | #gpio-cells = <2>; |
| 863 | gpio-controller; | |
| 864 | interrupt-controller; | |
| 865 | #interrupt-cells = <2>; | |
| 6f368c30 | 866 | clocks = <&pioB_clk>; |
| e4541ff2 JCPV |
867 | }; |
| 868 | ||
| 869 | pioC: gpio@fffff600 { | |
| 870 | compatible = "atmel,at91rm9200-gpio"; | |
| 871 | reg = <0xfffff600 0x200>; | |
| 5e8b3bc3 | 872 | interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
873 | #gpio-cells = <2>; |
| 874 | gpio-controller; | |
| 875 | interrupt-controller; | |
| 876 | #interrupt-cells = <2>; | |
| 6f368c30 | 877 | clocks = <&pioC_clk>; |
| e4541ff2 JCPV |
878 | }; |
| 879 | ||
| 880 | pioD: gpio@fffff800 { | |
| 881 | compatible = "atmel,at91rm9200-gpio"; | |
| 882 | reg = <0xfffff800 0x200>; | |
| 5e8b3bc3 | 883 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
884 | #gpio-cells = <2>; |
| 885 | gpio-controller; | |
| 886 | interrupt-controller; | |
| 887 | #interrupt-cells = <2>; | |
| 6f368c30 | 888 | clocks = <&pioDE_clk>; |
| e4541ff2 JCPV |
889 | }; |
| 890 | ||
| 891 | pioE: gpio@fffffa00 { | |
| 892 | compatible = "atmel,at91rm9200-gpio"; | |
| 893 | reg = <0xfffffa00 0x200>; | |
| 5e8b3bc3 | 894 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; |
| e4541ff2 JCPV |
895 | #gpio-cells = <2>; |
| 896 | gpio-controller; | |
| 897 | interrupt-controller; | |
| 898 | #interrupt-cells = <2>; | |
| 6f368c30 | 899 | clocks = <&pioDE_clk>; |
| e4541ff2 | 900 | }; |
| 21f81872 NF |
901 | }; |
| 902 | ||
| 49fe2ba3 | 903 | dbgu: serial@ffffee00 { |
| 8c07f664 | 904 | compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; |
| 49fe2ba3 | 905 | reg = <0xffffee00 0x200>; |
| 5e8b3bc3 | 906 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| ec6754a7 JCPV |
907 | pinctrl-names = "default"; |
| 908 | pinctrl-0 = <&pinctrl_dbgu>; | |
| 6f368c30 AB |
909 | clocks = <&mck>; |
| 910 | clock-names = "usart"; | |
| 49fe2ba3 NF |
911 | status = "disabled"; |
| 912 | }; | |
| 913 | ||
| 914 | usart0: serial@fff8c000 { | |
| 915 | compatible = "atmel,at91sam9260-usart"; | |
| 916 | reg = <0xfff8c000 0x200>; | |
| 5e8b3bc3 | 917 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
918 | atmel,use-dma-rx; |
| 919 | atmel,use-dma-tx; | |
| ec6754a7 | 920 | pinctrl-names = "default"; |
| 9e3129e9 | 921 | pinctrl-0 = <&pinctrl_usart0>; |
| 6f368c30 AB |
922 | clocks = <&usart0_clk>; |
| 923 | clock-names = "usart"; | |
| 49fe2ba3 NF |
924 | status = "disabled"; |
| 925 | }; | |
| 926 | ||
| 927 | usart1: serial@fff90000 { | |
| 928 | compatible = "atmel,at91sam9260-usart"; | |
| 929 | reg = <0xfff90000 0x200>; | |
| 5e8b3bc3 | 930 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
931 | atmel,use-dma-rx; |
| 932 | atmel,use-dma-tx; | |
| ec6754a7 | 933 | pinctrl-names = "default"; |
| 9e3129e9 | 934 | pinctrl-0 = <&pinctrl_usart1>; |
| 6f368c30 AB |
935 | clocks = <&usart1_clk>; |
| 936 | clock-names = "usart"; | |
| 49fe2ba3 NF |
937 | status = "disabled"; |
| 938 | }; | |
| 939 | ||
| 940 | usart2: serial@fff94000 { | |
| 941 | compatible = "atmel,at91sam9260-usart"; | |
| 942 | reg = <0xfff94000 0x200>; | |
| 5e8b3bc3 | 943 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
944 | atmel,use-dma-rx; |
| 945 | atmel,use-dma-tx; | |
| ec6754a7 | 946 | pinctrl-names = "default"; |
| 9e3129e9 | 947 | pinctrl-0 = <&pinctrl_usart2>; |
| 6f368c30 AB |
948 | clocks = <&usart2_clk>; |
| 949 | clock-names = "usart"; | |
| 49fe2ba3 NF |
950 | status = "disabled"; |
| 951 | }; | |
| 952 | ||
| 953 | usart3: serial@fff98000 { | |
| 954 | compatible = "atmel,at91sam9260-usart"; | |
| 955 | reg = <0xfff98000 0x200>; | |
| 5e8b3bc3 | 956 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>; |
| 49fe2ba3 NF |
957 | atmel,use-dma-rx; |
| 958 | atmel,use-dma-tx; | |
| ec6754a7 | 959 | pinctrl-names = "default"; |
| 9e3129e9 | 960 | pinctrl-0 = <&pinctrl_usart3>; |
| 6f368c30 AB |
961 | clocks = <&usart3_clk>; |
| 962 | clock-names = "usart"; | |
| 49fe2ba3 NF |
963 | status = "disabled"; |
| 964 | }; | |
| 0d4f99d8 NF |
965 | |
| 966 | macb0: ethernet@fffbc000 { | |
| 9c348d45 | 967 | compatible = "cdns,at91sam9260-macb", "cdns,macb"; |
| 0d4f99d8 | 968 | reg = <0xfffbc000 0x100>; |
| 5e8b3bc3 | 969 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>; |
| d9b4fe83 JCPV |
970 | pinctrl-names = "default"; |
| 971 | pinctrl-0 = <&pinctrl_macb_rmii>; | |
| 6f368c30 AB |
972 | clocks = <&macb0_clk>, <&macb0_clk>; |
| 973 | clock-names = "hclk", "pclk"; | |
| 0d4f99d8 NF |
974 | status = "disabled"; |
| 975 | }; | |
| 93b298ba | 976 | |
| 3e16d322 BB |
977 | trng@fffcc000 { |
| 978 | compatible = "atmel,at91sam9g45-trng"; | |
| 979 | reg = <0xfffcc000 0x4000>; | |
| 980 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>; | |
| 981 | clocks = <&trng_clk>; | |
| 982 | }; | |
| 983 | ||
| 05dcd361 LD |
984 | i2c0: i2c@fff84000 { |
| 985 | compatible = "atmel,at91sam9g10-i2c"; | |
| 986 | reg = <0xfff84000 0x100>; | |
| 5e8b3bc3 | 987 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; |
| cd127e1d LD |
988 | pinctrl-names = "default"; |
| 989 | pinctrl-0 = <&pinctrl_i2c0>; | |
| 05dcd361 LD |
990 | #address-cells = <1>; |
| 991 | #size-cells = <0>; | |
| 6f368c30 | 992 | clocks = <&twi0_clk>; |
| 05dcd361 LD |
993 | status = "disabled"; |
| 994 | }; | |
| 995 | ||
| 996 | i2c1: i2c@fff88000 { | |
| 997 | compatible = "atmel,at91sam9g10-i2c"; | |
| 998 | reg = <0xfff88000 0x100>; | |
| 5e8b3bc3 | 999 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; |
| cd127e1d LD |
1000 | pinctrl-names = "default"; |
| 1001 | pinctrl-0 = <&pinctrl_i2c1>; | |
| 05dcd361 LD |
1002 | #address-cells = <1>; |
| 1003 | #size-cells = <0>; | |
| 6f368c30 | 1004 | clocks = <&twi1_clk>; |
| 05dcd361 LD |
1005 | status = "disabled"; |
| 1006 | }; | |
| 1007 | ||
| 099343c6 BS |
1008 | ssc0: ssc@fff9c000 { |
| 1009 | compatible = "atmel,at91sam9g45-ssc"; | |
| 1010 | reg = <0xfff9c000 0x4000>; | |
| 5e8b3bc3 | 1011 | interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; |
| 544ae6b2 BS |
1012 | pinctrl-names = "default"; |
| 1013 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | |
| 6f368c30 AB |
1014 | clocks = <&ssc0_clk>; |
| 1015 | clock-names = "pclk"; | |
| 315656bc | 1016 | status = "disabled"; |
| 099343c6 BS |
1017 | }; |
| 1018 | ||
| 1019 | ssc1: ssc@fffa0000 { | |
| 1020 | compatible = "atmel,at91sam9g45-ssc"; | |
| 1021 | reg = <0xfffa0000 0x4000>; | |
| 5e8b3bc3 | 1022 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; |
| 544ae6b2 BS |
1023 | pinctrl-names = "default"; |
| 1024 | pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; | |
| 6f368c30 AB |
1025 | clocks = <&ssc1_clk>; |
| 1026 | clock-names = "pclk"; | |
| 315656bc | 1027 | status = "disabled"; |
| 099343c6 BS |
1028 | }; |
| 1029 | ||
| 93b298ba | 1030 | adc0: adc@fffb0000 { |
| e1abeb72 AB |
1031 | #address-cells = <1>; |
| 1032 | #size-cells = <0>; | |
| 72e6caca | 1033 | compatible = "atmel,at91sam9g45-adc"; |
| 93b298ba | 1034 | reg = <0xfffb0000 0x100>; |
| 5e8b3bc3 | 1035 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; |
| 6f368c30 AB |
1036 | clocks = <&adc_clk>, <&adc_op_clk>; |
| 1037 | clock-names = "adc_clk", "adc_op_clk"; | |
| 93b298ba MR |
1038 | atmel,adc-channels-used = <0xff>; |
| 1039 | atmel,adc-vref = <3300>; | |
| 93b298ba | 1040 | atmel,adc-startup-time = <40>; |
| 4b50da65 LD |
1041 | atmel,adc-res = <8 10>; |
| 1042 | atmel,adc-res-names = "lowres", "highres"; | |
| 1043 | atmel,adc-use-res = "highres"; | |
| 93b298ba MR |
1044 | |
| 1045 | trigger@0 { | |
| e1abeb72 | 1046 | reg = <0>; |
| 93b298ba MR |
1047 | trigger-name = "external-rising"; |
| 1048 | trigger-value = <0x1>; | |
| 1049 | trigger-external; | |
| 1050 | }; | |
| 1051 | trigger@1 { | |
| e1abeb72 | 1052 | reg = <1>; |
| 93b298ba MR |
1053 | trigger-name = "external-falling"; |
| 1054 | trigger-value = <0x2>; | |
| 1055 | trigger-external; | |
| 1056 | }; | |
| 1057 | ||
| 1058 | trigger@2 { | |
| e1abeb72 | 1059 | reg = <2>; |
| 93b298ba MR |
1060 | trigger-name = "external-any"; |
| 1061 | trigger-value = <0x3>; | |
| 1062 | trigger-external; | |
| 1063 | }; | |
| 1064 | ||
| 1065 | trigger@3 { | |
| e1abeb72 | 1066 | reg = <3>; |
| 93b298ba MR |
1067 | trigger-name = "continuous"; |
| 1068 | trigger-value = <0x6>; | |
| 1069 | }; | |
| 1070 | }; | |
| 9873137a | 1071 | |
| accda273 BB |
1072 | isi@fffb4000 { |
| 1073 | compatible = "atmel,at91sam9g45-isi"; | |
| 1074 | reg = <0xfffb4000 0x4000>; | |
| 1075 | interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>; | |
| 1076 | clocks = <&isi_clk>; | |
| 1077 | clock-names = "isi_clk"; | |
| accda273 | 1078 | status = "disabled"; |
| 917cdc5f JW |
1079 | port { |
| 1080 | #address-cells = <1>; | |
| 1081 | #size-cells = <0>; | |
| 1082 | }; | |
| accda273 BB |
1083 | }; |
| 1084 | ||
| f3ab0527 BS |
1085 | pwm0: pwm@fffb8000 { |
| 1086 | compatible = "atmel,at91sam9rl-pwm"; | |
| 1087 | reg = <0xfffb8000 0x300>; | |
| 1088 | interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; | |
| 1089 | #pwm-cells = <3>; | |
| 6f368c30 | 1090 | clocks = <&pwm_clk>; |
| f3ab0527 BS |
1091 | status = "disabled"; |
| 1092 | }; | |
| 1093 | ||
| 9873137a LD |
1094 | mmc0: mmc@fff80000 { |
| 1095 | compatible = "atmel,hsmci"; | |
| 1096 | reg = <0xfff80000 0x600>; | |
| 5e8b3bc3 | 1097 | interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; |
| 0645b93f | 1098 | pinctrl-names = "default"; |
| d4ae89c8 | 1099 | dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; |
| 05c1bc97 | 1100 | dma-names = "rxtx"; |
| 9873137a LD |
1101 | #address-cells = <1>; |
| 1102 | #size-cells = <0>; | |
| 6f368c30 AB |
1103 | clocks = <&mci0_clk>; |
| 1104 | clock-names = "mci_clk"; | |
| 9873137a LD |
1105 | status = "disabled"; |
| 1106 | }; | |
| 1107 | ||
| 1108 | mmc1: mmc@fffd0000 { | |
| 1109 | compatible = "atmel,hsmci"; | |
| 1110 | reg = <0xfffd0000 0x600>; | |
| 5e8b3bc3 | 1111 | interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>; |
| 0645b93f | 1112 | pinctrl-names = "default"; |
| d4ae89c8 | 1113 | dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>; |
| 05c1bc97 | 1114 | dma-names = "rxtx"; |
| 9873137a LD |
1115 | #address-cells = <1>; |
| 1116 | #size-cells = <0>; | |
| 6f368c30 AB |
1117 | clocks = <&mci1_clk>; |
| 1118 | clock-names = "mci_clk"; | |
| 9873137a | 1119 | status = "disabled"; |
| db5b0ae0 LT |
1120 | }; |
| 1121 | ||
| 7492e7ca FP |
1122 | watchdog@fffffd40 { |
| 1123 | compatible = "atmel,at91sam9260-wdt"; | |
| 1124 | reg = <0xfffffd40 0x10>; | |
| fe46aa67 BB |
1125 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
| 1126 | atmel,watchdog-type = "hardware"; | |
| 1127 | atmel,reset-type = "all"; | |
| 1128 | atmel,dbg-halt; | |
| 7492e7ca | 1129 | status = "disabled"; |
| d50f88a0 RG |
1130 | }; |
| 1131 | ||
| 1132 | spi0: spi@fffa4000 { | |
| 1133 | #address-cells = <1>; | |
| 1134 | #size-cells = <0>; | |
| 1135 | compatible = "atmel,at91rm9200-spi"; | |
| 1136 | reg = <0xfffa4000 0x200>; | |
| 1137 | interrupts = <14 4 3>; | |
| a68b728f WY |
1138 | pinctrl-names = "default"; |
| 1139 | pinctrl-0 = <&pinctrl_spi0>; | |
| 6f368c30 AB |
1140 | clocks = <&spi0_clk>; |
| 1141 | clock-names = "spi_clk"; | |
| d50f88a0 RG |
1142 | status = "disabled"; |
| 1143 | }; | |
| 1144 | ||
| 1145 | spi1: spi@fffa8000 { | |
| 1146 | #address-cells = <1>; | |
| 1147 | #size-cells = <0>; | |
| 1148 | compatible = "atmel,at91rm9200-spi"; | |
| 1149 | reg = <0xfffa8000 0x200>; | |
| 1150 | interrupts = <15 4 3>; | |
| a68b728f WY |
1151 | pinctrl-names = "default"; |
| 1152 | pinctrl-0 = <&pinctrl_spi1>; | |
| 6f368c30 AB |
1153 | clocks = <&spi1_clk>; |
| 1154 | clock-names = "spi_clk"; | |
| d50f88a0 | 1155 | status = "disabled"; |
| 9873137a | 1156 | }; |
| 3cba498f JCPV |
1157 | |
| 1158 | usb2: gadget@fff78000 { | |
| 1159 | #address-cells = <1>; | |
| 1160 | #size-cells = <0>; | |
| 6540165c | 1161 | compatible = "atmel,at91sam9g45-udc"; |
| 3cba498f JCPV |
1162 | reg = <0x00600000 0x80000 |
| 1163 | 0xfff78000 0x400>; | |
| 1164 | interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; | |
| 6f368c30 AB |
1165 | clocks = <&udphs_clk>, <&utmi>; |
| 1166 | clock-names = "pclk", "hclk"; | |
| 3cba498f JCPV |
1167 | status = "disabled"; |
| 1168 | ||
| 1169 | ep0 { | |
| 1170 | reg = <0>; | |
| 1171 | atmel,fifo-size = <64>; | |
| 1172 | atmel,nb-banks = <1>; | |
| 1173 | }; | |
| 1174 | ||
| 1175 | ep1 { | |
| 1176 | reg = <1>; | |
| 1177 | atmel,fifo-size = <1024>; | |
| 1178 | atmel,nb-banks = <2>; | |
| 1179 | atmel,can-dma; | |
| 1180 | atmel,can-isoc; | |
| 1181 | }; | |
| 1182 | ||
| 1183 | ep2 { | |
| 1184 | reg = <2>; | |
| 1185 | atmel,fifo-size = <1024>; | |
| 1186 | atmel,nb-banks = <2>; | |
| 1187 | atmel,can-dma; | |
| 1188 | atmel,can-isoc; | |
| 1189 | }; | |
| 1190 | ||
| 1191 | ep3 { | |
| 1192 | reg = <3>; | |
| 1193 | atmel,fifo-size = <1024>; | |
| 1194 | atmel,nb-banks = <3>; | |
| 1195 | atmel,can-dma; | |
| 1196 | }; | |
| 1197 | ||
| 1198 | ep4 { | |
| 1199 | reg = <4>; | |
| 1200 | atmel,fifo-size = <1024>; | |
| 1201 | atmel,nb-banks = <3>; | |
| 1202 | atmel,can-dma; | |
| 1203 | }; | |
| 1204 | ||
| 1205 | ep5 { | |
| 1206 | reg = <5>; | |
| 1207 | atmel,fifo-size = <1024>; | |
| 1208 | atmel,nb-banks = <3>; | |
| 1209 | atmel,can-dma; | |
| 1210 | atmel,can-isoc; | |
| 1211 | }; | |
| 1212 | ||
| 1213 | ep6 { | |
| 1214 | reg = <6>; | |
| 1215 | atmel,fifo-size = <1024>; | |
| 1216 | atmel,nb-banks = <3>; | |
| 1217 | atmel,can-dma; | |
| 1218 | atmel,can-isoc; | |
| 1219 | }; | |
| 1220 | }; | |
| 97735da4 BB |
1221 | |
| 1222 | sckc@fffffd50 { | |
| 1223 | compatible = "atmel,at91sam9x5-sckc"; | |
| 1224 | reg = <0xfffffd50 0x4>; | |
| 1225 | ||
| 1226 | slow_osc: slow_osc { | |
| 1227 | compatible = "atmel,at91sam9x5-clk-slow-osc"; | |
| 1228 | #clock-cells = <0>; | |
| 1229 | atmel,startup-time-usec = <1200000>; | |
| 1230 | clocks = <&slow_xtal>; | |
| 1231 | }; | |
| 1232 | ||
| 1233 | slow_rc_osc: slow_rc_osc { | |
| 1234 | compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; | |
| 1235 | #clock-cells = <0>; | |
| 1236 | atmel,startup-time-usec = <75>; | |
| 1237 | clock-frequency = <32768>; | |
| 1238 | clock-accuracy = <50000000>; | |
| 1239 | }; | |
| 1240 | ||
| 1241 | clk32k: slck { | |
| 1242 | compatible = "atmel,at91sam9x5-clk-slow"; | |
| 1243 | #clock-cells = <0>; | |
| 1244 | clocks = <&slow_rc_osc &slow_osc>; | |
| 1245 | }; | |
| 1246 | }; | |
| 4dd7933a | 1247 | |
| 9b5a0675 BB |
1248 | rtc@fffffd20 { |
| 1249 | compatible = "atmel,at91sam9260-rtt"; | |
| 1250 | reg = <0xfffffd20 0x10>; | |
| 1251 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| 1252 | clocks = <&clk32k>; | |
| 1253 | status = "disabled"; | |
| 1254 | }; | |
| 1255 | ||
| 4dd7933a EL |
1256 | rtc@fffffdb0 { |
| 1257 | compatible = "atmel,at91rm9200-rtc"; | |
| 1258 | reg = <0xfffffdb0 0x30>; | |
| 1259 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; | |
| 1260 | status = "disabled"; | |
| 1261 | }; | |
| 1ff3beca BB |
1262 | |
| 1263 | gpbr: syscon@fffffd60 { | |
| 1264 | compatible = "atmel,at91sam9260-gpbr", "syscon"; | |
| 1265 | reg = <0xfffffd60 0x10>; | |
| 1266 | status = "disabled"; | |
| 1267 | }; | |
| 49fe2ba3 | 1268 | }; |
| d6a01661 | 1269 | |
| ddee65b3 JCPV |
1270 | fb0: fb@0x00500000 { |
| 1271 | compatible = "atmel,at91sam9g45-lcdc"; | |
| 1272 | reg = <0x00500000 0x1000>; | |
| 1273 | interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; | |
| 1274 | pinctrl-names = "default"; | |
| 1275 | pinctrl-0 = <&pinctrl_fb>; | |
| 6f368c30 AB |
1276 | clocks = <&lcd_clk>, <&lcd_clk>; |
| 1277 | clock-names = "hclk", "lcdc_clk"; | |
| ddee65b3 JCPV |
1278 | status = "disabled"; |
| 1279 | }; | |
| 1280 | ||
| d6a01661 JCPV |
1281 | nand0: nand@40000000 { |
| 1282 | compatible = "atmel,at91rm9200-nand"; | |
| 1283 | #address-cells = <1>; | |
| 1284 | #size-cells = <1>; | |
| 1285 | reg = <0x40000000 0x10000000 | |
| 1286 | 0xffffe200 0x200 | |
| 1287 | >; | |
| 1288 | atmel,nand-addr-offset = <21>; | |
| 1289 | atmel,nand-cmd-offset = <22>; | |
| e8b2da6e | 1290 | atmel,nand-has-dma; |
| 7a38d450 JCPV |
1291 | pinctrl-names = "default"; |
| 1292 | pinctrl-0 = <&pinctrl_nand>; | |
| 92f8629b JCPV |
1293 | gpios = <&pioC 8 GPIO_ACTIVE_HIGH |
| 1294 | &pioC 14 GPIO_ACTIVE_HIGH | |
| d6a01661 JCPV |
1295 | 0 |
| 1296 | >; | |
| 1297 | status = "disabled"; | |
| 1298 | }; | |
| 6a062459 JCPV |
1299 | |
| 1300 | usb0: ohci@00700000 { | |
| 1301 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | |
| 1302 | reg = <0x00700000 0x100000>; | |
| 5e8b3bc3 | 1303 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
| f8073708 BB |
1304 | clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; |
| 1305 | clock-names = "ohci_clk", "hclk", "uhpck"; | |
| 6a062459 JCPV |
1306 | status = "disabled"; |
| 1307 | }; | |
| 62c5553a JCPV |
1308 | |
| 1309 | usb1: ehci@00800000 { | |
| 1310 | compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; | |
| 1311 | reg = <0x00800000 0x100000>; | |
| 5e8b3bc3 | 1312 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
| 855868a5 BB |
1313 | clocks = <&utmi>, <&uhphs_clk>; |
| 1314 | clock-names = "usb_clk", "ehci_clk"; | |
| 62c5553a JCPV |
1315 | status = "disabled"; |
| 1316 | }; | |
| 49fe2ba3 | 1317 | }; |
| 8f24bdaa JCPV |
1318 | |
| 1319 | i2c@0 { | |
| 1320 | compatible = "i2c-gpio"; | |
| 92f8629b JCPV |
1321 | gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */ |
| 1322 | &pioA 21 GPIO_ACTIVE_HIGH /* scl */ | |
| 8f24bdaa JCPV |
1323 | >; |
| 1324 | i2c-gpio,sda-open-drain; | |
| 1325 | i2c-gpio,scl-open-drain; | |
| 1326 | i2c-gpio,delay-us = <5>; /* ~100 kHz */ | |
| 1327 | #address-cells = <1>; | |
| 1328 | #size-cells = <0>; | |
| 1329 | status = "disabled"; | |
| 1330 | }; | |
| 49fe2ba3 | 1331 | }; |