[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi

/*
 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
 *                    applies to AT91SAM9G45, AT91SAM9M10,
 *                    AT91SAM9G46, AT91SAM9M11 SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9G45 family SoC";
	compatible = "atmel,at91sam9g45";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x70000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			ramc0: ramc@ffffe400 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe400 0x200
				       0xffffe600 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffd00 0x10>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4 7>;
			};


			shdwc@fffffd10 {
				compatible = "atmel,at91sam9rl-shdwc";
				reg = <0xfffffd10 0x10>;
			};

			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <18 4 0>;
			};

			tcb1: timer@fffd4000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffd4000 0x100>;
				interrupts = <18 4 0>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <21 4 0>;
			};

			pinctrl@fffff200 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff200 0xfffff200 0xa00>;

				pioA: gpio@fffff200 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff200 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff400 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff600 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <4 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffff800 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <5 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioE: gpio@fffffa00 {
					compatible = "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <5 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 4 7>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@fff98000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff98000 0x200>;
				interrupts = <10 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <25 4 3>;
				status = "disabled";
			};

			i2c0: i2c@fff84000 {
				compatible = "atmel,at91sam9g10-i2c";
				reg = <0xfff84000 0x100>;
				interrupts = <12 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@fff88000 {
				compatible = "atmel,at91sam9g10-i2c";
				reg = <0xfff88000 0x100>;
				interrupts = <13 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			adc0: adc@fffb0000 {
				compatible = "atmel,at91sam9260-adc";
				reg = <0xfffb0000 0x100>;
				interrupts = <20 4 0>;
				atmel,adc-use-external-triggers;
				atmel,adc-channels-used = <0xff>;
				atmel,adc-vref = <3300>;
				atmel,adc-num-channels = <8>;
				atmel,adc-startup-time = <40>;
				atmel,adc-channel-base = <0x30>;
				atmel,adc-drdy-mask = <0x10000>;
				atmel,adc-status-register = <0x1c>;
				atmel,adc-trigger-register = <0x08>;

				trigger@0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};
				trigger@1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe200 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioC 8 0
				 &pioC 14 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00700000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};

		usb1: ehci@00800000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00800000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 20 0 /* sda */
			 &pioA 21 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
49fe2ba3 NF	1	/*
	2	* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
	3	* applies to AT91SAM9G45, AT91SAM9M10,
	4	* AT91SAM9G46, AT91SAM9M11 SoC
	5	*
	6	* Copyright (C) 2011 Atmel,
	7	* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9G45 family SoC";
	16	compatible = "atmel,at91sam9g45";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	serial4 = &usart3;
21f81872 NF	25	gpio0 = &pioA;
	26	gpio1 = &pioB;
	27	gpio2 = &pioC;
	28	gpio3 = &pioD;
	29	gpio4 = &pioE;
3a61a5da NF	30	tcb0 = &tcb0;
3a61a5da NF	31	tcb1 = &tcb1;
05dcd361 LD	32	i2c0 = &i2c0;
05dcd361 LD	33	i2c1 = &i2c1;
49fe2ba3 NF	34	};
	35	cpus {
	36	cpu@0 {
	37	compatible = "arm,arm926ejs";
	38	};
	39	};
	40
dcce6ce8	41	memory {
49fe2ba3 NF	42	reg = <0x70000000 0x10000000>;
	43	};
	44
	45	ahb {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	ranges;
	50
	51	apb {
	52	compatible = "simple-bus";
	53	#address-cells = <1>;
	54	#size-cells = <1>;
	55	ranges;
	56
	57	aic: interrupt-controller@fffff000 {
f8a073ee	58	#interrupt-cells = <3>;
49fe2ba3 NF	59	compatible = "atmel,at91rm9200-aic";
49fe2ba3 NF	60	interrupt-controller;
49fe2ba3	61	reg = <0xfffff000 0x200>;
c6573943	62	atmel,external-irqs = <31>;
49fe2ba3 NF	63	};
49fe2ba3 NF	64
a7776ec6 JCPV	65	ramc0: ramc@ffffe400 {
	66	compatible = "atmel,at91sam9g45-ddramc";
	67	reg = <0xffffe400 0x200
	68	0xffffe600 0x200>;
	69	};
	70
eb5e76ff JCPV	71	pmc: pmc@fffffc00 {
	72	compatible = "atmel,at91rm9200-pmc";
	73	reg = <0xfffffc00 0x100>;
	74	};
	75
c8082d34 JCPV	76	rstc@fffffd00 {
	77	compatible = "atmel,at91sam9g45-rstc";
	78	reg = <0xfffffd00 0x10>;
	79	};
	80
23fa648f JCPV	81	pit: timer@fffffd30 {
	82	compatible = "atmel,at91sam9260-pit";
	83	reg = <0xfffffd30 0xf>;
f8a073ee	84	interrupts = <1 4 7>;
23fa648f JCPV	85	};
23fa648f JCPV	86
3a61a5da	87
82015c4e JCPV	88	shdwc@fffffd10 {
	89	compatible = "atmel,at91sam9rl-shdwc";
	90	reg = <0xfffffd10 0x10>;
	91	};
	92
3a61a5da NF	93	tcb0: timer@fff7c000 {
	94	compatible = "atmel,at91rm9200-tcb";
	95	reg = <0xfff7c000 0x100>;
f8a073ee	96	interrupts = <18 4 0>;
3a61a5da NF	97	};
	98
	99	tcb1: timer@fffd4000 {
	100	compatible = "atmel,at91rm9200-tcb";
	101	reg = <0xfffd4000 0x100>;
f8a073ee	102	interrupts = <18 4 0>;
3a61a5da NF	103	};
3a61a5da NF	104
49fe2ba3 NF	105	dma: dma-controller@ffffec00 {
	106	compatible = "atmel,at91sam9g45-dma";
	107	reg = <0xffffec00 0x200>;
f8a073ee	108	interrupts = <21 4 0>;
49fe2ba3 NF	109	};
49fe2ba3 NF	110
e4541ff2 JCPV	111	pinctrl@fffff200 {
	112	#address-cells = <1>;
	113	#size-cells = <1>;
	114	compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
	115	ranges = <0xfffff200 0xfffff200 0xa00>;
	116
	117	pioA: gpio@fffff200 {
	118	compatible = "atmel,at91rm9200-gpio";
	119	reg = <0xfffff200 0x200>;
	120	interrupts = <2 4 1>;
	121	#gpio-cells = <2>;
	122	gpio-controller;
	123	interrupt-controller;
	124	#interrupt-cells = <2>;
	125	};
	126
	127	pioB: gpio@fffff400 {
	128	compatible = "atmel,at91rm9200-gpio";
	129	reg = <0xfffff400 0x200>;
	130	interrupts = <3 4 1>;
	131	#gpio-cells = <2>;
	132	gpio-controller;
	133	interrupt-controller;
	134	#interrupt-cells = <2>;
	135	};
	136
	137	pioC: gpio@fffff600 {
	138	compatible = "atmel,at91rm9200-gpio";
	139	reg = <0xfffff600 0x200>;
	140	interrupts = <4 4 1>;
	141	#gpio-cells = <2>;
	142	gpio-controller;
	143	interrupt-controller;
	144	#interrupt-cells = <2>;
	145	};
	146
	147	pioD: gpio@fffff800 {
	148	compatible = "atmel,at91rm9200-gpio";
	149	reg = <0xfffff800 0x200>;
	150	interrupts = <5 4 1>;
	151	#gpio-cells = <2>;
	152	gpio-controller;
	153	interrupt-controller;
	154	#interrupt-cells = <2>;
	155	};
	156
	157	pioE: gpio@fffffa00 {
	158	compatible = "atmel,at91rm9200-gpio";
	159	reg = <0xfffffa00 0x200>;
	160	interrupts = <5 4 1>;
	161	#gpio-cells = <2>;
	162	gpio-controller;
	163	interrupt-controller;
	164	#interrupt-cells = <2>;
	165	};
21f81872 NF	166	};
21f81872 NF	167
49fe2ba3 NF	168	dbgu: serial@ffffee00 {
	169	compatible = "atmel,at91sam9260-usart";
	170	reg = <0xffffee00 0x200>;
f8a073ee	171	interrupts = <1 4 7>;
49fe2ba3 NF	172	status = "disabled";
	173	};
	174
	175	usart0: serial@fff8c000 {
	176	compatible = "atmel,at91sam9260-usart";
	177	reg = <0xfff8c000 0x200>;
f8a073ee	178	interrupts = <7 4 5>;
49fe2ba3 NF	179	atmel,use-dma-rx;
	180	atmel,use-dma-tx;
	181	status = "disabled";
	182	};
	183
	184	usart1: serial@fff90000 {
	185	compatible = "atmel,at91sam9260-usart";
	186	reg = <0xfff90000 0x200>;
f8a073ee	187	interrupts = <8 4 5>;
49fe2ba3 NF	188	atmel,use-dma-rx;
	189	atmel,use-dma-tx;
	190	status = "disabled";
	191	};
	192
	193	usart2: serial@fff94000 {
	194	compatible = "atmel,at91sam9260-usart";
	195	reg = <0xfff94000 0x200>;
f8a073ee	196	interrupts = <9 4 5>;
49fe2ba3 NF	197	atmel,use-dma-rx;
	198	atmel,use-dma-tx;
	199	status = "disabled";
	200	};
	201
	202	usart3: serial@fff98000 {
	203	compatible = "atmel,at91sam9260-usart";
	204	reg = <0xfff98000 0x200>;
f8a073ee	205	interrupts = <10 4 5>;
49fe2ba3 NF	206	atmel,use-dma-rx;
	207	atmel,use-dma-tx;
	208	status = "disabled";
	209	};
0d4f99d8 NF	210
	211	macb0: ethernet@fffbc000 {
	212	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	213	reg = <0xfffbc000 0x100>;
f8a073ee	214	interrupts = <25 4 3>;
0d4f99d8 NF	215	status = "disabled";
0d4f99d8 NF	216	};
93b298ba	217
05dcd361 LD	218	i2c0: i2c@fff84000 {
	219	compatible = "atmel,at91sam9g10-i2c";
	220	reg = <0xfff84000 0x100>;
	221	interrupts = <12 4 6>;
	222	#address-cells = <1>;
	223	#size-cells = <0>;
	224	status = "disabled";
	225	};
	226
	227	i2c1: i2c@fff88000 {
	228	compatible = "atmel,at91sam9g10-i2c";
	229	reg = <0xfff88000 0x100>;
	230	interrupts = <13 4 6>;
	231	#address-cells = <1>;
	232	#size-cells = <0>;
	233	status = "disabled";
	234	};
	235
93b298ba MR	236	adc0: adc@fffb0000 {
	237	compatible = "atmel,at91sam9260-adc";
	238	reg = <0xfffb0000 0x100>;
f8a073ee	239	interrupts = <20 4 0>;
93b298ba MR	240	atmel,adc-use-external-triggers;
	241	atmel,adc-channels-used = <0xff>;
	242	atmel,adc-vref = <3300>;
	243	atmel,adc-num-channels = <8>;
	244	atmel,adc-startup-time = <40>;
	245	atmel,adc-channel-base = <0x30>;
	246	atmel,adc-drdy-mask = <0x10000>;
	247	atmel,adc-status-register = <0x1c>;
	248	atmel,adc-trigger-register = <0x08>;
	249
	250	trigger@0 {
	251	trigger-name = "external-rising";
	252	trigger-value = <0x1>;
	253	trigger-external;
	254	};
	255	trigger@1 {
	256	trigger-name = "external-falling";
	257	trigger-value = <0x2>;
	258	trigger-external;
	259	};
	260
	261	trigger@2 {
	262	trigger-name = "external-any";
	263	trigger-value = <0x3>;
	264	trigger-external;
	265	};
	266
	267	trigger@3 {
	268	trigger-name = "continuous";
	269	trigger-value = <0x6>;
	270	};
	271	};
49fe2ba3	272	};
d6a01661 JCPV	273
	274	nand0: nand@40000000 {
	275	compatible = "atmel,at91rm9200-nand";
	276	#address-cells = <1>;
	277	#size-cells = <1>;
	278	reg = <0x40000000 0x10000000
	279	0xffffe200 0x200
	280	>;
	281	atmel,nand-addr-offset = <21>;
	282	atmel,nand-cmd-offset = <22>;
	283	gpios = <&pioC 8 0
	284	&pioC 14 0
	285	0
	286	>;
	287	status = "disabled";
	288	};
6a062459 JCPV	289
	290	usb0: ohci@00700000 {
	291	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	292	reg = <0x00700000 0x100000>;
f8a073ee	293	interrupts = <22 4 2>;
6a062459 JCPV	294	status = "disabled";
6a062459 JCPV	295	};
62c5553a JCPV	296
	297	usb1: ehci@00800000 {
	298	compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	299	reg = <0x00800000 0x100000>;
f8a073ee	300	interrupts = <22 4 2>;
62c5553a JCPV	301	status = "disabled";
62c5553a JCPV	302	};
49fe2ba3	303	};
8f24bdaa JCPV	304
	305	i2c@0 {
	306	compatible = "i2c-gpio";
	307	gpios = <&pioA 20 0 /* sda */
	308	&pioA 21 0 /* scl */
	309	>;
	310	i2c-gpio,sda-open-drain;
	311	i2c-gpio,scl-open-drain;
	312	i2c-gpio,delay-us = <5>; /* ~100 kHz */
	313	#address-cells = <1>;
	314	#size-cells = <0>;
	315	status = "disabled";
	316	};
49fe2ba3	317	};