[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi

/*
 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
 *                    applies to AT91SAM9G45, AT91SAM9M10,
 *                    AT91SAM9G46, AT91SAM9M11 SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9G45 family SoC";
	compatible = "atmel,at91sam9g45";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory@70000000 {
		reg = <0x70000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <2>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				interrupt-parent;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe400 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe400 0x200
				       0xffffe600 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffd00 0x10>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4>;
			};


			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <18 4>;
			};

			tcb1: timer@fffd4000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffd4000 0x100>;
				interrupts = <18 4>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <21 4>;
			};

			pioA: gpio@fffff200 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff200 0x100>;
				interrupts = <2 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioB: gpio@fffff400 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff400 0x100>;
				interrupts = <3 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioC: gpio@fffff600 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff600 0x100>;
				interrupts = <4 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioD: gpio@fffff800 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff800 0x100>;
				interrupts = <5 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioE: gpio@fffffa00 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffffa00 0x100>;
				interrupts = <5 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 4>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@fff98000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff98000 0x200>;
				interrupts = <10 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <25 4>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe200 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioC 8 0
				 &pioC 14 0
				 0
				>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 20 0 /* sda */
			 &pioA 21 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
49fe2ba3 NF	1	/*
	2	* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
	3	* applies to AT91SAM9G45, AT91SAM9M10,
	4	* AT91SAM9G46, AT91SAM9M11 SoC
	5	*
	6	* Copyright (C) 2011 Atmel,
	7	* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9G45 family SoC";
	16	compatible = "atmel,at91sam9g45";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	serial4 = &usart3;
21f81872 NF	25	gpio0 = &pioA;
	26	gpio1 = &pioB;
	27	gpio2 = &pioC;
	28	gpio3 = &pioD;
	29	gpio4 = &pioE;
3a61a5da NF	30	tcb0 = &tcb0;
3a61a5da NF	31	tcb1 = &tcb1;
49fe2ba3 NF	32	};
	33	cpus {
	34	cpu@0 {
	35	compatible = "arm,arm926ejs";
	36	};
	37	};
	38
	39	memory@70000000 {
	40	reg = <0x70000000 0x10000000>;
	41	};
	42
	43	ahb {
	44	compatible = "simple-bus";
	45	#address-cells = <1>;
	46	#size-cells = <1>;
	47	ranges;
	48
	49	apb {
	50	compatible = "simple-bus";
	51	#address-cells = <1>;
	52	#size-cells = <1>;
	53	ranges;
	54
	55	aic: interrupt-controller@fffff000 {
e261501d	56	#interrupt-cells = <2>;
49fe2ba3 NF	57	compatible = "atmel,at91rm9200-aic";
	58	interrupt-controller;
	59	interrupt-parent;
	60	reg = <0xfffff000 0x200>;
	61	};
	62
a7776ec6 JCPV	63	ramc0: ramc@ffffe400 {
	64	compatible = "atmel,at91sam9g45-ddramc";
	65	reg = <0xffffe400 0x200
	66	0xffffe600 0x200>;
	67	};
	68
eb5e76ff JCPV	69	pmc: pmc@fffffc00 {
	70	compatible = "atmel,at91rm9200-pmc";
	71	reg = <0xfffffc00 0x100>;
	72	};
	73
c8082d34 JCPV	74	rstc@fffffd00 {
	75	compatible = "atmel,at91sam9g45-rstc";
	76	reg = <0xfffffd00 0x10>;
	77	};
	78
23fa648f JCPV	79	pit: timer@fffffd30 {
	80	compatible = "atmel,at91sam9260-pit";
	81	reg = <0xfffffd30 0xf>;
	82	interrupts = <1 4>;
	83	};
	84
3a61a5da NF	85
	86	tcb0: timer@fff7c000 {
	87	compatible = "atmel,at91rm9200-tcb";
	88	reg = <0xfff7c000 0x100>;
	89	interrupts = <18 4>;
	90	};
	91
	92	tcb1: timer@fffd4000 {
	93	compatible = "atmel,at91rm9200-tcb";
	94	reg = <0xfffd4000 0x100>;
	95	interrupts = <18 4>;
	96	};
	97
49fe2ba3 NF	98	dma: dma-controller@ffffec00 {
	99	compatible = "atmel,at91sam9g45-dma";
	100	reg = <0xffffec00 0x200>;
e261501d	101	interrupts = <21 4>;
49fe2ba3 NF	102	};
49fe2ba3 NF	103
21f81872 NF	104	pioA: gpio@fffff200 {
	105	compatible = "atmel,at91rm9200-gpio";
	106	reg = <0xfffff200 0x100>;
	107	interrupts = <2 4>;
	108	#gpio-cells = <2>;
	109	gpio-controller;
	110	interrupt-controller;
	111	};
	112
	113	pioB: gpio@fffff400 {
	114	compatible = "atmel,at91rm9200-gpio";
	115	reg = <0xfffff400 0x100>;
	116	interrupts = <3 4>;
	117	#gpio-cells = <2>;
	118	gpio-controller;
	119	interrupt-controller;
	120	};
	121
	122	pioC: gpio@fffff600 {
	123	compatible = "atmel,at91rm9200-gpio";
	124	reg = <0xfffff600 0x100>;
	125	interrupts = <4 4>;
	126	#gpio-cells = <2>;
	127	gpio-controller;
	128	interrupt-controller;
	129	};
	130
	131	pioD: gpio@fffff800 {
	132	compatible = "atmel,at91rm9200-gpio";
	133	reg = <0xfffff800 0x100>;
	134	interrupts = <5 4>;
	135	#gpio-cells = <2>;
	136	gpio-controller;
	137	interrupt-controller;
	138	};
	139
	140	pioE: gpio@fffffa00 {
	141	compatible = "atmel,at91rm9200-gpio";
	142	reg = <0xfffffa00 0x100>;
	143	interrupts = <5 4>;
	144	#gpio-cells = <2>;
	145	gpio-controller;
	146	interrupt-controller;
	147	};
	148
49fe2ba3 NF	149	dbgu: serial@ffffee00 {
	150	compatible = "atmel,at91sam9260-usart";
	151	reg = <0xffffee00 0x200>;
e261501d	152	interrupts = <1 4>;
49fe2ba3 NF	153	status = "disabled";
	154	};
	155
	156	usart0: serial@fff8c000 {
	157	compatible = "atmel,at91sam9260-usart";
	158	reg = <0xfff8c000 0x200>;
e261501d	159	interrupts = <7 4>;
49fe2ba3 NF	160	atmel,use-dma-rx;
	161	atmel,use-dma-tx;
	162	status = "disabled";
	163	};
	164
	165	usart1: serial@fff90000 {
	166	compatible = "atmel,at91sam9260-usart";
	167	reg = <0xfff90000 0x200>;
e261501d	168	interrupts = <8 4>;
49fe2ba3 NF	169	atmel,use-dma-rx;
	170	atmel,use-dma-tx;
	171	status = "disabled";
	172	};
	173
	174	usart2: serial@fff94000 {
	175	compatible = "atmel,at91sam9260-usart";
	176	reg = <0xfff94000 0x200>;
e261501d	177	interrupts = <9 4>;
49fe2ba3 NF	178	atmel,use-dma-rx;
	179	atmel,use-dma-tx;
	180	status = "disabled";
	181	};
	182
	183	usart3: serial@fff98000 {
	184	compatible = "atmel,at91sam9260-usart";
	185	reg = <0xfff98000 0x200>;
e261501d	186	interrupts = <10 4>;
49fe2ba3 NF	187	atmel,use-dma-rx;
	188	atmel,use-dma-tx;
	189	status = "disabled";
	190	};
0d4f99d8 NF	191
	192	macb0: ethernet@fffbc000 {
	193	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	194	reg = <0xfffbc000 0x100>;
e261501d	195	interrupts = <25 4>;
0d4f99d8 NF	196	status = "disabled";
0d4f99d8 NF	197	};
49fe2ba3	198	};
d6a01661 JCPV	199
	200	nand0: nand@40000000 {
	201	compatible = "atmel,at91rm9200-nand";
	202	#address-cells = <1>;
	203	#size-cells = <1>;
	204	reg = <0x40000000 0x10000000
	205	0xffffe200 0x200
	206	>;
	207	atmel,nand-addr-offset = <21>;
	208	atmel,nand-cmd-offset = <22>;
	209	gpios = <&pioC 8 0
	210	&pioC 14 0
	211	0
	212	>;
	213	status = "disabled";
	214	};
49fe2ba3	215	};
8f24bdaa JCPV	216
	217	i2c@0 {
	218	compatible = "i2c-gpio";
	219	gpios = <&pioA 20 0 /* sda */
	220	&pioA 21 0 /* scl */
	221	>;
	222	i2c-gpio,sda-open-drain;
	223	i2c-gpio,scl-open-drain;
	224	i2c-gpio,delay-us = <5>; /* ~100 kHz */
	225	#address-cells = <1>;
	226	#size-cells = <0>;
	227	status = "disabled";
	228	};
49fe2ba3	229	};