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ARM: at91: sama5d3: enable qt1070 as a wakeup source
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
CommitLineData
49fe2ba3
NF		 1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
d4ae89c8 13#include <dt-bindings/dma/at91.h>
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
49fe2ba3
NF		 17
18/ {
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
21f81872
NF		 29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 gpio3 = &pioD;
33 gpio4 = &pioE;
3a61a5da
NF		 34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
05dcd361
LD		 36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
099343c6
BS		 38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
49fe2ba3
NF		 40 };
41 cpus {
e757a6ee
LP		 42 #address-cells = <0>;
43 #size-cells = <0>;
44
45 cpu {
46 compatible = "arm,arm926ej-s";
47 device_type = "cpu";
49fe2ba3
NF		 48 };
49 };
50
dcce6ce8 51 memory {
49fe2ba3
NF		 52 reg = <0x70000000 0x10000000>;
53 };
54
55 ahb {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60
61 apb {
62 compatible = "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 aic: interrupt-controller@fffff000 {
f8a073ee 68 #interrupt-cells = <3>;
49fe2ba3
NF		 69 compatible = "atmel,at91rm9200-aic";
70 interrupt-controller;
49fe2ba3 71 reg = <0xfffff000 0x200>;
c6573943 72 atmel,external-irqs = <31>;
49fe2ba3
NF		 73 };
74
a7776ec6
JCPV		 75 ramc0: ramc@ffffe400 {
76 compatible = "atmel,at91sam9g45-ddramc";
77 reg = <0xffffe400 0x200
78 0xffffe600 0x200>;
79 };
80
eb5e76ff
JCPV		 81 pmc: pmc@fffffc00 {
82 compatible = "atmel,at91rm9200-pmc";
83 reg = <0xfffffc00 0x100>;
84 };
85
c8082d34
JCPV		 86 rstc@fffffd00 {
87 compatible = "atmel,at91sam9g45-rstc";
88 reg = <0xfffffd00 0x10>;
89 };
90
23fa648f
JCPV		 91 pit: timer@fffffd30 {
92 compatible = "atmel,at91sam9260-pit";
93 reg = <0xfffffd30 0xf>;
5e8b3bc3 94 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
23fa648f
JCPV		 95 };
96
3a61a5da 97
82015c4e
JCPV		 98 shdwc@fffffd10 {
99 compatible = "atmel,at91sam9rl-shdwc";
100 reg = <0xfffffd10 0x10>;
101 };
102
3a61a5da
NF		 103 tcb0: timer@fff7c000 {
104 compatible = "atmel,at91rm9200-tcb";
105 reg = <0xfff7c000 0x100>;
5e8b3bc3 106 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 107 };
108
109 tcb1: timer@fffd4000 {
110 compatible = "atmel,at91rm9200-tcb";
111 reg = <0xfffd4000 0x100>;
5e8b3bc3 112 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 113 };
114
49fe2ba3
NF		 115 dma: dma-controller@ffffec00 {
116 compatible = "atmel,at91sam9g45-dma";
117 reg = <0xffffec00 0x200>;
5e8b3bc3 118 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 119 #dma-cells = <2>;
49fe2ba3
NF		 120 };
121
e4541ff2
JCPV		 122 pinctrl@fffff200 {
123 #address-cells = <1>;
124 #size-cells = <1>;
125 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
126 ranges = <0xfffff200 0xfffff200 0xa00>;
127
5314ec8e
JCPV		 128 atmel,mux-mask = <
129 /* A B */
130 0xffffffff 0xffc003ff /* pioA */
131 0xffffffff 0x800f8f00 /* pioB */
132 0xffffffff 0x00000e00 /* pioC */
133 0xffffffff 0xff0c1381 /* pioD */
134 0xffffffff 0x81ffff81 /* pioE */
135 >;
136
137 /* shared pinctrl settings */
ec6754a7
JCPV		 138 dbgu {
139 pinctrl_dbgu: dbgu-0 {
140 atmel,pins =
c9d0f317
JCPV		 141 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
142 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
ec6754a7
JCPV		 143 };
144 };
145
9e3129e9
JCPV		 146 usart0 {
147 pinctrl_usart0: usart0-0 {
ec6754a7 148 atmel,pins =
c9d0f317
JCPV		 149 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
150 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
ec6754a7
JCPV		 151 };
152
c58c0c5a 153 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 154 atmel,pins =
c9d0f317 155 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
c58c0c5a
JCPV		 156 };
157
158 pinctrl_usart0_cts: usart0_cts-0 {
159 atmel,pins =
c9d0f317 160 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
ec6754a7
JCPV		 161 };
162 };
163
164 uart1 {
9e3129e9 165 pinctrl_usart1: usart1-0 {
ec6754a7 166 atmel,pins =
c9d0f317
JCPV		 167 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
168 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
ec6754a7
JCPV		 169 };
170
c58c0c5a
JCPV		 171 pinctrl_usart1_rts: usart1_rts-0 {
172 atmel,pins =
c9d0f317 173 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
c58c0c5a
JCPV		 174 };
175
176 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 177 atmel,pins =
c9d0f317 178 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
ec6754a7
JCPV		 179 };
180 };
181
9e3129e9
JCPV		 182 usart2 {
183 pinctrl_usart2: usart2-0 {
ec6754a7 184 atmel,pins =
c9d0f317
JCPV		 185 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
186 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
ec6754a7
JCPV		 187 };
188
c58c0c5a 189 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 190 atmel,pins =
c9d0f317 191 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
c58c0c5a
JCPV		 192 };
193
194 pinctrl_usart2_cts: usart2_cts-0 {
195 atmel,pins =
c9d0f317 196 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
ec6754a7
JCPV		 197 };
198 };
199
9e3129e9
JCPV		 200 usart3 {
201 pinctrl_usart3: usart3-0 {
ec6754a7 202 atmel,pins =
c9d0f317
JCPV		 203 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
204 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
ec6754a7
JCPV		 205 };
206
c58c0c5a
JCPV		 207 pinctrl_usart3_rts: usart3_rts-0 {
208 atmel,pins =
c9d0f317 209 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
c58c0c5a
JCPV		 210 };
211
212 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 213 atmel,pins =
c9d0f317 214 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
ec6754a7
JCPV		 215 };
216 };
5314ec8e 217
7a38d450
JCPV		 218 nand {
219 pinctrl_nand: nand-0 {
220 atmel,pins =
c9d0f317
JCPV		 221 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
222 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
7a38d450
JCPV		 223 };
224 };
225
d9b4fe83
JCPV		 226 macb {
227 pinctrl_macb_rmii: macb_rmii-0 {
228 atmel,pins =
c9d0f317
JCPV		 229 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
230 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
231 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
232 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
233 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
234 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
235 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
236 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
237 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
238 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
d9b4fe83
JCPV		 239 };
240
241 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
242 atmel,pins =
c9d0f317
JCPV		 243 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
244 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
245 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
246 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
247 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
248 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
249 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
250 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
d9b4fe83
JCPV		 251 };
252 };
253
d4fe9ac7
JCPV		 254 mmc0 {
255 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
256 atmel,pins =
c9d0f317
JCPV		 257 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
258 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
259 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
d4fe9ac7
JCPV		 260 };
261
262 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
263 atmel,pins =
c9d0f317
JCPV		 264 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
265 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
266 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
d4fe9ac7
JCPV		 267 };
268
269 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
270 atmel,pins =
c9d0f317
JCPV		 271 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
272 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
273 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
274 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
d4fe9ac7
JCPV		 275 };
276 };
277
278 mmc1 {
279 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
280 atmel,pins =
c9d0f317
JCPV		 281 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
282 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
283 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
d4fe9ac7
JCPV		 284 };
285
286 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
287 atmel,pins =
c9d0f317
JCPV		 288 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
289 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
290 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
d4fe9ac7
JCPV		 291 };
292
293 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
294 atmel,pins =
c9d0f317
JCPV		 295 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
296 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
297 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
298 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
d4fe9ac7
JCPV		 299 };
300 };
301
544ae6b2
BS		 302 ssc0 {
303 pinctrl_ssc0_tx: ssc0_tx-0 {
304 atmel,pins =
c9d0f317
JCPV		 305 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
306 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
307 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
544ae6b2
BS		 308 };
309
310 pinctrl_ssc0_rx: ssc0_rx-0 {
311 atmel,pins =
c9d0f317
JCPV		 312 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
313 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
314 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
544ae6b2
BS		 315 };
316 };
317
318 ssc1 {
319 pinctrl_ssc1_tx: ssc1_tx-0 {
320 atmel,pins =
c9d0f317
JCPV		 321 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
322 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
323 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
544ae6b2
BS		 324 };
325
326 pinctrl_ssc1_rx: ssc1_rx-0 {
327 atmel,pins =
c9d0f317
JCPV		 328 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
329 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
330 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
544ae6b2
BS		 331 };
332 };
333
a68b728f
WY		 334 spi0 {
335 pinctrl_spi0: spi0-0 {
336 atmel,pins =
c9d0f317
JCPV		 337 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
338 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
339 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
a68b728f
WY		 340 };
341 };
342
343 spi1 {
344 pinctrl_spi1: spi1-0 {
345 atmel,pins =
c9d0f317
JCPV		 346 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
347 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
348 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
a68b728f
WY		 349 };
350 };
351
028633c2
BB		 352 tcb0 {
353 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
354 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
355 };
356
357 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
358 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
359 };
360
361 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
362 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
363 };
364
365 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
366 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
367 };
368
369 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
370 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
371 };
372
373 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
374 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
375 };
376
377 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
378 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
382 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
383 };
384
385 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
386 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
387 };
388 };
389
390 tcb1 {
391 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
392 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
393 };
394
395 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
396 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
397 };
398
399 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
400 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
401 };
402
403 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
404 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
405 };
406
407 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
408 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 };
410
411 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
412 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413 };
414
415 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
416 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 };
418
419 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
420 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
424 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 };
426 };
427
ddee65b3
JCPV		 428 fb {
429 pinctrl_fb: fb-0 {
430 atmel,pins =
431 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
432 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
433 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
434 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
435 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
436 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
437 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
438 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
439 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
440 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
441 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
442 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
443 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
444 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
445 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
446 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
447 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
448 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
449 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
450 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
451 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
452 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
453 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
454 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
455 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
456 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
457 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
458 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
459 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
460 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
461 };
462 };
463
e4541ff2
JCPV		 464 pioA: gpio@fffff200 {
465 compatible = "atmel,at91rm9200-gpio";
466 reg = <0xfffff200 0x200>;
5e8b3bc3 467 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 468 #gpio-cells = <2>;
469 gpio-controller;
470 interrupt-controller;
471 #interrupt-cells = <2>;
472 };
473
474 pioB: gpio@fffff400 {
475 compatible = "atmel,at91rm9200-gpio";
476 reg = <0xfffff400 0x200>;
5e8b3bc3 477 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 478 #gpio-cells = <2>;
479 gpio-controller;
480 interrupt-controller;
481 #interrupt-cells = <2>;
482 };
483
484 pioC: gpio@fffff600 {
485 compatible = "atmel,at91rm9200-gpio";
486 reg = <0xfffff600 0x200>;
5e8b3bc3 487 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 488 #gpio-cells = <2>;
489 gpio-controller;
490 interrupt-controller;
491 #interrupt-cells = <2>;
492 };
493
494 pioD: gpio@fffff800 {
495 compatible = "atmel,at91rm9200-gpio";
496 reg = <0xfffff800 0x200>;
5e8b3bc3 497 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 498 #gpio-cells = <2>;
499 gpio-controller;
500 interrupt-controller;
501 #interrupt-cells = <2>;
502 };
503
504 pioE: gpio@fffffa00 {
505 compatible = "atmel,at91rm9200-gpio";
506 reg = <0xfffffa00 0x200>;
5e8b3bc3 507 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 508 #gpio-cells = <2>;
509 gpio-controller;
510 interrupt-controller;
511 #interrupt-cells = <2>;
512 };
21f81872
NF		 513 };
514
49fe2ba3
NF		 515 dbgu: serial@ffffee00 {
516 compatible = "atmel,at91sam9260-usart";
517 reg = <0xffffee00 0x200>;
5e8b3bc3 518 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 519 pinctrl-names = "default";
520 pinctrl-0 = <&pinctrl_dbgu>;
49fe2ba3
NF		 521 status = "disabled";
522 };
523
524 usart0: serial@fff8c000 {
525 compatible = "atmel,at91sam9260-usart";
526 reg = <0xfff8c000 0x200>;
5e8b3bc3 527 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 528 atmel,use-dma-rx;
529 atmel,use-dma-tx;
ec6754a7 530 pinctrl-names = "default";
9e3129e9 531 pinctrl-0 = <&pinctrl_usart0>;
49fe2ba3
NF		 532 status = "disabled";
533 };
534
535 usart1: serial@fff90000 {
536 compatible = "atmel,at91sam9260-usart";
537 reg = <0xfff90000 0x200>;
5e8b3bc3 538 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 539 atmel,use-dma-rx;
540 atmel,use-dma-tx;
ec6754a7 541 pinctrl-names = "default";
9e3129e9 542 pinctrl-0 = <&pinctrl_usart1>;
49fe2ba3
NF		 543 status = "disabled";
544 };
545
546 usart2: serial@fff94000 {
547 compatible = "atmel,at91sam9260-usart";
548 reg = <0xfff94000 0x200>;
5e8b3bc3 549 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 550 atmel,use-dma-rx;
551 atmel,use-dma-tx;
ec6754a7 552 pinctrl-names = "default";
9e3129e9 553 pinctrl-0 = <&pinctrl_usart2>;
49fe2ba3
NF		 554 status = "disabled";
555 };
556
557 usart3: serial@fff98000 {
558 compatible = "atmel,at91sam9260-usart";
559 reg = <0xfff98000 0x200>;
5e8b3bc3 560 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 561 atmel,use-dma-rx;
562 atmel,use-dma-tx;
ec6754a7 563 pinctrl-names = "default";
9e3129e9 564 pinctrl-0 = <&pinctrl_usart3>;
49fe2ba3
NF		 565 status = "disabled";
566 };
0d4f99d8
NF		 567
568 macb0: ethernet@fffbc000 {
569 compatible = "cdns,at32ap7000-macb", "cdns,macb";
570 reg = <0xfffbc000 0x100>;
5e8b3bc3 571 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_macb_rmii>;
0d4f99d8
NF		 574 status = "disabled";
575 };
93b298ba 576
05dcd361
LD		 577 i2c0: i2c@fff84000 {
578 compatible = "atmel,at91sam9g10-i2c";
579 reg = <0xfff84000 0x100>;
5e8b3bc3 580 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD		 581 #address-cells = <1>;
582 #size-cells = <0>;
583 status = "disabled";
584 };
585
586 i2c1: i2c@fff88000 {
587 compatible = "atmel,at91sam9g10-i2c";
588 reg = <0xfff88000 0x100>;
5e8b3bc3 589 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
05dcd361
LD		 590 #address-cells = <1>;
591 #size-cells = <0>;
592 status = "disabled";
593 };
594
099343c6
BS		 595 ssc0: ssc@fff9c000 {
596 compatible = "atmel,at91sam9g45-ssc";
597 reg = <0xfff9c000 0x4000>;
5e8b3bc3 598 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 599 pinctrl-names = "default";
600 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc 601 status = "disabled";
099343c6
BS		 602 };
603
604 ssc1: ssc@fffa0000 {
605 compatible = "atmel,at91sam9g45-ssc";
606 reg = <0xfffa0000 0x4000>;
5e8b3bc3 607 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc 610 status = "disabled";
099343c6
BS		 611 };
612
93b298ba
MR		 613 adc0: adc@fffb0000 {
614 compatible = "atmel,at91sam9260-adc";
615 reg = <0xfffb0000 0x100>;
5e8b3bc3 616 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
93b298ba
MR		 617 atmel,adc-use-external-triggers;
618 atmel,adc-channels-used = <0xff>;
619 atmel,adc-vref = <3300>;
620 atmel,adc-num-channels = <8>;
621 atmel,adc-startup-time = <40>;
622 atmel,adc-channel-base = <0x30>;
623 atmel,adc-drdy-mask = <0x10000>;
624 atmel,adc-status-register = <0x1c>;
625 atmel,adc-trigger-register = <0x08>;
4b50da65
LD		 626 atmel,adc-res = <8 10>;
627 atmel,adc-res-names = "lowres", "highres";
628 atmel,adc-use-res = "highres";
93b298ba
MR		 629
630 trigger@0 {
631 trigger-name = "external-rising";
632 trigger-value = <0x1>;
633 trigger-external;
634 };
635 trigger@1 {
636 trigger-name = "external-falling";
637 trigger-value = <0x2>;
638 trigger-external;
639 };
640
641 trigger@2 {
642 trigger-name = "external-any";
643 trigger-value = <0x3>;
644 trigger-external;
645 };
646
647 trigger@3 {
648 trigger-name = "continuous";
649 trigger-value = <0x6>;
650 };
651 };
9873137a
LD		 652
653 mmc0: mmc@fff80000 {
654 compatible = "atmel,hsmci";
655 reg = <0xfff80000 0x600>;
5e8b3bc3 656 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 657 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 658 dma-names = "rxtx";
9873137a
LD		 659 #address-cells = <1>;
660 #size-cells = <0>;
661 status = "disabled";
662 };
663
664 mmc1: mmc@fffd0000 {
665 compatible = "atmel,hsmci";
666 reg = <0xfffd0000 0x600>;
5e8b3bc3 667 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 668 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
05c1bc97 669 dma-names = "rxtx";
9873137a
LD		 670 #address-cells = <1>;
671 #size-cells = <0>;
672 status = "disabled";
db5b0ae0
LT		 673 };
674
7492e7ca
FP		 675 watchdog@fffffd40 {
676 compatible = "atmel,at91sam9260-wdt";
677 reg = <0xfffffd40 0x10>;
678 status = "disabled";
d50f88a0
RG		 679 };
680
681 spi0: spi@fffa4000 {
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "atmel,at91rm9200-spi";
685 reg = <0xfffa4000 0x200>;
686 interrupts = <14 4 3>;
a68b728f
WY		 687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 689 status = "disabled";
690 };
691
692 spi1: spi@fffa8000 {
693 #address-cells = <1>;
694 #size-cells = <0>;
695 compatible = "atmel,at91rm9200-spi";
696 reg = <0xfffa8000 0x200>;
697 interrupts = <15 4 3>;
a68b728f
WY		 698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0 700 status = "disabled";
9873137a 701 };
3cba498f
JCPV		 702
703 usb2: gadget@fff78000 {
704 #address-cells = <1>;
705 #size-cells = <0>;
706 compatible = "atmel,at91sam9rl-udc";
707 reg = <0x00600000 0x80000
708 0xfff78000 0x400>;
709 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
710 status = "disabled";
711
712 ep0 {
713 reg = <0>;
714 atmel,fifo-size = <64>;
715 atmel,nb-banks = <1>;
716 };
717
718 ep1 {
719 reg = <1>;
720 atmel,fifo-size = <1024>;
721 atmel,nb-banks = <2>;
722 atmel,can-dma;
723 atmel,can-isoc;
724 };
725
726 ep2 {
727 reg = <2>;
728 atmel,fifo-size = <1024>;
729 atmel,nb-banks = <2>;
730 atmel,can-dma;
731 atmel,can-isoc;
732 };
733
734 ep3 {
735 reg = <3>;
736 atmel,fifo-size = <1024>;
737 atmel,nb-banks = <3>;
738 atmel,can-dma;
739 };
740
741 ep4 {
742 reg = <4>;
743 atmel,fifo-size = <1024>;
744 atmel,nb-banks = <3>;
745 atmel,can-dma;
746 };
747
748 ep5 {
749 reg = <5>;
750 atmel,fifo-size = <1024>;
751 atmel,nb-banks = <3>;
752 atmel,can-dma;
753 atmel,can-isoc;
754 };
755
756 ep6 {
757 reg = <6>;
758 atmel,fifo-size = <1024>;
759 atmel,nb-banks = <3>;
760 atmel,can-dma;
761 atmel,can-isoc;
762 };
763 };
49fe2ba3 764 };
d6a01661 765
ddee65b3
JCPV		 766 fb0: fb@0x00500000 {
767 compatible = "atmel,at91sam9g45-lcdc";
768 reg = <0x00500000 0x1000>;
769 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_fb>;
772 status = "disabled";
773 };
774
d6a01661
JCPV		 775 nand0: nand@40000000 {
776 compatible = "atmel,at91rm9200-nand";
777 #address-cells = <1>;
778 #size-cells = <1>;
779 reg = <0x40000000 0x10000000
780 0xffffe200 0x200
781 >;
782 atmel,nand-addr-offset = <21>;
783 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 784 pinctrl-names = "default";
785 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 786 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
787 &pioC 14 GPIO_ACTIVE_HIGH
d6a01661
JCPV		 788 0
789 >;
790 status = "disabled";
791 };
6a062459
JCPV		 792
793 usb0: ohci@00700000 {
794 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
795 reg = <0x00700000 0x100000>;
5e8b3bc3 796 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 797 status = "disabled";
798 };
62c5553a
JCPV		 799
800 usb1: ehci@00800000 {
801 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
802 reg = <0x00800000 0x100000>;
5e8b3bc3 803 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 804 status = "disabled";
805 };
49fe2ba3 806 };
8f24bdaa
JCPV		 807
808 i2c@0 {
809 compatible = "i2c-gpio";
92f8629b
JCPV		 810 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
811 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
8f24bdaa
JCPV		 812 >;
813 i2c-gpio,sda-open-drain;
814 i2c-gpio,scl-open-drain;
815 i2c-gpio,delay-us = <5>; /* ~100 kHz */
816 #address-cells = <1>;
817 #size-cells = <0>;
818 status = "disabled";
819 };
49fe2ba3 820};
Linux kernel - Deliverables
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