[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi

/*
 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
 *                    applies to AT91SAM9G45, AT91SAM9M10,
 *                    AT91SAM9G46, AT91SAM9M11 SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9G45 family SoC";
	compatible = "atmel,at91sam9g45";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		gpio4 = &pioE;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory@70000000 {
		reg = <0x70000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <2>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				interrupt-parent;
				reg = <0xfffff000 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffd00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffd00 0x10>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4>;
			};


			tcb0: timer@fff7c000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfff7c000 0x100>;
				interrupts = <18 4>;
			};

			tcb1: timer@fffd4000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffd4000 0x100>;
				interrupts = <18 4>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <21 4>;
			};

			pioA: gpio@fffff200 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff200 0x100>;
				interrupts = <2 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioB: gpio@fffff400 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff400 0x100>;
				interrupts = <3 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioC: gpio@fffff600 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff600 0x100>;
				interrupts = <4 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioD: gpio@fffff800 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff800 0x100>;
				interrupts = <5 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioE: gpio@fffffa00 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffffa00 0x100>;
				interrupts = <5 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			dbgu: serial@ffffee00 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xffffee00 0x200>;
				interrupts = <1 4>;
				status = "disabled";
			};

			usart0: serial@fff8c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff8c000 0x200>;
				interrupts = <7 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@fff90000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff90000 0x200>;
				interrupts = <8 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@fff94000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff94000 0x200>;
				interrupts = <9 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@fff98000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfff98000 0x200>;
				interrupts = <10 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			macb0: ethernet@fffbc000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffbc000 0x100>;
				interrupts = <25 4>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe200 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioC 8 0
				 &pioC 14 0
				 0
				>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 20 0 /* sda */
			 &pioA 21 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
49fe2ba3 NF	1	/*
	2	* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
	3	* applies to AT91SAM9G45, AT91SAM9M10,
	4	* AT91SAM9G46, AT91SAM9M11 SoC
	5	*
	6	* Copyright (C) 2011 Atmel,
	7	* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9G45 family SoC";
	16	compatible = "atmel,at91sam9g45";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	serial4 = &usart3;
21f81872 NF	25	gpio0 = &pioA;
	26	gpio1 = &pioB;
	27	gpio2 = &pioC;
	28	gpio3 = &pioD;
	29	gpio4 = &pioE;
3a61a5da NF	30	tcb0 = &tcb0;
3a61a5da NF	31	tcb1 = &tcb1;
49fe2ba3 NF	32	};
	33	cpus {
	34	cpu@0 {
	35	compatible = "arm,arm926ejs";
	36	};
	37	};
	38
	39	memory@70000000 {
	40	reg = <0x70000000 0x10000000>;
	41	};
	42
	43	ahb {
	44	compatible = "simple-bus";
	45	#address-cells = <1>;
	46	#size-cells = <1>;
	47	ranges;
	48
	49	apb {
	50	compatible = "simple-bus";
	51	#address-cells = <1>;
	52	#size-cells = <1>;
	53	ranges;
	54
	55	aic: interrupt-controller@fffff000 {
e261501d	56	#interrupt-cells = <2>;
49fe2ba3 NF	57	compatible = "atmel,at91rm9200-aic";
	58	interrupt-controller;
	59	interrupt-parent;
	60	reg = <0xfffff000 0x200>;
	61	};
	62
eb5e76ff JCPV	63	pmc: pmc@fffffc00 {
	64	compatible = "atmel,at91rm9200-pmc";
	65	reg = <0xfffffc00 0x100>;
	66	};
	67
c8082d34 JCPV	68	rstc@fffffd00 {
	69	compatible = "atmel,at91sam9g45-rstc";
	70	reg = <0xfffffd00 0x10>;
	71	};
	72
23fa648f JCPV	73	pit: timer@fffffd30 {
	74	compatible = "atmel,at91sam9260-pit";
	75	reg = <0xfffffd30 0xf>;
	76	interrupts = <1 4>;
	77	};
	78
3a61a5da NF	79
	80	tcb0: timer@fff7c000 {
	81	compatible = "atmel,at91rm9200-tcb";
	82	reg = <0xfff7c000 0x100>;
	83	interrupts = <18 4>;
	84	};
	85
	86	tcb1: timer@fffd4000 {
	87	compatible = "atmel,at91rm9200-tcb";
	88	reg = <0xfffd4000 0x100>;
	89	interrupts = <18 4>;
	90	};
	91
49fe2ba3 NF	92	dma: dma-controller@ffffec00 {
	93	compatible = "atmel,at91sam9g45-dma";
	94	reg = <0xffffec00 0x200>;
e261501d	95	interrupts = <21 4>;
49fe2ba3 NF	96	};
49fe2ba3 NF	97
21f81872 NF	98	pioA: gpio@fffff200 {
	99	compatible = "atmel,at91rm9200-gpio";
	100	reg = <0xfffff200 0x100>;
	101	interrupts = <2 4>;
	102	#gpio-cells = <2>;
	103	gpio-controller;
	104	interrupt-controller;
	105	};
	106
	107	pioB: gpio@fffff400 {
	108	compatible = "atmel,at91rm9200-gpio";
	109	reg = <0xfffff400 0x100>;
	110	interrupts = <3 4>;
	111	#gpio-cells = <2>;
	112	gpio-controller;
	113	interrupt-controller;
	114	};
	115
	116	pioC: gpio@fffff600 {
	117	compatible = "atmel,at91rm9200-gpio";
	118	reg = <0xfffff600 0x100>;
	119	interrupts = <4 4>;
	120	#gpio-cells = <2>;
	121	gpio-controller;
	122	interrupt-controller;
	123	};
	124
	125	pioD: gpio@fffff800 {
	126	compatible = "atmel,at91rm9200-gpio";
	127	reg = <0xfffff800 0x100>;
	128	interrupts = <5 4>;
	129	#gpio-cells = <2>;
	130	gpio-controller;
	131	interrupt-controller;
	132	};
	133
	134	pioE: gpio@fffffa00 {
	135	compatible = "atmel,at91rm9200-gpio";
	136	reg = <0xfffffa00 0x100>;
	137	interrupts = <5 4>;
	138	#gpio-cells = <2>;
	139	gpio-controller;
	140	interrupt-controller;
	141	};
	142
49fe2ba3 NF	143	dbgu: serial@ffffee00 {
	144	compatible = "atmel,at91sam9260-usart";
	145	reg = <0xffffee00 0x200>;
e261501d	146	interrupts = <1 4>;
49fe2ba3 NF	147	status = "disabled";
	148	};
	149
	150	usart0: serial@fff8c000 {
	151	compatible = "atmel,at91sam9260-usart";
	152	reg = <0xfff8c000 0x200>;
e261501d	153	interrupts = <7 4>;
49fe2ba3 NF	154	atmel,use-dma-rx;
	155	atmel,use-dma-tx;
	156	status = "disabled";
	157	};
	158
	159	usart1: serial@fff90000 {
	160	compatible = "atmel,at91sam9260-usart";
	161	reg = <0xfff90000 0x200>;
e261501d	162	interrupts = <8 4>;
49fe2ba3 NF	163	atmel,use-dma-rx;
	164	atmel,use-dma-tx;
	165	status = "disabled";
	166	};
	167
	168	usart2: serial@fff94000 {
	169	compatible = "atmel,at91sam9260-usart";
	170	reg = <0xfff94000 0x200>;
e261501d	171	interrupts = <9 4>;
49fe2ba3 NF	172	atmel,use-dma-rx;
	173	atmel,use-dma-tx;
	174	status = "disabled";
	175	};
	176
	177	usart3: serial@fff98000 {
	178	compatible = "atmel,at91sam9260-usart";
	179	reg = <0xfff98000 0x200>;
e261501d	180	interrupts = <10 4>;
49fe2ba3 NF	181	atmel,use-dma-rx;
	182	atmel,use-dma-tx;
	183	status = "disabled";
	184	};
0d4f99d8 NF	185
	186	macb0: ethernet@fffbc000 {
	187	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	188	reg = <0xfffbc000 0x100>;
e261501d	189	interrupts = <25 4>;
0d4f99d8 NF	190	status = "disabled";
0d4f99d8 NF	191	};
49fe2ba3	192	};
d6a01661 JCPV	193
	194	nand0: nand@40000000 {
	195	compatible = "atmel,at91rm9200-nand";
	196	#address-cells = <1>;
	197	#size-cells = <1>;
	198	reg = <0x40000000 0x10000000
	199	0xffffe200 0x200
	200	>;
	201	atmel,nand-addr-offset = <21>;
	202	atmel,nand-cmd-offset = <22>;
	203	gpios = <&pioC 8 0
	204	&pioC 14 0
	205	0
	206	>;
	207	status = "disabled";
	208	};
49fe2ba3	209	};
8f24bdaa JCPV	210
	211	i2c@0 {
	212	compatible = "i2c-gpio";
	213	gpios = <&pioA 20 0 /* sda */
	214	&pioA 21 0 /* scl */
	215	>;
	216	i2c-gpio,sda-open-drain;
	217	i2c-gpio,scl-open-drain;
	218	i2c-gpio,delay-us = <5>; /* ~100 kHz */
	219	#address-cells = <1>;
	220	#size-cells = <0>;
	221	status = "disabled";
	222	};
49fe2ba3	223	};