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ARM: at91/at91rm9200ek.dts: rearrange nodes in address ascending order
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
CommitLineData
49fe2ba3
NF		 1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
d4ae89c8 13#include <dt-bindings/dma/at91.h>
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
49fe2ba3
NF		 17
18/ {
19 model = "Atmel AT91SAM9G45 family SoC";
20 compatible = "atmel,at91sam9g45";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 serial4 = &usart3;
21f81872
NF		 29 gpio0 = &pioA;
30 gpio1 = &pioB;
31 gpio2 = &pioC;
32 gpio3 = &pioD;
33 gpio4 = &pioE;
3a61a5da
NF		 34 tcb0 = &tcb0;
35 tcb1 = &tcb1;
05dcd361
LD		 36 i2c0 = &i2c0;
37 i2c1 = &i2c1;
099343c6
BS		 38 ssc0 = &ssc0;
39 ssc1 = &ssc1;
49fe2ba3
NF		 40 };
41 cpus {
e757a6ee
LP		 42 #address-cells = <0>;
43 #size-cells = <0>;
44
45 cpu {
46 compatible = "arm,arm926ej-s";
47 device_type = "cpu";
49fe2ba3
NF		 48 };
49 };
50
dcce6ce8 51 memory {
49fe2ba3
NF		 52 reg = <0x70000000 0x10000000>;
53 };
54
55 ahb {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60
61 apb {
62 compatible = "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66
67 aic: interrupt-controller@fffff000 {
f8a073ee 68 #interrupt-cells = <3>;
49fe2ba3
NF		 69 compatible = "atmel,at91rm9200-aic";
70 interrupt-controller;
49fe2ba3 71 reg = <0xfffff000 0x200>;
c6573943 72 atmel,external-irqs = <31>;
49fe2ba3
NF		 73 };
74
a7776ec6
JCPV		 75 ramc0: ramc@ffffe400 {
76 compatible = "atmel,at91sam9g45-ddramc";
77 reg = <0xffffe400 0x200
78 0xffffe600 0x200>;
79 };
80
eb5e76ff
JCPV		 81 pmc: pmc@fffffc00 {
82 compatible = "atmel,at91rm9200-pmc";
83 reg = <0xfffffc00 0x100>;
84 };
85
c8082d34
JCPV		 86 rstc@fffffd00 {
87 compatible = "atmel,at91sam9g45-rstc";
88 reg = <0xfffffd00 0x10>;
89 };
90
23fa648f
JCPV		 91 pit: timer@fffffd30 {
92 compatible = "atmel,at91sam9260-pit";
93 reg = <0xfffffd30 0xf>;
5e8b3bc3 94 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
23fa648f
JCPV		 95 };
96
3a61a5da 97
82015c4e
JCPV		 98 shdwc@fffffd10 {
99 compatible = "atmel,at91sam9rl-shdwc";
100 reg = <0xfffffd10 0x10>;
101 };
102
3a61a5da
NF		 103 tcb0: timer@fff7c000 {
104 compatible = "atmel,at91rm9200-tcb";
105 reg = <0xfff7c000 0x100>;
5e8b3bc3 106 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 107 };
108
109 tcb1: timer@fffd4000 {
110 compatible = "atmel,at91rm9200-tcb";
111 reg = <0xfffd4000 0x100>;
5e8b3bc3 112 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
3a61a5da
NF		 113 };
114
49fe2ba3
NF		 115 dma: dma-controller@ffffec00 {
116 compatible = "atmel,at91sam9g45-dma";
117 reg = <0xffffec00 0x200>;
5e8b3bc3 118 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 119 #dma-cells = <2>;
49fe2ba3
NF		 120 };
121
e4541ff2
JCPV		 122 pinctrl@fffff200 {
123 #address-cells = <1>;
124 #size-cells = <1>;
125 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
126 ranges = <0xfffff200 0xfffff200 0xa00>;
127
5314ec8e
JCPV		 128 atmel,mux-mask = <
129 /* A B */
130 0xffffffff 0xffc003ff /* pioA */
131 0xffffffff 0x800f8f00 /* pioB */
132 0xffffffff 0x00000e00 /* pioC */
133 0xffffffff 0xff0c1381 /* pioD */
134 0xffffffff 0x81ffff81 /* pioE */
135 >;
136
137 /* shared pinctrl settings */
ec6754a7
JCPV		 138 dbgu {
139 pinctrl_dbgu: dbgu-0 {
140 atmel,pins =
c9d0f317
JCPV		 141 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
142 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
ec6754a7
JCPV		 143 };
144 };
145
cd127e1d
LD		 146 i2c0 {
147 pinctrl_i2c0: i2c0-0 {
148 atmel,pins =
149 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA21 periph A TWCK0 */
150 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
151 };
152 };
153
154 i2c1 {
155 pinctrl_i2c1: i2c1-0 {
156 atmel,pins =
157 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A TWCK1 */
158 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
159 };
160 };
161
9e3129e9
JCPV		 162 usart0 {
163 pinctrl_usart0: usart0-0 {
ec6754a7 164 atmel,pins =
c9d0f317
JCPV		 165 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
166 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
ec6754a7
JCPV		 167 };
168
c58c0c5a 169 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 170 atmel,pins =
c9d0f317 171 <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
c58c0c5a
JCPV		 172 };
173
174 pinctrl_usart0_cts: usart0_cts-0 {
175 atmel,pins =
c9d0f317 176 <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
ec6754a7
JCPV		 177 };
178 };
179
180 uart1 {
9e3129e9 181 pinctrl_usart1: usart1-0 {
ec6754a7 182 atmel,pins =
c9d0f317
JCPV		 183 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
184 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
ec6754a7
JCPV		 185 };
186
c58c0c5a
JCPV		 187 pinctrl_usart1_rts: usart1_rts-0 {
188 atmel,pins =
c9d0f317 189 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
c58c0c5a
JCPV		 190 };
191
192 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 193 atmel,pins =
c9d0f317 194 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
ec6754a7
JCPV		 195 };
196 };
197
9e3129e9
JCPV		 198 usart2 {
199 pinctrl_usart2: usart2-0 {
ec6754a7 200 atmel,pins =
c9d0f317
JCPV		 201 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
202 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
ec6754a7
JCPV		 203 };
204
c58c0c5a 205 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 206 atmel,pins =
c9d0f317 207 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
c58c0c5a
JCPV		 208 };
209
210 pinctrl_usart2_cts: usart2_cts-0 {
211 atmel,pins =
c9d0f317 212 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
ec6754a7
JCPV		 213 };
214 };
215
9e3129e9
JCPV		 216 usart3 {
217 pinctrl_usart3: usart3-0 {
ec6754a7 218 atmel,pins =
c9d0f317
JCPV		 219 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
220 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
ec6754a7
JCPV		 221 };
222
c58c0c5a
JCPV		 223 pinctrl_usart3_rts: usart3_rts-0 {
224 atmel,pins =
c9d0f317 225 <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
c58c0c5a
JCPV		 226 };
227
228 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 229 atmel,pins =
c9d0f317 230 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
ec6754a7
JCPV		 231 };
232 };
5314ec8e 233
7a38d450
JCPV		 234 nand {
235 pinctrl_nand: nand-0 {
236 atmel,pins =
c9d0f317
JCPV		 237 <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
238 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
7a38d450
JCPV		 239 };
240 };
241
d9b4fe83
JCPV		 242 macb {
243 pinctrl_macb_rmii: macb_rmii-0 {
244 atmel,pins =
c9d0f317
JCPV		 245 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
246 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
247 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
248 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
249 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
250 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
251 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
252 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
253 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
254 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
d9b4fe83
JCPV		 255 };
256
257 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
258 atmel,pins =
c9d0f317
JCPV		 259 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
260 AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
261 AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
262 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
263 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
264 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
265 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
266 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
d9b4fe83
JCPV		 267 };
268 };
269
d4fe9ac7
JCPV		 270 mmc0 {
271 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
272 atmel,pins =
c9d0f317
JCPV		 273 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
274 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
275 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
d4fe9ac7
JCPV		 276 };
277
278 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
279 atmel,pins =
c9d0f317
JCPV		 280 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
281 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
282 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
d4fe9ac7
JCPV		 283 };
284
285 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
286 atmel,pins =
c9d0f317
JCPV		 287 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
288 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
289 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
290 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
d4fe9ac7
JCPV		 291 };
292 };
293
294 mmc1 {
295 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
296 atmel,pins =
c9d0f317
JCPV		 297 <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
298 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
299 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
d4fe9ac7
JCPV		 300 };
301
302 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
303 atmel,pins =
c9d0f317
JCPV		 304 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
305 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
306 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
d4fe9ac7
JCPV		 307 };
308
309 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
310 atmel,pins =
c9d0f317
JCPV		 311 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
312 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
313 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
314 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
d4fe9ac7
JCPV		 315 };
316 };
317
544ae6b2
BS		 318 ssc0 {
319 pinctrl_ssc0_tx: ssc0_tx-0 {
320 atmel,pins =
c9d0f317
JCPV		 321 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
322 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
323 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
544ae6b2
BS		 324 };
325
326 pinctrl_ssc0_rx: ssc0_rx-0 {
327 atmel,pins =
c9d0f317
JCPV		 328 <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
329 AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
330 AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
544ae6b2
BS		 331 };
332 };
333
334 ssc1 {
335 pinctrl_ssc1_tx: ssc1_tx-0 {
336 atmel,pins =
c9d0f317
JCPV		 337 <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
338 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
339 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
544ae6b2
BS		 340 };
341
342 pinctrl_ssc1_rx: ssc1_rx-0 {
343 atmel,pins =
c9d0f317
JCPV		 344 <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
345 AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
346 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
544ae6b2
BS		 347 };
348 };
349
a68b728f
WY		 350 spi0 {
351 pinctrl_spi0: spi0-0 {
352 atmel,pins =
c9d0f317
JCPV		 353 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
354 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
355 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
a68b728f
WY		 356 };
357 };
358
359 spi1 {
360 pinctrl_spi1: spi1-0 {
361 atmel,pins =
c9d0f317
JCPV		 362 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
363 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
364 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
a68b728f
WY		 365 };
366 };
367
028633c2
BB		 368 tcb0 {
369 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
370 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
371 };
372
373 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
374 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
375 };
376
377 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
378 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 };
380
381 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
382 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
383 };
384
385 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
386 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
387 };
388
389 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
390 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
391 };
392
393 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
394 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
395 };
396
397 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
398 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
399 };
400
401 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
402 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
403 };
404 };
405
406 tcb1 {
407 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
408 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 };
410
411 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
412 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413 };
414
415 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
416 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 };
418
419 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
420 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
424 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
428 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
432 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
436 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
440 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 };
442 };
443
ddee65b3
JCPV		 444 fb {
445 pinctrl_fb: fb-0 {
446 atmel,pins =
447 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE0 periph A */
448 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE2 periph A */
449 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE3 periph A */
450 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE4 periph A */
451 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE5 periph A */
452 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE6 periph A */
453 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE7 periph A */
454 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE8 periph A */
455 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE9 periph A */
456 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE10 periph A */
457 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE11 periph A */
458 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE12 periph A */
459 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE13 periph A */
460 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE14 periph A */
461 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE15 periph A */
462 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE16 periph A */
463 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE17 periph A */
464 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE18 periph A */
465 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE19 periph A */
466 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE20 periph A */
467 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
468 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE22 periph A */
469 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
470 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
471 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
472 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
473 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
474 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
475 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
476 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
477 };
478 };
479
e4541ff2
JCPV		 480 pioA: gpio@fffff200 {
481 compatible = "atmel,at91rm9200-gpio";
482 reg = <0xfffff200 0x200>;
5e8b3bc3 483 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 484 #gpio-cells = <2>;
485 gpio-controller;
486 interrupt-controller;
487 #interrupt-cells = <2>;
488 };
489
490 pioB: gpio@fffff400 {
491 compatible = "atmel,at91rm9200-gpio";
492 reg = <0xfffff400 0x200>;
5e8b3bc3 493 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 494 #gpio-cells = <2>;
495 gpio-controller;
496 interrupt-controller;
497 #interrupt-cells = <2>;
498 };
499
500 pioC: gpio@fffff600 {
501 compatible = "atmel,at91rm9200-gpio";
502 reg = <0xfffff600 0x200>;
5e8b3bc3 503 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 504 #gpio-cells = <2>;
505 gpio-controller;
506 interrupt-controller;
507 #interrupt-cells = <2>;
508 };
509
510 pioD: gpio@fffff800 {
511 compatible = "atmel,at91rm9200-gpio";
512 reg = <0xfffff800 0x200>;
5e8b3bc3 513 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 514 #gpio-cells = <2>;
515 gpio-controller;
516 interrupt-controller;
517 #interrupt-cells = <2>;
518 };
519
520 pioE: gpio@fffffa00 {
521 compatible = "atmel,at91rm9200-gpio";
522 reg = <0xfffffa00 0x200>;
5e8b3bc3 523 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 524 #gpio-cells = <2>;
525 gpio-controller;
526 interrupt-controller;
527 #interrupt-cells = <2>;
528 };
21f81872
NF		 529 };
530
49fe2ba3
NF		 531 dbgu: serial@ffffee00 {
532 compatible = "atmel,at91sam9260-usart";
533 reg = <0xffffee00 0x200>;
5e8b3bc3 534 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 535 pinctrl-names = "default";
536 pinctrl-0 = <&pinctrl_dbgu>;
49fe2ba3
NF		 537 status = "disabled";
538 };
539
540 usart0: serial@fff8c000 {
541 compatible = "atmel,at91sam9260-usart";
542 reg = <0xfff8c000 0x200>;
5e8b3bc3 543 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 544 atmel,use-dma-rx;
545 atmel,use-dma-tx;
ec6754a7 546 pinctrl-names = "default";
9e3129e9 547 pinctrl-0 = <&pinctrl_usart0>;
49fe2ba3
NF		 548 status = "disabled";
549 };
550
551 usart1: serial@fff90000 {
552 compatible = "atmel,at91sam9260-usart";
553 reg = <0xfff90000 0x200>;
5e8b3bc3 554 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 555 atmel,use-dma-rx;
556 atmel,use-dma-tx;
ec6754a7 557 pinctrl-names = "default";
9e3129e9 558 pinctrl-0 = <&pinctrl_usart1>;
49fe2ba3
NF		 559 status = "disabled";
560 };
561
562 usart2: serial@fff94000 {
563 compatible = "atmel,at91sam9260-usart";
564 reg = <0xfff94000 0x200>;
5e8b3bc3 565 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 566 atmel,use-dma-rx;
567 atmel,use-dma-tx;
ec6754a7 568 pinctrl-names = "default";
9e3129e9 569 pinctrl-0 = <&pinctrl_usart2>;
49fe2ba3
NF		 570 status = "disabled";
571 };
572
573 usart3: serial@fff98000 {
574 compatible = "atmel,at91sam9260-usart";
575 reg = <0xfff98000 0x200>;
5e8b3bc3 576 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
49fe2ba3
NF		 577 atmel,use-dma-rx;
578 atmel,use-dma-tx;
ec6754a7 579 pinctrl-names = "default";
9e3129e9 580 pinctrl-0 = <&pinctrl_usart3>;
49fe2ba3
NF		 581 status = "disabled";
582 };
0d4f99d8
NF		 583
584 macb0: ethernet@fffbc000 {
585 compatible = "cdns,at32ap7000-macb", "cdns,macb";
586 reg = <0xfffbc000 0x100>;
5e8b3bc3 587 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_macb_rmii>;
0d4f99d8
NF		 590 status = "disabled";
591 };
93b298ba 592
05dcd361
LD		 593 i2c0: i2c@fff84000 {
594 compatible = "atmel,at91sam9g10-i2c";
595 reg = <0xfff84000 0x100>;
5e8b3bc3 596 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
cd127e1d
LD		 597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 599 #address-cells = <1>;
600 #size-cells = <0>;
601 status = "disabled";
602 };
603
604 i2c1: i2c@fff88000 {
605 compatible = "atmel,at91sam9g10-i2c";
606 reg = <0xfff88000 0x100>;
5e8b3bc3 607 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
cd127e1d
LD		 608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 610 #address-cells = <1>;
611 #size-cells = <0>;
612 status = "disabled";
613 };
614
099343c6
BS		 615 ssc0: ssc@fff9c000 {
616 compatible = "atmel,at91sam9g45-ssc";
617 reg = <0xfff9c000 0x4000>;
5e8b3bc3 618 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc 621 status = "disabled";
099343c6
BS		 622 };
623
624 ssc1: ssc@fffa0000 {
625 compatible = "atmel,at91sam9g45-ssc";
626 reg = <0xfffa0000 0x4000>;
5e8b3bc3 627 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 628 pinctrl-names = "default";
629 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc 630 status = "disabled";
099343c6
BS		 631 };
632
93b298ba
MR		 633 adc0: adc@fffb0000 {
634 compatible = "atmel,at91sam9260-adc";
635 reg = <0xfffb0000 0x100>;
5e8b3bc3 636 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
93b298ba
MR		 637 atmel,adc-use-external-triggers;
638 atmel,adc-channels-used = <0xff>;
639 atmel,adc-vref = <3300>;
640 atmel,adc-num-channels = <8>;
641 atmel,adc-startup-time = <40>;
642 atmel,adc-channel-base = <0x30>;
643 atmel,adc-drdy-mask = <0x10000>;
644 atmel,adc-status-register = <0x1c>;
645 atmel,adc-trigger-register = <0x08>;
4b50da65
LD		 646 atmel,adc-res = <8 10>;
647 atmel,adc-res-names = "lowres", "highres";
648 atmel,adc-use-res = "highres";
93b298ba
MR		 649
650 trigger@0 {
651 trigger-name = "external-rising";
652 trigger-value = <0x1>;
653 trigger-external;
654 };
655 trigger@1 {
656 trigger-name = "external-falling";
657 trigger-value = <0x2>;
658 trigger-external;
659 };
660
661 trigger@2 {
662 trigger-name = "external-any";
663 trigger-value = <0x3>;
664 trigger-external;
665 };
666
667 trigger@3 {
668 trigger-name = "continuous";
669 trigger-value = <0x6>;
670 };
671 };
9873137a
LD		 672
673 mmc0: mmc@fff80000 {
674 compatible = "atmel,hsmci";
675 reg = <0xfff80000 0x600>;
5e8b3bc3 676 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
0645b93f 677 pinctrl-names = "default";
d4ae89c8 678 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 679 dma-names = "rxtx";
9873137a
LD		 680 #address-cells = <1>;
681 #size-cells = <0>;
682 status = "disabled";
683 };
684
685 mmc1: mmc@fffd0000 {
686 compatible = "atmel,hsmci";
687 reg = <0xfffd0000 0x600>;
5e8b3bc3 688 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
0645b93f 689 pinctrl-names = "default";
d4ae89c8 690 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
05c1bc97 691 dma-names = "rxtx";
9873137a
LD		 692 #address-cells = <1>;
693 #size-cells = <0>;
694 status = "disabled";
db5b0ae0
LT		 695 };
696
7492e7ca
FP		 697 watchdog@fffffd40 {
698 compatible = "atmel,at91sam9260-wdt";
699 reg = <0xfffffd40 0x10>;
700 status = "disabled";
d50f88a0
RG		 701 };
702
703 spi0: spi@fffa4000 {
704 #address-cells = <1>;
705 #size-cells = <0>;
706 compatible = "atmel,at91rm9200-spi";
707 reg = <0xfffa4000 0x200>;
708 interrupts = <14 4 3>;
a68b728f
WY		 709 pinctrl-names = "default";
710 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 711 status = "disabled";
712 };
713
714 spi1: spi@fffa8000 {
715 #address-cells = <1>;
716 #size-cells = <0>;
717 compatible = "atmel,at91rm9200-spi";
718 reg = <0xfffa8000 0x200>;
719 interrupts = <15 4 3>;
a68b728f
WY		 720 pinctrl-names = "default";
721 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0 722 status = "disabled";
9873137a 723 };
3cba498f
JCPV		 724
725 usb2: gadget@fff78000 {
726 #address-cells = <1>;
727 #size-cells = <0>;
728 compatible = "atmel,at91sam9rl-udc";
729 reg = <0x00600000 0x80000
730 0xfff78000 0x400>;
731 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
732 status = "disabled";
733
734 ep0 {
735 reg = <0>;
736 atmel,fifo-size = <64>;
737 atmel,nb-banks = <1>;
738 };
739
740 ep1 {
741 reg = <1>;
742 atmel,fifo-size = <1024>;
743 atmel,nb-banks = <2>;
744 atmel,can-dma;
745 atmel,can-isoc;
746 };
747
748 ep2 {
749 reg = <2>;
750 atmel,fifo-size = <1024>;
751 atmel,nb-banks = <2>;
752 atmel,can-dma;
753 atmel,can-isoc;
754 };
755
756 ep3 {
757 reg = <3>;
758 atmel,fifo-size = <1024>;
759 atmel,nb-banks = <3>;
760 atmel,can-dma;
761 };
762
763 ep4 {
764 reg = <4>;
765 atmel,fifo-size = <1024>;
766 atmel,nb-banks = <3>;
767 atmel,can-dma;
768 };
769
770 ep5 {
771 reg = <5>;
772 atmel,fifo-size = <1024>;
773 atmel,nb-banks = <3>;
774 atmel,can-dma;
775 atmel,can-isoc;
776 };
777
778 ep6 {
779 reg = <6>;
780 atmel,fifo-size = <1024>;
781 atmel,nb-banks = <3>;
782 atmel,can-dma;
783 atmel,can-isoc;
784 };
785 };
49fe2ba3 786 };
d6a01661 787
ddee65b3
JCPV		 788 fb0: fb@0x00500000 {
789 compatible = "atmel,at91sam9g45-lcdc";
790 reg = <0x00500000 0x1000>;
791 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
792 pinctrl-names = "default";
793 pinctrl-0 = <&pinctrl_fb>;
794 status = "disabled";
795 };
796
d6a01661
JCPV		 797 nand0: nand@40000000 {
798 compatible = "atmel,at91rm9200-nand";
799 #address-cells = <1>;
800 #size-cells = <1>;
801 reg = <0x40000000 0x10000000
802 0xffffe200 0x200
803 >;
804 atmel,nand-addr-offset = <21>;
805 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 808 gpios = <&pioC 8 GPIO_ACTIVE_HIGH
809 &pioC 14 GPIO_ACTIVE_HIGH
d6a01661
JCPV		 810 0
811 >;
812 status = "disabled";
813 };
6a062459
JCPV		 814
815 usb0: ohci@00700000 {
816 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
817 reg = <0x00700000 0x100000>;
5e8b3bc3 818 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 819 status = "disabled";
820 };
62c5553a
JCPV		 821
822 usb1: ehci@00800000 {
823 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
824 reg = <0x00800000 0x100000>;
5e8b3bc3 825 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 826 status = "disabled";
827 };
49fe2ba3 828 };
8f24bdaa
JCPV		 829
830 i2c@0 {
831 compatible = "i2c-gpio";
92f8629b
JCPV		 832 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
833 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
8f24bdaa
JCPV		 834 >;
835 i2c-gpio,sda-open-drain;
836 i2c-gpio,scl-open-drain;
837 i2c-gpio,delay-us = <5>; /* ~100 kHz */
838 #address-cells = <1>;
839 #size-cells = <0>;
840 status = "disabled";
841 };
49fe2ba3 842};
Linux kernel - Deliverables
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