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ARM: at91: dts: add i2c dma support
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9g45.dtsi
CommitLineData
49fe2ba3
NF		 1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
21f81872
NF		 25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
3a61a5da
NF		 30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
05dcd361
LD		 32 i2c0 = &i2c0;
33 i2c1 = &i2c1;
099343c6
BS		 34 ssc0 = &ssc0;
35 ssc1 = &ssc1;
49fe2ba3
NF		 36 };
37 cpus {
38 cpu@0 {
39 compatible = "arm,arm926ejs";
40 };
41 };
42
dcce6ce8 43 memory {
49fe2ba3
NF		 44 reg = <0x70000000 0x10000000>;
45 };
46
47 ahb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 apb {
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 ranges;
58
59 aic: interrupt-controller@fffff000 {
f8a073ee 60 #interrupt-cells = <3>;
49fe2ba3
NF		 61 compatible = "atmel,at91rm9200-aic";
62 interrupt-controller;
49fe2ba3 63 reg = <0xfffff000 0x200>;
c6573943 64 atmel,external-irqs = <31>;
49fe2ba3
NF		 65 };
66
a7776ec6
JCPV		 67 ramc0: ramc@ffffe400 {
68 compatible = "atmel,at91sam9g45-ddramc";
69 reg = <0xffffe400 0x200
70 0xffffe600 0x200>;
71 };
72
eb5e76ff
JCPV		 73 pmc: pmc@fffffc00 {
74 compatible = "atmel,at91rm9200-pmc";
75 reg = <0xfffffc00 0x100>;
76 };
77
c8082d34
JCPV		 78 rstc@fffffd00 {
79 compatible = "atmel,at91sam9g45-rstc";
80 reg = <0xfffffd00 0x10>;
81 };
82
23fa648f
JCPV		 83 pit: timer@fffffd30 {
84 compatible = "atmel,at91sam9260-pit";
85 reg = <0xfffffd30 0xf>;
f8a073ee 86 interrupts = <1 4 7>;
23fa648f
JCPV		 87 };
88
3a61a5da 89
82015c4e
JCPV		 90 shdwc@fffffd10 {
91 compatible = "atmel,at91sam9rl-shdwc";
92 reg = <0xfffffd10 0x10>;
93 };
94
3a61a5da
NF		 95 tcb0: timer@fff7c000 {
96 compatible = "atmel,at91rm9200-tcb";
97 reg = <0xfff7c000 0x100>;
f8a073ee 98 interrupts = <18 4 0>;
3a61a5da
NF		 99 };
100
101 tcb1: timer@fffd4000 {
102 compatible = "atmel,at91rm9200-tcb";
103 reg = <0xfffd4000 0x100>;
f8a073ee 104 interrupts = <18 4 0>;
3a61a5da
NF		 105 };
106
49fe2ba3
NF		 107 dma: dma-controller@ffffec00 {
108 compatible = "atmel,at91sam9g45-dma";
109 reg = <0xffffec00 0x200>;
f8a073ee 110 interrupts = <21 4 0>;
980ce7d9 111 #dma-cells = <2>;
49fe2ba3
NF		 112 };
113
e4541ff2
JCPV		 114 pinctrl@fffff200 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
118 ranges = <0xfffff200 0xfffff200 0xa00>;
119
5314ec8e
JCPV		 120 atmel,mux-mask = <
121 /* A B */
122 0xffffffff 0xffc003ff /* pioA */
123 0xffffffff 0x800f8f00 /* pioB */
124 0xffffffff 0x00000e00 /* pioC */
125 0xffffffff 0xff0c1381 /* pioD */
126 0xffffffff 0x81ffff81 /* pioE */
127 >;
128
129 /* shared pinctrl settings */
ec6754a7
JCPV		 130 dbgu {
131 pinctrl_dbgu: dbgu-0 {
132 atmel,pins =
133 <1 12 0x1 0x0 /* PB12 periph A */
134 1 13 0x1 0x0>; /* PB13 periph A */
135 };
136 };
137
9e3129e9
JCPV		 138 usart0 {
139 pinctrl_usart0: usart0-0 {
ec6754a7
JCPV		 140 atmel,pins =
141 <1 19 0x1 0x1 /* PB19 periph A with pullup */
142 1 18 0x1 0x0>; /* PB18 periph A */
143 };
144
c58c0c5a 145 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 146 atmel,pins =
c58c0c5a
JCPV		 147 <1 17 0x2 0x0>; /* PB17 periph B */
148 };
149
150 pinctrl_usart0_cts: usart0_cts-0 {
151 atmel,pins =
152 <1 15 0x2 0x0>; /* PB15 periph B */
ec6754a7
JCPV		 153 };
154 };
155
156 uart1 {
9e3129e9 157 pinctrl_usart1: usart1-0 {
ec6754a7
JCPV		 158 atmel,pins =
159 <1 4 0x1 0x1 /* PB4 periph A with pullup */
160 1 5 0x1 0x0>; /* PB5 periph A */
161 };
162
c58c0c5a
JCPV		 163 pinctrl_usart1_rts: usart1_rts-0 {
164 atmel,pins =
165 <3 16 0x1 0x0>; /* PD16 periph A */
166 };
167
168 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 169 atmel,pins =
c58c0c5a 170 <3 17 0x1 0x0>; /* PD17 periph A */
ec6754a7
JCPV		 171 };
172 };
173
9e3129e9
JCPV		 174 usart2 {
175 pinctrl_usart2: usart2-0 {
ec6754a7
JCPV		 176 atmel,pins =
177 <1 6 0x1 0x1 /* PB6 periph A with pullup */
178 1 7 0x1 0x0>; /* PB7 periph A */
179 };
180
c58c0c5a 181 pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7 182 atmel,pins =
c58c0c5a
JCPV		 183 <2 9 0x2 0x0>; /* PC9 periph B */
184 };
185
186 pinctrl_usart2_cts: usart2_cts-0 {
187 atmel,pins =
188 <2 11 0x2 0x0>; /* PC11 periph B */
ec6754a7
JCPV		 189 };
190 };
191
9e3129e9
JCPV		 192 usart3 {
193 pinctrl_usart3: usart3-0 {
ec6754a7
JCPV		 194 atmel,pins =
195 <1 8 0x1 0x1 /* PB9 periph A with pullup */
196 1 9 0x1 0x0>; /* PB8 periph A */
197 };
198
c58c0c5a
JCPV		 199 pinctrl_usart3_rts: usart3_rts-0 {
200 atmel,pins =
201 <0 23 0x2 0x0>; /* PA23 periph B */
202 };
203
204 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 205 atmel,pins =
c58c0c5a 206 <0 24 0x2 0x0>; /* PA24 periph B */
ec6754a7
JCPV		 207 };
208 };
5314ec8e 209
7a38d450
JCPV		 210 nand {
211 pinctrl_nand: nand-0 {
212 atmel,pins =
213 <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
214 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
215 };
216 };
217
d9b4fe83
JCPV		 218 macb {
219 pinctrl_macb_rmii: macb_rmii-0 {
220 atmel,pins =
221 <0 10 0x1 0x0 /* PA10 periph A */
222 0 11 0x1 0x0 /* PA11 periph A */
223 0 12 0x1 0x0 /* PA12 periph A */
224 0 13 0x1 0x0 /* PA13 periph A */
225 0 14 0x1 0x0 /* PA14 periph A */
226 0 15 0x1 0x0 /* PA15 periph A */
227 0 16 0x1 0x0 /* PA16 periph A */
228 0 17 0x1 0x0 /* PA17 periph A */
229 0 18 0x1 0x0 /* PA18 periph A */
230 0 19 0x1 0x0>; /* PA19 periph A */
231 };
232
233 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
234 atmel,pins =
235 <0 6 0x2 0x0 /* PA6 periph B */
236 0 7 0x2 0x0 /* PA7 periph B */
237 0 8 0x2 0x0 /* PA8 periph B */
238 0 9 0x2 0x0 /* PA9 periph B */
239 0 27 0x2 0x0 /* PA27 periph B */
240 0 28 0x2 0x0 /* PA28 periph B */
241 0 29 0x2 0x0 /* PA29 periph B */
242 0 30 0x2 0x0>; /* PA30 periph B */
243 };
244 };
245
d4fe9ac7
JCPV		 246 mmc0 {
247 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
248 atmel,pins =
249 <0 0 0x1 0x0 /* PA0 periph A */
250 0 1 0x1 0x1 /* PA1 periph A with pullup */
251 0 2 0x1 0x1>; /* PA2 periph A with pullup */
252 };
253
254 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
255 atmel,pins =
256 <0 3 0x1 0x1 /* PA3 periph A with pullup */
257 0 4 0x1 0x1 /* PA4 periph A with pullup */
258 0 5 0x1 0x1>; /* PA5 periph A with pullup */
259 };
260
261 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
262 atmel,pins =
263 <0 6 0x1 0x1 /* PA6 periph A with pullup */
264 0 7 0x1 0x1 /* PA7 periph A with pullup */
265 0 8 0x1 0x1 /* PA8 periph A with pullup */
266 0 9 0x1 0x1>; /* PA9 periph A with pullup */
267 };
268 };
269
270 mmc1 {
271 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
272 atmel,pins =
273 <0 31 0x1 0x0 /* PA31 periph A */
274 0 22 0x1 0x1 /* PA22 periph A with pullup */
275 0 23 0x1 0x1>; /* PA23 periph A with pullup */
276 };
277
278 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
279 atmel,pins =
280 <0 24 0x1 0x1 /* PA24 periph A with pullup */
281 0 25 0x1 0x1 /* PA25 periph A with pullup */
282 0 26 0x1 0x1>; /* PA26 periph A with pullup */
283 };
284
285 pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
286 atmel,pins =
287 <0 27 0x1 0x1 /* PA27 periph A with pullup */
288 0 28 0x1 0x1 /* PA28 periph A with pullup */
289 0 29 0x1 0x1 /* PA29 periph A with pullup */
290 0 20 0x1 0x1>; /* PA30 periph A with pullup */
291 };
292 };
293
544ae6b2
BS		 294 ssc0 {
295 pinctrl_ssc0_tx: ssc0_tx-0 {
296 atmel,pins =
297 <3 0 0x1 0x0 /* PD0 periph A */
298 3 1 0x1 0x0 /* PD1 periph A */
299 3 2 0x1 0x0>; /* PD2 periph A */
300 };
301
302 pinctrl_ssc0_rx: ssc0_rx-0 {
303 atmel,pins =
304 <3 3 0x1 0x0 /* PD3 periph A */
305 3 4 0x1 0x0 /* PD4 periph A */
306 3 5 0x1 0x0>; /* PD5 periph A */
307 };
308 };
309
310 ssc1 {
311 pinctrl_ssc1_tx: ssc1_tx-0 {
312 atmel,pins =
313 <3 10 0x1 0x0 /* PD10 periph A */
314 3 11 0x1 0x0 /* PD11 periph A */
315 3 12 0x1 0x0>; /* PD12 periph A */
316 };
317
318 pinctrl_ssc1_rx: ssc1_rx-0 {
319 atmel,pins =
320 <3 13 0x1 0x0 /* PD13 periph A */
321 3 14 0x1 0x0 /* PD14 periph A */
322 3 15 0x1 0x0>; /* PD15 periph A */
323 };
324 };
325
e4541ff2
JCPV		 326 pioA: gpio@fffff200 {
327 compatible = "atmel,at91rm9200-gpio";
328 reg = <0xfffff200 0x200>;
329 interrupts = <2 4 1>;
330 #gpio-cells = <2>;
331 gpio-controller;
332 interrupt-controller;
333 #interrupt-cells = <2>;
334 };
335
336 pioB: gpio@fffff400 {
337 compatible = "atmel,at91rm9200-gpio";
338 reg = <0xfffff400 0x200>;
339 interrupts = <3 4 1>;
340 #gpio-cells = <2>;
341 gpio-controller;
342 interrupt-controller;
343 #interrupt-cells = <2>;
344 };
345
346 pioC: gpio@fffff600 {
347 compatible = "atmel,at91rm9200-gpio";
348 reg = <0xfffff600 0x200>;
349 interrupts = <4 4 1>;
350 #gpio-cells = <2>;
351 gpio-controller;
352 interrupt-controller;
353 #interrupt-cells = <2>;
354 };
355
356 pioD: gpio@fffff800 {
357 compatible = "atmel,at91rm9200-gpio";
358 reg = <0xfffff800 0x200>;
359 interrupts = <5 4 1>;
360 #gpio-cells = <2>;
361 gpio-controller;
362 interrupt-controller;
363 #interrupt-cells = <2>;
364 };
365
366 pioE: gpio@fffffa00 {
367 compatible = "atmel,at91rm9200-gpio";
368 reg = <0xfffffa00 0x200>;
369 interrupts = <5 4 1>;
370 #gpio-cells = <2>;
371 gpio-controller;
372 interrupt-controller;
373 #interrupt-cells = <2>;
374 };
21f81872
NF		 375 };
376
49fe2ba3
NF		 377 dbgu: serial@ffffee00 {
378 compatible = "atmel,at91sam9260-usart";
379 reg = <0xffffee00 0x200>;
f8a073ee 380 interrupts = <1 4 7>;
ec6754a7
JCPV		 381 pinctrl-names = "default";
382 pinctrl-0 = <&pinctrl_dbgu>;
49fe2ba3
NF		 383 status = "disabled";
384 };
385
386 usart0: serial@fff8c000 {
387 compatible = "atmel,at91sam9260-usart";
388 reg = <0xfff8c000 0x200>;
f8a073ee 389 interrupts = <7 4 5>;
49fe2ba3
NF		 390 atmel,use-dma-rx;
391 atmel,use-dma-tx;
ec6754a7 392 pinctrl-names = "default";
9e3129e9 393 pinctrl-0 = <&pinctrl_usart0>;
49fe2ba3
NF		 394 status = "disabled";
395 };
396
397 usart1: serial@fff90000 {
398 compatible = "atmel,at91sam9260-usart";
399 reg = <0xfff90000 0x200>;
f8a073ee 400 interrupts = <8 4 5>;
49fe2ba3
NF		 401 atmel,use-dma-rx;
402 atmel,use-dma-tx;
ec6754a7 403 pinctrl-names = "default";
9e3129e9 404 pinctrl-0 = <&pinctrl_usart1>;
49fe2ba3
NF		 405 status = "disabled";
406 };
407
408 usart2: serial@fff94000 {
409 compatible = "atmel,at91sam9260-usart";
410 reg = <0xfff94000 0x200>;
f8a073ee 411 interrupts = <9 4 5>;
49fe2ba3
NF		 412 atmel,use-dma-rx;
413 atmel,use-dma-tx;
ec6754a7 414 pinctrl-names = "default";
9e3129e9 415 pinctrl-0 = <&pinctrl_usart2>;
49fe2ba3
NF		 416 status = "disabled";
417 };
418
419 usart3: serial@fff98000 {
420 compatible = "atmel,at91sam9260-usart";
421 reg = <0xfff98000 0x200>;
f8a073ee 422 interrupts = <10 4 5>;
49fe2ba3
NF		 423 atmel,use-dma-rx;
424 atmel,use-dma-tx;
ec6754a7 425 pinctrl-names = "default";
9e3129e9 426 pinctrl-0 = <&pinctrl_usart3>;
49fe2ba3
NF		 427 status = "disabled";
428 };
0d4f99d8
NF		 429
430 macb0: ethernet@fffbc000 {
431 compatible = "cdns,at32ap7000-macb", "cdns,macb";
432 reg = <0xfffbc000 0x100>;
f8a073ee 433 interrupts = <25 4 3>;
d9b4fe83
JCPV		 434 pinctrl-names = "default";
435 pinctrl-0 = <&pinctrl_macb_rmii>;
0d4f99d8
NF		 436 status = "disabled";
437 };
93b298ba 438
05dcd361
LD		 439 i2c0: i2c@fff84000 {
440 compatible = "atmel,at91sam9g10-i2c";
441 reg = <0xfff84000 0x100>;
442 interrupts = <12 4 6>;
443 #address-cells = <1>;
444 #size-cells = <0>;
445 status = "disabled";
446 };
447
448 i2c1: i2c@fff88000 {
449 compatible = "atmel,at91sam9g10-i2c";
450 reg = <0xfff88000 0x100>;
451 interrupts = <13 4 6>;
452 #address-cells = <1>;
453 #size-cells = <0>;
454 status = "disabled";
455 };
456
099343c6
BS		 457 ssc0: ssc@fff9c000 {
458 compatible = "atmel,at91sam9g45-ssc";
459 reg = <0xfff9c000 0x4000>;
460 interrupts = <16 4 5>;
544ae6b2
BS		 461 pinctrl-names = "default";
462 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
315656bc 463 status = "disabled";
099343c6
BS		 464 };
465
466 ssc1: ssc@fffa0000 {
467 compatible = "atmel,at91sam9g45-ssc";
468 reg = <0xfffa0000 0x4000>;
469 interrupts = <17 4 5>;
544ae6b2
BS		 470 pinctrl-names = "default";
471 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
315656bc 472 status = "disabled";
099343c6
BS		 473 };
474
93b298ba
MR		 475 adc0: adc@fffb0000 {
476 compatible = "atmel,at91sam9260-adc";
477 reg = <0xfffb0000 0x100>;
f8a073ee 478 interrupts = <20 4 0>;
93b298ba
MR		 479 atmel,adc-use-external-triggers;
480 atmel,adc-channels-used = <0xff>;
481 atmel,adc-vref = <3300>;
482 atmel,adc-num-channels = <8>;
483 atmel,adc-startup-time = <40>;
484 atmel,adc-channel-base = <0x30>;
485 atmel,adc-drdy-mask = <0x10000>;
486 atmel,adc-status-register = <0x1c>;
487 atmel,adc-trigger-register = <0x08>;
488
489 trigger@0 {
490 trigger-name = "external-rising";
491 trigger-value = <0x1>;
492 trigger-external;
493 };
494 trigger@1 {
495 trigger-name = "external-falling";
496 trigger-value = <0x2>;
497 trigger-external;
498 };
499
500 trigger@2 {
501 trigger-name = "external-any";
502 trigger-value = <0x3>;
503 trigger-external;
504 };
505
506 trigger@3 {
507 trigger-name = "continuous";
508 trigger-value = <0x6>;
509 };
510 };
9873137a
LD		 511
512 mmc0: mmc@fff80000 {
513 compatible = "atmel,hsmci";
514 reg = <0xfff80000 0x600>;
515 interrupts = <11 4 0>;
516 #address-cells = <1>;
517 #size-cells = <0>;
518 status = "disabled";
519 };
520
521 mmc1: mmc@fffd0000 {
522 compatible = "atmel,hsmci";
523 reg = <0xfffd0000 0x600>;
524 interrupts = <29 4 0>;
525 #address-cells = <1>;
526 #size-cells = <0>;
527 status = "disabled";
db5b0ae0
LT		 528 };
529
7492e7ca
FP		 530 watchdog@fffffd40 {
531 compatible = "atmel,at91sam9260-wdt";
532 reg = <0xfffffd40 0x10>;
533 status = "disabled";
9873137a 534 };
49fe2ba3 535 };
d6a01661
JCPV		 536
537 nand0: nand@40000000 {
538 compatible = "atmel,at91rm9200-nand";
539 #address-cells = <1>;
540 #size-cells = <1>;
541 reg = <0x40000000 0x10000000
542 0xffffe200 0x200
543 >;
544 atmel,nand-addr-offset = <21>;
545 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_nand>;
d6a01661
JCPV		 548 gpios = <&pioC 8 0
549 &pioC 14 0
550 0
551 >;
552 status = "disabled";
553 };
6a062459
JCPV		 554
555 usb0: ohci@00700000 {
556 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
557 reg = <0x00700000 0x100000>;
f8a073ee 558 interrupts = <22 4 2>;
6a062459
JCPV		 559 status = "disabled";
560 };
62c5553a
JCPV		 561
562 usb1: ehci@00800000 {
563 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
564 reg = <0x00800000 0x100000>;
f8a073ee 565 interrupts = <22 4 2>;
62c5553a
JCPV		 566 status = "disabled";
567 };
49fe2ba3 568 };
8f24bdaa
JCPV		 569
570 i2c@0 {
571 compatible = "i2c-gpio";
572 gpios = <&pioA 20 0 /* sda */
573 &pioA 21 0 /* scl */
574 >;
575 i2c-gpio,sda-open-drain;
576 i2c-gpio,scl-open-drain;
577 i2c-gpio,delay-us = <5>; /* ~100 kHz */
578 #address-cells = <1>;
579 #size-cells = <0>;
580 status = "disabled";
581 };
49fe2ba3 582};
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