[deliverable/linux.git] / arch / arm / boot / dts / at91sam9n12.dtsi

/*
 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9N12 SoC";
	compatible = "atmel,at91sam9n12";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
			};

			pioA: gpio@fffff400 {
				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
				reg = <0xfffff400 0x100>;
				interrupts = <2 4 1>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pioB: gpio@fffff600 {
				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
				reg = <0xfffff600 0x100>;
				interrupts = <2 4 1>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pioC: gpio@fffff800 {
				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
				reg = <0xfffff800 0x100>;
				interrupts = <3 4 1>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pioD: gpio@fffffa00 {
				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
				reg = <0xfffffa00 0x100>;
				interrupts = <3 4 1>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
				#interrupt-cells = <2>;
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x4000>;
				interrupts = <5 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x4000>;
				interrupts = <6 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x4000>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x4000>;
				interrupts = <8 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = < 0x40000000 0x10000000
				0xffffe000 0x00000600
				0xffffe600 0x00000200
				0x00100000 0x00100000
			       >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x00100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
cce783c6 HX	1	/*
	2	* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
	3	*
	4	* Copyright (C) 2012 Atmel,
	5	* 2012 Hong Xu <hong.xu@atmel.com>
	6	*
	7	* Licensed under GPLv2 or later.
	8	*/
	9
	10	/include/ "skeleton.dtsi"
	11
	12	/ {
	13	model = "Atmel AT91SAM9N12 SoC";
	14	compatible = "atmel,at91sam9n12";
	15	interrupt-parent = <&aic>;
	16
	17	aliases {
	18	serial0 = &dbgu;
	19	serial1 = &usart0;
	20	serial2 = &usart1;
	21	serial3 = &usart2;
	22	serial4 = &usart3;
	23	gpio0 = &pioA;
	24	gpio1 = &pioB;
	25	gpio2 = &pioC;
	26	gpio3 = &pioD;
	27	tcb0 = &tcb0;
	28	tcb1 = &tcb1;
	29	};
	30	cpus {
	31	cpu@0 {
	32	compatible = "arm,arm926ejs";
	33	};
	34	};
	35
	36	memory {
	37	reg = <0x20000000 0x10000000>;
	38	};
	39
	40	ahb {
	41	compatible = "simple-bus";
	42	#address-cells = <1>;
	43	#size-cells = <1>;
	44	ranges;
	45
	46	apb {
	47	compatible = "simple-bus";
	48	#address-cells = <1>;
	49	#size-cells = <1>;
	50	ranges;
	51
	52	aic: interrupt-controller@fffff000 {
f8a073ee	53	#interrupt-cells = <3>;
cce783c6 HX	54	compatible = "atmel,at91rm9200-aic";
	55	interrupt-controller;
	56	reg = <0xfffff000 0x200>;
	57	};
	58
	59	ramc0: ramc@ffffe800 {
	60	compatible = "atmel,at91sam9g45-ddramc";
	61	reg = <0xffffe800 0x200>;
	62	};
	63
	64	pmc: pmc@fffffc00 {
	65	compatible = "atmel,at91rm9200-pmc";
	66	reg = <0xfffffc00 0x100>;
	67	};
	68
	69	rstc@fffffe00 {
	70	compatible = "atmel,at91sam9g45-rstc";
	71	reg = <0xfffffe00 0x10>;
	72	};
	73
	74	pit: timer@fffffe30 {
	75	compatible = "atmel,at91sam9260-pit";
	76	reg = <0xfffffe30 0xf>;
f8a073ee	77	interrupts = <1 4 7>;
cce783c6 HX	78	};
	79
	80	shdwc@fffffe10 {
	81	compatible = "atmel,at91sam9x5-shdwc";
	82	reg = <0xfffffe10 0x10>;
	83	};
	84
	85	tcb0: timer@f8008000 {
	86	compatible = "atmel,at91sam9x5-tcb";
	87	reg = <0xf8008000 0x100>;
f8a073ee	88	interrupts = <17 4 0>;
cce783c6 HX	89	};
	90
	91	tcb1: timer@f800c000 {
	92	compatible = "atmel,at91sam9x5-tcb";
	93	reg = <0xf800c000 0x100>;
f8a073ee	94	interrupts = <17 4 0>;
cce783c6 HX	95	};
	96
	97	dma: dma-controller@ffffec00 {
	98	compatible = "atmel,at91sam9g45-dma";
	99	reg = <0xffffec00 0x200>;
f8a073ee	100	interrupts = <20 4 0>;
cce783c6 HX	101	};
	102
	103	pioA: gpio@fffff400 {
	104	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	105	reg = <0xfffff400 0x100>;
f8a073ee	106	interrupts = <2 4 1>;
cce783c6 HX	107	#gpio-cells = <2>;
	108	gpio-controller;
	109	interrupt-controller;
51ac51a6	110	#interrupt-cells = <2>;
cce783c6 HX	111	};
	112
	113	pioB: gpio@fffff600 {
	114	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	115	reg = <0xfffff600 0x100>;
f8a073ee	116	interrupts = <2 4 1>;
cce783c6 HX	117	#gpio-cells = <2>;
	118	gpio-controller;
	119	interrupt-controller;
51ac51a6	120	#interrupt-cells = <2>;
cce783c6 HX	121	};
	122
	123	pioC: gpio@fffff800 {
	124	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	125	reg = <0xfffff800 0x100>;
f8a073ee	126	interrupts = <3 4 1>;
cce783c6 HX	127	#gpio-cells = <2>;
	128	gpio-controller;
	129	interrupt-controller;
51ac51a6	130	#interrupt-cells = <2>;
cce783c6 HX	131	};
	132
	133	pioD: gpio@fffffa00 {
	134	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	135	reg = <0xfffffa00 0x100>;
f8a073ee	136	interrupts = <3 4 1>;
cce783c6 HX	137	#gpio-cells = <2>;
	138	gpio-controller;
	139	interrupt-controller;
51ac51a6	140	#interrupt-cells = <2>;
cce783c6 HX	141	};
	142
	143	dbgu: serial@fffff200 {
	144	compatible = "atmel,at91sam9260-usart";
	145	reg = <0xfffff200 0x200>;
f8a073ee	146	interrupts = <1 4 7>;
cce783c6 HX	147	status = "disabled";
	148	};
	149
	150	usart0: serial@f801c000 {
	151	compatible = "atmel,at91sam9260-usart";
	152	reg = <0xf801c000 0x4000>;
f8a073ee	153	interrupts = <5 4 5>;
cce783c6 HX	154	atmel,use-dma-rx;
	155	atmel,use-dma-tx;
	156	status = "disabled";
	157	};
	158
	159	usart1: serial@f8020000 {
	160	compatible = "atmel,at91sam9260-usart";
	161	reg = <0xf8020000 0x4000>;
f8a073ee	162	interrupts = <6 4 5>;
cce783c6 HX	163	atmel,use-dma-rx;
	164	atmel,use-dma-tx;
	165	status = "disabled";
	166	};
	167
	168	usart2: serial@f8024000 {
	169	compatible = "atmel,at91sam9260-usart";
	170	reg = <0xf8024000 0x4000>;
f8a073ee	171	interrupts = <7 4 5>;
cce783c6 HX	172	atmel,use-dma-rx;
	173	atmel,use-dma-tx;
	174	status = "disabled";
	175	};
	176
	177	usart3: serial@f8028000 {
	178	compatible = "atmel,at91sam9260-usart";
	179	reg = <0xf8028000 0x4000>;
f8a073ee	180	interrupts = <8 4 5>;
cce783c6 HX	181	atmel,use-dma-rx;
	182	atmel,use-dma-tx;
	183	status = "disabled";
	184	};
	185	};
	186
	187	nand0: nand@40000000 {
	188	compatible = "atmel,at91rm9200-nand";
	189	#address-cells = <1>;
	190	#size-cells = <1>;
	191	reg = < 0x40000000 0x10000000
	192	0xffffe000 0x00000600
	193	0xffffe600 0x00000200
	194	0x00100000 0x00100000
	195	>;
	196	atmel,nand-addr-offset = <21>;
	197	atmel,nand-cmd-offset = <22>;
	198	gpios = <&pioD 5 0
	199	&pioD 4 0
	200	0
	201	>;
	202	status = "disabled";
	203	};
	204
	205	usb0: ohci@00500000 {
	206	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	207	reg = <0x00500000 0x00100000>;
f8a073ee	208	interrupts = <22 4 2>;
cce783c6 HX	209	status = "disabled";
	210	};
	211	};
	212
	213	i2c@0 {
	214	compatible = "i2c-gpio";
	215	gpios = <&pioA 30 0 /* sda */
	216	&pioA 31 0 /* scl */
	217	>;
	218	i2c-gpio,sda-open-drain;
	219	i2c-gpio,scl-open-drain;
	220	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	221	#address-cells = <1>;
	222	#size-cells = <0>;
	223	status = "disabled";
	224	};
	225	};