[deliverable/linux.git] / arch / arm / boot / dts / at91sam9n12.dtsi

/*
 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9N12 SoC";
	compatible = "atmel,at91sam9n12";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe07983 0x00000000  /* pioA */
				       0x00040000 0x00047e0f 0x00000000  /* pioB */
				       0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<0 9 0x1 0x0	/* PA9 periph A */
							 0 10 0x1 0x1>;	/* PA10 periph with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<0 1 0x1 0x1	/* PA1 periph A with pullup */
							 0 0 0x1 0x0>;	/* PA0 periph A */
					};

					pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
						atmel,pins =
							<0 2 0x1 0x0	/* PA2 periph A */
							 0 3 0x1 0x0>;	/* PA3 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<0 6 0x1 0x1	/* PA6 periph A with pullup */
							 0 5 0x1 0x0>;	/* PA5 periph A */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<0 8 0x1 0x1	/* PA8 periph A with pullup */
							 0 7 0x1 0x0>;	/* PA7 periph A */
					};

					pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
						atmel,pins =
							<1 0 0x2 0x0	/* PB0 periph B */
							 1 1 0x2 0x0>;	/* PB1 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<2 23 0x2 0x1	/* PC23 periph B with pullup */
							 2 22 0x2 0x0>;	/* PC22 periph B */
					};

					pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
						atmel,pins =
							<2 24 0x2 0x0	/* PC24 periph B */
							 2 25 0x2 0x0>;	/* PC25 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<2 9 0x3 0x1	/* PC9 periph C with pullup */
							 2 8 0x3 0x0>;	/* PC8 periph C */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<2 16 0x3 0x1	/* PC17 periph C with pullup */
							 2 17 0x3 0x0>;	/* PC16 periph C */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<3 5 0x0 0x1	/* PD5 gpio RDY pin pull_up*/
							 3 4 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x4000>;
				interrupts = <5 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x4000>;
				interrupts = <6 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x4000>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x4000>;
				interrupts = <8 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = < 0x40000000 0x10000000
				0xffffe000 0x00000600
				0xffffe600 0x00000200
				0x00100000 0x00100000
			       >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x00100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
cce783c6 HX	1	/*
	2	* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
	3	*
	4	* Copyright (C) 2012 Atmel,
	5	* 2012 Hong Xu <hong.xu@atmel.com>
	6	*
	7	* Licensed under GPLv2 or later.
	8	*/
	9
	10	/include/ "skeleton.dtsi"
	11
	12	/ {
	13	model = "Atmel AT91SAM9N12 SoC";
	14	compatible = "atmel,at91sam9n12";
	15	interrupt-parent = <&aic>;
	16
	17	aliases {
	18	serial0 = &dbgu;
	19	serial1 = &usart0;
	20	serial2 = &usart1;
	21	serial3 = &usart2;
	22	serial4 = &usart3;
	23	gpio0 = &pioA;
	24	gpio1 = &pioB;
	25	gpio2 = &pioC;
	26	gpio3 = &pioD;
	27	tcb0 = &tcb0;
	28	tcb1 = &tcb1;
05dcd361 LD	29	i2c0 = &i2c0;
05dcd361 LD	30	i2c1 = &i2c1;
cce783c6 HX	31	};
	32	cpus {
	33	cpu@0 {
	34	compatible = "arm,arm926ejs";
	35	};
	36	};
	37
	38	memory {
	39	reg = <0x20000000 0x10000000>;
	40	};
	41
	42	ahb {
	43	compatible = "simple-bus";
	44	#address-cells = <1>;
	45	#size-cells = <1>;
	46	ranges;
	47
	48	apb {
	49	compatible = "simple-bus";
	50	#address-cells = <1>;
	51	#size-cells = <1>;
	52	ranges;
	53
	54	aic: interrupt-controller@fffff000 {
f8a073ee	55	#interrupt-cells = <3>;
cce783c6 HX	56	compatible = "atmel,at91rm9200-aic";
	57	interrupt-controller;
	58	reg = <0xfffff000 0x200>;
	59	};
	60
	61	ramc0: ramc@ffffe800 {
	62	compatible = "atmel,at91sam9g45-ddramc";
	63	reg = <0xffffe800 0x200>;
	64	};
	65
	66	pmc: pmc@fffffc00 {
	67	compatible = "atmel,at91rm9200-pmc";
	68	reg = <0xfffffc00 0x100>;
	69	};
	70
	71	rstc@fffffe00 {
	72	compatible = "atmel,at91sam9g45-rstc";
	73	reg = <0xfffffe00 0x10>;
	74	};
	75
	76	pit: timer@fffffe30 {
	77	compatible = "atmel,at91sam9260-pit";
	78	reg = <0xfffffe30 0xf>;
f8a073ee	79	interrupts = <1 4 7>;
cce783c6 HX	80	};
	81
	82	shdwc@fffffe10 {
	83	compatible = "atmel,at91sam9x5-shdwc";
	84	reg = <0xfffffe10 0x10>;
	85	};
	86
	87	tcb0: timer@f8008000 {
	88	compatible = "atmel,at91sam9x5-tcb";
	89	reg = <0xf8008000 0x100>;
f8a073ee	90	interrupts = <17 4 0>;
cce783c6 HX	91	};
	92
	93	tcb1: timer@f800c000 {
	94	compatible = "atmel,at91sam9x5-tcb";
	95	reg = <0xf800c000 0x100>;
f8a073ee	96	interrupts = <17 4 0>;
cce783c6 HX	97	};
	98
	99	dma: dma-controller@ffffec00 {
	100	compatible = "atmel,at91sam9g45-dma";
	101	reg = <0xffffec00 0x200>;
f8a073ee	102	interrupts = <20 4 0>;
cce783c6 HX	103	};
cce783c6 HX	104
e4541ff2 JCPV	105	pinctrl@fffff400 {
	106	#address-cells = <1>;
	107	#size-cells = <1>;
5314ec8e	108	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	109	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	110
5314ec8e JCPV	111	atmel,mux-mask = <
	112	/* A B C */
	113	0xffffffff 0xffe07983 0x00000000 /* pioA */
	114	0x00040000 0x00047e0f 0x00000000 /* pioB */
	115	0xfdffffff 0x07c00000 0xb83fffff /* pioC */
	116	0x003fffff 0x003f8000 0x00000000 /* pioD */
	117	>;
	118
	119	/* shared pinctrl settings */
ec6754a7 JCPV	120	dbgu {
	121	pinctrl_dbgu: dbgu-0 {
	122	atmel,pins =
	123	<0 9 0x1 0x0 /* PA9 periph A */
	124	0 10 0x1 0x1>; /* PA10 periph with pullup */
	125	};
	126	};
	127
9e3129e9 JCPV	128	usart0 {
9e3129e9 JCPV	129	pinctrl_usart0: usart0-0 {
ec6754a7 JCPV	130	atmel,pins =
	131	<0 1 0x1 0x1 /* PA1 periph A with pullup */
	132	0 0 0x1 0x0>; /* PA0 periph A */
	133	};
	134
9e3129e9	135	pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
ec6754a7 JCPV	136	atmel,pins =
	137	<0 2 0x1 0x0 /* PA2 periph A */
	138	0 3 0x1 0x0>; /* PA3 periph A */
	139	};
	140	};
	141
9e3129e9 JCPV	142	usart1 {
9e3129e9 JCPV	143	pinctrl_usart1: usart1-0 {
ec6754a7 JCPV	144	atmel,pins =
	145	<0 6 0x1 0x1 /* PA6 periph A with pullup */
	146	0 5 0x1 0x0>; /* PA5 periph A */
	147	};
	148	};
	149
9e3129e9 JCPV	150	usart2 {
9e3129e9 JCPV	151	pinctrl_usart2: usart2-0 {
ec6754a7 JCPV	152	atmel,pins =
	153	<0 8 0x1 0x1 /* PA8 periph A with pullup */
	154	0 7 0x1 0x0>; /* PA7 periph A */
	155	};
	156
9e3129e9	157	pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
ec6754a7 JCPV	158	atmel,pins =
	159	<1 0 0x2 0x0 /* PB0 periph B */
	160	1 1 0x2 0x0>; /* PB1 periph B */
	161	};
	162	};
	163
9e3129e9 JCPV	164	usart3 {
9e3129e9 JCPV	165	pinctrl_usart3: usart3-0 {
ec6754a7 JCPV	166	atmel,pins =
	167	<2 23 0x2 0x1 /* PC23 periph B with pullup */
	168	2 22 0x2 0x0>; /* PC22 periph B */
	169	};
	170
9e3129e9	171	pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
ec6754a7 JCPV	172	atmel,pins =
	173	<2 24 0x2 0x0 /* PC24 periph B */
	174	2 25 0x2 0x0>; /* PC25 periph B */
	175	};
	176	};
	177
9e3129e9 JCPV	178	uart0 {
9e3129e9 JCPV	179	pinctrl_uart0: uart0-0 {
ec6754a7 JCPV	180	atmel,pins =
	181	<2 9 0x3 0x1 /* PC9 periph C with pullup */
	182	2 8 0x3 0x0>; /* PC8 periph C */
	183	};
	184	};
	185
9e3129e9 JCPV	186	uart1 {
9e3129e9 JCPV	187	pinctrl_uart1: uart1-0 {
ec6754a7 JCPV	188	atmel,pins =
	189	<2 16 0x3 0x1 /* PC17 periph C with pullup */
	190	2 17 0x3 0x0>; /* PC16 periph C */
	191	};
	192	};
5314ec8e	193
7a38d450 JCPV	194	nand {
	195	pinctrl_nand: nand-0 {
	196	atmel,pins =
	197	<3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
	198	3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
	199	};
	200	};
	201
e4541ff2 JCPV	202	pioA: gpio@fffff400 {
	203	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	204	reg = <0xfffff400 0x200>;
	205	interrupts = <2 4 1>;
	206	#gpio-cells = <2>;
	207	gpio-controller;
	208	interrupt-controller;
	209	#interrupt-cells = <2>;
	210	};
	211
	212	pioB: gpio@fffff600 {
	213	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	214	reg = <0xfffff600 0x200>;
	215	interrupts = <2 4 1>;
	216	#gpio-cells = <2>;
	217	gpio-controller;
	218	interrupt-controller;
	219	#interrupt-cells = <2>;
	220	};
	221
	222	pioC: gpio@fffff800 {
	223	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	224	reg = <0xfffff800 0x200>;
	225	interrupts = <3 4 1>;
	226	#gpio-cells = <2>;
	227	gpio-controller;
	228	interrupt-controller;
	229	#interrupt-cells = <2>;
	230	};
	231
	232	pioD: gpio@fffffa00 {
	233	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	234	reg = <0xfffffa00 0x200>;
	235	interrupts = <3 4 1>;
	236	#gpio-cells = <2>;
	237	gpio-controller;
	238	interrupt-controller;
	239	#interrupt-cells = <2>;
	240	};
cce783c6 HX	241	};
	242
	243	dbgu: serial@fffff200 {
	244	compatible = "atmel,at91sam9260-usart";
	245	reg = <0xfffff200 0x200>;
f8a073ee	246	interrupts = <1 4 7>;
ec6754a7 JCPV	247	pinctrl-names = "default";
ec6754a7 JCPV	248	pinctrl-0 = <&pinctrl_dbgu>;
cce783c6 HX	249	status = "disabled";
	250	};
	251
	252	usart0: serial@f801c000 {
	253	compatible = "atmel,at91sam9260-usart";
	254	reg = <0xf801c000 0x4000>;
f8a073ee	255	interrupts = <5 4 5>;
cce783c6 HX	256	atmel,use-dma-rx;
cce783c6 HX	257	atmel,use-dma-tx;
ec6754a7	258	pinctrl-names = "default";
9e3129e9	259	pinctrl-0 = <&pinctrl_usart0>;
cce783c6 HX	260	status = "disabled";
	261	};
	262
	263	usart1: serial@f8020000 {
	264	compatible = "atmel,at91sam9260-usart";
	265	reg = <0xf8020000 0x4000>;
f8a073ee	266	interrupts = <6 4 5>;
cce783c6 HX	267	atmel,use-dma-rx;
cce783c6 HX	268	atmel,use-dma-tx;
ec6754a7	269	pinctrl-names = "default";
9e3129e9	270	pinctrl-0 = <&pinctrl_usart1>;
cce783c6 HX	271	status = "disabled";
	272	};
	273
	274	usart2: serial@f8024000 {
	275	compatible = "atmel,at91sam9260-usart";
	276	reg = <0xf8024000 0x4000>;
f8a073ee	277	interrupts = <7 4 5>;
cce783c6 HX	278	atmel,use-dma-rx;
cce783c6 HX	279	atmel,use-dma-tx;
ec6754a7	280	pinctrl-names = "default";
9e3129e9	281	pinctrl-0 = <&pinctrl_usart2>;
cce783c6 HX	282	status = "disabled";
	283	};
	284
	285	usart3: serial@f8028000 {
	286	compatible = "atmel,at91sam9260-usart";
	287	reg = <0xf8028000 0x4000>;
f8a073ee	288	interrupts = <8 4 5>;
cce783c6 HX	289	atmel,use-dma-rx;
cce783c6 HX	290	atmel,use-dma-tx;
ec6754a7	291	pinctrl-names = "default";
9e3129e9	292	pinctrl-0 = <&pinctrl_usart3>;
cce783c6 HX	293	status = "disabled";
cce783c6 HX	294	};
05dcd361 LD	295
	296	i2c0: i2c@f8010000 {
	297	compatible = "atmel,at91sam9x5-i2c";
	298	reg = <0xf8010000 0x100>;
	299	interrupts = <9 4 6>;
	300	#address-cells = <1>;
	301	#size-cells = <0>;
	302	status = "disabled";
	303	};
	304
	305	i2c1: i2c@f8014000 {
	306	compatible = "atmel,at91sam9x5-i2c";
	307	reg = <0xf8014000 0x100>;
	308	interrupts = <10 4 6>;
	309	#address-cells = <1>;
	310	#size-cells = <0>;
	311	status = "disabled";
	312	};
cce783c6 HX	313	};
	314
	315	nand0: nand@40000000 {
	316	compatible = "atmel,at91rm9200-nand";
	317	#address-cells = <1>;
	318	#size-cells = <1>;
	319	reg = < 0x40000000 0x10000000
	320	0xffffe000 0x00000600
	321	0xffffe600 0x00000200
	322	0x00100000 0x00100000
	323	>;
	324	atmel,nand-addr-offset = <21>;
	325	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	326	pinctrl-names = "default";
7a38d450 JCPV	327	pinctrl-0 = <&pinctrl_nand>;
cce783c6 HX	328	gpios = <&pioD 5 0
	329	&pioD 4 0
	330	0
	331	>;
	332	status = "disabled";
	333	};
	334
	335	usb0: ohci@00500000 {
	336	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	337	reg = <0x00500000 0x00100000>;
f8a073ee	338	interrupts = <22 4 2>;
cce783c6 HX	339	status = "disabled";
	340	};
	341	};
	342
	343	i2c@0 {
	344	compatible = "i2c-gpio";
	345	gpios = <&pioA 30 0 /* sda */
	346	&pioA 31 0 /* scl */
	347	>;
	348	i2c-gpio,sda-open-drain;
	349	i2c-gpio,scl-open-drain;
	350	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	351	#address-cells = <1>;
	352	#size-cells = <0>;
	353	status = "disabled";
	354	};
	355	};