[deliverable/linux.git] / arch / arm / boot / dts / at91sam9n12.dtsi

/*
 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

#include "skeleton.dtsi"
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Atmel AT91SAM9N12 SoC";
	compatible = "atmel,at91sam9n12";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		ssc0 = &ssc0;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
				interrupts = <12 4 0>;
				dmas = <&dma 1 0>;
				dma-names = "rxtx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
				#dma-cells = <2>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe07983 0x00000000  /* pioA */
				       0x00040000 0x00047e0f 0x00000000  /* pioB */
				       0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA9 periph A */
							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA10 periph with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA0 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA2 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA3 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA6 periph A with pullup */
							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA5 periph A */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA8 periph A with pullup */
							 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA7 periph A */
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB0 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB1 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PC23 periph B with pullup */
							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC22 periph B */
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC24 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC25 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP	/* PC9 periph C with pullup */
							 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC8 periph C */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP	/* PC17 periph C with pullup */
							 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>;	/* PC16 periph C */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PD5 gpio RDY pin pull_up*/
							 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD4 gpio enable pin pull_up */
					};
				};

				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA17 periph A */
							 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
							 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA15 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
						atmel,pins =
							<AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA11 periph B with pullup */
							 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA12 periph B with pullup */
							 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PA13 periph B with pullup */
							 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PA14 periph B with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA24 periph B */
							 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA25 periph B */
							 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA26 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA27 periph B */
							 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA28 periph B */
							 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA29 periph B */
					};
				};

				spi0 {
					pinctrl_spi0: spi0-0 {
						atmel,pins =
							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA11 periph A SPI0_MISO pin */
							 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PA12 periph A SPI0_MOSI pin */
							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA13 periph A SPI0_SPCK pin */
					};
				};

				spi1 {
					pinctrl_spi1: spi1-0 {
						atmel,pins =
							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA21 periph B SPI1_MISO pin */
							 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA22 periph B SPI1_MOSI pin */
							 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA23 periph B SPI1_SPCK pin */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			ssc0: ssc@f0010000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xf0010000 0x4000>;
				interrupts = <28 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x4000>;
				interrupts = <5 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x4000>;
				interrupts = <6 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x4000>;
				interrupts = <7 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x4000>;
				interrupts = <8 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				dmas = <&dma 1 13>,
				       <&dma 1 14>;
				dma-names = "tx", "rx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				dmas = <&dma 1 15>,
				       <&dma 1 16>;
				dma-names = "tx", "rx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spi0: spi@f0000000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0000000 0x100>;
				interrupts = <13 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi0>;
				status = "disabled";
			};

			spi1: spi@f0004000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "atmel,at91rm9200-spi";
				reg = <0xf0004000 0x100>;
				interrupts = <14 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_spi1>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = < 0x40000000 0x10000000
				0xffffe000 0x00000600
				0xffffe600 0x00000200
				0x00108000 0x00018000
			       >;
			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioD 5 GPIO_ACTIVE_HIGH
				 &pioD 4 GPIO_ACTIVE_HIGH
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x00100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
			 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
cce783c6 HX	1	/*
	2	* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
	3	*
	4	* Copyright (C) 2012 Atmel,
	5	* 2012 Hong Xu <hong.xu@atmel.com>
	6	*
	7	* Licensed under GPLv2 or later.
	8	*/
	9
6db64d29	10	#include "skeleton.dtsi"
c9d0f317	11	#include <dt-bindings/pinctrl/at91.h>
92f8629b	12	#include <dt-bindings/gpio/gpio.h>
cce783c6 HX	13
	14	/ {
	15	model = "Atmel AT91SAM9N12 SoC";
	16	compatible = "atmel,at91sam9n12";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	serial4 = &usart3;
	25	gpio0 = &pioA;
	26	gpio1 = &pioB;
	27	gpio2 = &pioC;
	28	gpio3 = &pioD;
	29	tcb0 = &tcb0;
	30	tcb1 = &tcb1;
05dcd361 LD	31	i2c0 = &i2c0;
05dcd361 LD	32	i2c1 = &i2c1;
544ae6b2	33	ssc0 = &ssc0;
cce783c6 HX	34	};
	35	cpus {
	36	cpu@0 {
	37	compatible = "arm,arm926ejs";
	38	};
	39	};
	40
	41	memory {
	42	reg = <0x20000000 0x10000000>;
	43	};
	44
	45	ahb {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	ranges;
	50
	51	apb {
	52	compatible = "simple-bus";
	53	#address-cells = <1>;
	54	#size-cells = <1>;
	55	ranges;
	56
	57	aic: interrupt-controller@fffff000 {
f8a073ee	58	#interrupt-cells = <3>;
cce783c6 HX	59	compatible = "atmel,at91rm9200-aic";
	60	interrupt-controller;
	61	reg = <0xfffff000 0x200>;
	62	};
	63
	64	ramc0: ramc@ffffe800 {
	65	compatible = "atmel,at91sam9g45-ddramc";
	66	reg = <0xffffe800 0x200>;
	67	};
	68
	69	pmc: pmc@fffffc00 {
	70	compatible = "atmel,at91rm9200-pmc";
	71	reg = <0xfffffc00 0x100>;
	72	};
	73
	74	rstc@fffffe00 {
	75	compatible = "atmel,at91sam9g45-rstc";
	76	reg = <0xfffffe00 0x10>;
	77	};
	78
	79	pit: timer@fffffe30 {
	80	compatible = "atmel,at91sam9260-pit";
	81	reg = <0xfffffe30 0xf>;
f8a073ee	82	interrupts = <1 4 7>;
cce783c6 HX	83	};
	84
	85	shdwc@fffffe10 {
	86	compatible = "atmel,at91sam9x5-shdwc";
	87	reg = <0xfffffe10 0x10>;
	88	};
	89
9873137a LD	90	mmc0: mmc@f0008000 {
	91	compatible = "atmel,hsmci";
	92	reg = <0xf0008000 0x600>;
	93	interrupts = <12 4 0>;
05c1bc97 LD	94	dmas = <&dma 1 0>;
05c1bc97 LD	95	dma-names = "rxtx";
9873137a LD	96	#address-cells = <1>;
	97	#size-cells = <0>;
	98	status = "disabled";
	99	};
	100
cce783c6 HX	101	tcb0: timer@f8008000 {
	102	compatible = "atmel,at91sam9x5-tcb";
	103	reg = <0xf8008000 0x100>;
f8a073ee	104	interrupts = <17 4 0>;
cce783c6 HX	105	};
	106
	107	tcb1: timer@f800c000 {
	108	compatible = "atmel,at91sam9x5-tcb";
	109	reg = <0xf800c000 0x100>;
f8a073ee	110	interrupts = <17 4 0>;
cce783c6 HX	111	};
	112
	113	dma: dma-controller@ffffec00 {
	114	compatible = "atmel,at91sam9g45-dma";
	115	reg = <0xffffec00 0x200>;
f8a073ee	116	interrupts = <20 4 0>;
980ce7d9	117	#dma-cells = <2>;
cce783c6 HX	118	};
cce783c6 HX	119
e4541ff2 JCPV	120	pinctrl@fffff400 {
	121	#address-cells = <1>;
	122	#size-cells = <1>;
5314ec8e	123	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	124	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	125
5314ec8e JCPV	126	atmel,mux-mask = <
	127	/* A B C */
	128	0xffffffff 0xffe07983 0x00000000 /* pioA */
	129	0x00040000 0x00047e0f 0x00000000 /* pioB */
	130	0xfdffffff 0x07c00000 0xb83fffff /* pioC */
	131	0x003fffff 0x003f8000 0x00000000 /* pioD */
	132	>;
	133
	134	/* shared pinctrl settings */
ec6754a7 JCPV	135	dbgu {
	136	pinctrl_dbgu: dbgu-0 {
	137	atmel,pins =
c9d0f317 JCPV	138	<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
c9d0f317 JCPV	139	AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
ec6754a7 JCPV	140	};
	141	};
	142
9e3129e9 JCPV	143	usart0 {
9e3129e9 JCPV	144	pinctrl_usart0: usart0-0 {
ec6754a7	145	atmel,pins =
c9d0f317 JCPV	146	<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
c9d0f317 JCPV	147	AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
ec6754a7 JCPV	148	};
ec6754a7 JCPV	149
c58c0c5a	150	pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7	151	atmel,pins =
c9d0f317	152	<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
c58c0c5a JCPV	153	};
	154
	155	pinctrl_usart0_cts: usart0_cts-0 {
	156	atmel,pins =
c9d0f317	157	<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
ec6754a7 JCPV	158	};
	159	};
	160
9e3129e9 JCPV	161	usart1 {
9e3129e9 JCPV	162	pinctrl_usart1: usart1-0 {
ec6754a7	163	atmel,pins =
c9d0f317 JCPV	164	<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
c9d0f317 JCPV	165	AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
ec6754a7 JCPV	166	};
	167	};
	168
9e3129e9 JCPV	169	usart2 {
9e3129e9 JCPV	170	pinctrl_usart2: usart2-0 {
ec6754a7	171	atmel,pins =
c9d0f317 JCPV	172	<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
c9d0f317 JCPV	173	AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
ec6754a7 JCPV	174	};
ec6754a7 JCPV	175
c58c0c5a	176	pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7	177	atmel,pins =
c9d0f317	178	<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
c58c0c5a JCPV	179	};
	180
	181	pinctrl_usart2_cts: usart2_cts-0 {
	182	atmel,pins =
c9d0f317	183	<AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
ec6754a7 JCPV	184	};
	185	};
	186
9e3129e9 JCPV	187	usart3 {
9e3129e9 JCPV	188	pinctrl_usart3: usart3-0 {
ec6754a7	189	atmel,pins =
c9d0f317 JCPV	190	<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
c9d0f317 JCPV	191	AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
ec6754a7 JCPV	192	};
ec6754a7 JCPV	193
c58c0c5a JCPV	194	pinctrl_usart3_rts: usart3_rts-0 {
c58c0c5a JCPV	195	atmel,pins =
c9d0f317	196	<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
c58c0c5a JCPV	197	};
	198
	199	pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7	200	atmel,pins =
c9d0f317	201	<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
ec6754a7 JCPV	202	};
	203	};
	204
9e3129e9 JCPV	205	uart0 {
9e3129e9 JCPV	206	pinctrl_uart0: uart0-0 {
ec6754a7	207	atmel,pins =
c9d0f317 JCPV	208	<AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
c9d0f317 JCPV	209	AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
ec6754a7 JCPV	210	};
	211	};
	212
9e3129e9 JCPV	213	uart1 {
9e3129e9 JCPV	214	pinctrl_uart1: uart1-0 {
ec6754a7	215	atmel,pins =
c9d0f317 JCPV	216	<AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
c9d0f317 JCPV	217	AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
ec6754a7 JCPV	218	};
ec6754a7 JCPV	219	};
5314ec8e	220
7a38d450 JCPV	221	nand {
	222	pinctrl_nand: nand-0 {
	223	atmel,pins =
c9d0f317 JCPV	224	<AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
c9d0f317 JCPV	225	AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
7a38d450 JCPV	226	};
	227	};
	228
d4fe9ac7 JCPV	229	mmc0 {
	230	pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
	231	atmel,pins =
c9d0f317 JCPV	232	<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
	233	AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
	234	AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
d4fe9ac7 JCPV	235	};
	236
	237	pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
	238	atmel,pins =
c9d0f317 JCPV	239	<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
	240	AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
	241	AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
d4fe9ac7 JCPV	242	};
	243
	244	pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
	245	atmel,pins =
c9d0f317 JCPV	246	<AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
	247	AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
	248	AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
	249	AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
d4fe9ac7 JCPV	250	};
	251	};
	252
544ae6b2 BS	253	ssc0 {
	254	pinctrl_ssc0_tx: ssc0_tx-0 {
	255	atmel,pins =
c9d0f317 JCPV	256	<AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
	257	AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
	258	AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
544ae6b2 BS	259	};
	260
	261	pinctrl_ssc0_rx: ssc0_rx-0 {
	262	atmel,pins =
c9d0f317 JCPV	263	<AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
	264	AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
	265	AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
544ae6b2 BS	266	};
	267	};
	268
a68b728f WY	269	spi0 {
	270	pinctrl_spi0: spi0-0 {
	271	atmel,pins =
c9d0f317 JCPV	272	<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
	273	AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
	274	AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
a68b728f WY	275	};
	276	};
	277
	278	spi1 {
	279	pinctrl_spi1: spi1-0 {
	280	atmel,pins =
c9d0f317 JCPV	281	<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
	282	AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
	283	AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
a68b728f WY	284	};
	285	};
	286
e4541ff2 JCPV	287	pioA: gpio@fffff400 {
	288	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	289	reg = <0xfffff400 0x200>;
	290	interrupts = <2 4 1>;
	291	#gpio-cells = <2>;
	292	gpio-controller;
	293	interrupt-controller;
	294	#interrupt-cells = <2>;
	295	};
	296
	297	pioB: gpio@fffff600 {
	298	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	299	reg = <0xfffff600 0x200>;
	300	interrupts = <2 4 1>;
	301	#gpio-cells = <2>;
	302	gpio-controller;
	303	interrupt-controller;
	304	#interrupt-cells = <2>;
	305	};
	306
	307	pioC: gpio@fffff800 {
	308	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	309	reg = <0xfffff800 0x200>;
	310	interrupts = <3 4 1>;
	311	#gpio-cells = <2>;
	312	gpio-controller;
	313	interrupt-controller;
	314	#interrupt-cells = <2>;
	315	};
	316
	317	pioD: gpio@fffffa00 {
	318	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	319	reg = <0xfffffa00 0x200>;
	320	interrupts = <3 4 1>;
	321	#gpio-cells = <2>;
	322	gpio-controller;
	323	interrupt-controller;
	324	#interrupt-cells = <2>;
	325	};
cce783c6 HX	326	};
	327
	328	dbgu: serial@fffff200 {
	329	compatible = "atmel,at91sam9260-usart";
	330	reg = <0xfffff200 0x200>;
f8a073ee	331	interrupts = <1 4 7>;
ec6754a7 JCPV	332	pinctrl-names = "default";
ec6754a7 JCPV	333	pinctrl-0 = <&pinctrl_dbgu>;
cce783c6 HX	334	status = "disabled";
	335	};
	336
544ae6b2 BS	337	ssc0: ssc@f0010000 {
	338	compatible = "atmel,at91sam9g45-ssc";
	339	reg = <0xf0010000 0x4000>;
	340	interrupts = <28 4 5>;
	341	pinctrl-names = "default";
	342	pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
	343	status = "disabled";
	344	};
	345
cce783c6 HX	346	usart0: serial@f801c000 {
	347	compatible = "atmel,at91sam9260-usart";
	348	reg = <0xf801c000 0x4000>;
f8a073ee	349	interrupts = <5 4 5>;
ec6754a7	350	pinctrl-names = "default";
9e3129e9	351	pinctrl-0 = <&pinctrl_usart0>;
cce783c6 HX	352	status = "disabled";
	353	};
	354
	355	usart1: serial@f8020000 {
	356	compatible = "atmel,at91sam9260-usart";
	357	reg = <0xf8020000 0x4000>;
f8a073ee	358	interrupts = <6 4 5>;
ec6754a7	359	pinctrl-names = "default";
9e3129e9	360	pinctrl-0 = <&pinctrl_usart1>;
cce783c6 HX	361	status = "disabled";
	362	};
	363
	364	usart2: serial@f8024000 {
	365	compatible = "atmel,at91sam9260-usart";
	366	reg = <0xf8024000 0x4000>;
f8a073ee	367	interrupts = <7 4 5>;
ec6754a7	368	pinctrl-names = "default";
9e3129e9	369	pinctrl-0 = <&pinctrl_usart2>;
cce783c6 HX	370	status = "disabled";
	371	};
	372
	373	usart3: serial@f8028000 {
	374	compatible = "atmel,at91sam9260-usart";
	375	reg = <0xf8028000 0x4000>;
f8a073ee	376	interrupts = <8 4 5>;
ec6754a7	377	pinctrl-names = "default";
9e3129e9	378	pinctrl-0 = <&pinctrl_usart3>;
cce783c6 HX	379	status = "disabled";
cce783c6 HX	380	};
05dcd361 LD	381
	382	i2c0: i2c@f8010000 {
	383	compatible = "atmel,at91sam9x5-i2c";
	384	reg = <0xf8010000 0x100>;
	385	interrupts = <9 4 6>;
d9a63a45 LD	386	dmas = <&dma 1 13>,
	387	<&dma 1 14>;
	388	dma-names = "tx", "rx";
05dcd361 LD	389	#address-cells = <1>;
	390	#size-cells = <0>;
	391	status = "disabled";
	392	};
	393
	394	i2c1: i2c@f8014000 {
	395	compatible = "atmel,at91sam9x5-i2c";
	396	reg = <0xf8014000 0x100>;
	397	interrupts = <10 4 6>;
d9a63a45 LD	398	dmas = <&dma 1 15>,
	399	<&dma 1 16>;
	400	dma-names = "tx", "rx";
05dcd361 LD	401	#address-cells = <1>;
	402	#size-cells = <0>;
	403	status = "disabled";
	404	};
d50f88a0 RG	405
	406	spi0: spi@f0000000 {
	407	#address-cells = <1>;
	408	#size-cells = <0>;
	409	compatible = "atmel,at91rm9200-spi";
	410	reg = <0xf0000000 0x100>;
	411	interrupts = <13 4 3>;
a68b728f WY	412	pinctrl-names = "default";
a68b728f WY	413	pinctrl-0 = <&pinctrl_spi0>;
d50f88a0 RG	414	status = "disabled";
	415	};
	416
	417	spi1: spi@f0004000 {
	418	#address-cells = <1>;
	419	#size-cells = <0>;
	420	compatible = "atmel,at91rm9200-spi";
	421	reg = <0xf0004000 0x100>;
	422	interrupts = <14 4 3>;
a68b728f WY	423	pinctrl-names = "default";
a68b728f WY	424	pinctrl-0 = <&pinctrl_spi1>;
d50f88a0 RG	425	status = "disabled";
d50f88a0 RG	426	};
cce783c6 HX	427	};
	428
	429	nand0: nand@40000000 {
	430	compatible = "atmel,at91rm9200-nand";
	431	#address-cells = <1>;
	432	#size-cells = <1>;
	433	reg = < 0x40000000 0x10000000
	434	0xffffe000 0x00000600
	435	0xffffe600 0x00000200
c18c6b29	436	0x00108000 0x00018000
cce783c6	437	>;
c18c6b29	438	atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
cce783c6 HX	439	atmel,nand-addr-offset = <21>;
cce783c6 HX	440	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	441	pinctrl-names = "default";
7a38d450 JCPV	442	pinctrl-0 = <&pinctrl_nand>;
92f8629b JCPV	443	gpios = <&pioD 5 GPIO_ACTIVE_HIGH
92f8629b JCPV	444	&pioD 4 GPIO_ACTIVE_HIGH
cce783c6 HX	445	0
	446	>;
	447	status = "disabled";
	448	};
	449
	450	usb0: ohci@00500000 {
	451	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	452	reg = <0x00500000 0x00100000>;
f8a073ee	453	interrupts = <22 4 2>;
cce783c6 HX	454	status = "disabled";
	455	};
	456	};
	457
	458	i2c@0 {
	459	compatible = "i2c-gpio";
92f8629b JCPV	460	gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
92f8629b JCPV	461	&pioA 31 GPIO_ACTIVE_HIGH /* scl */
cce783c6 HX	462	>;
	463	i2c-gpio,sda-open-drain;
	464	i2c-gpio,scl-open-drain;
	465	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	466	#address-cells = <1>;
	467	#size-cells = <0>;
	468	status = "disabled";
	469	};
	470	};