[deliverable/linux.git] / arch / arm / boot / dts / at91sam9n12.dtsi

/*
 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Hong Xu <hong.xu@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9N12 SoC";
	compatible = "atmel,at91sam9n12";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		ssc0 = &ssc0;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
				interrupts = <12 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
				#dma-cells = <2>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				atmel,mux-mask = <
				      /*    A         B          C     */
				       0xffffffff 0xffe07983 0x00000000  /* pioA */
				       0x00040000 0x00047e0f 0x00000000  /* pioB */
				       0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
				       0x003fffff 0x003f8000 0x00000000  /* pioD */
				      >;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<0 9 0x1 0x0	/* PA9 periph A */
							 0 10 0x1 0x1>;	/* PA10 periph with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<0 1 0x1 0x1	/* PA1 periph A with pullup */
							 0 0 0x1 0x0>;	/* PA0 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<0 2 0x1 0x0>;	/* PA2 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<0 3 0x1 0x0>;	/* PA3 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<0 6 0x1 0x1	/* PA6 periph A with pullup */
							 0 5 0x1 0x0>;	/* PA5 periph A */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<0 8 0x1 0x1	/* PA8 periph A with pullup */
							 0 7 0x1 0x0>;	/* PA7 periph A */
					};

					pinctrl_usart2_rts: usart2_rts-0 {
						atmel,pins =
							<1 0 0x2 0x0>;	/* PB0 periph B */
					};

					pinctrl_usart2_cts: usart2_cts-0 {
						atmel,pins =
							<1 1 0x2 0x0>;	/* PB1 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<2 23 0x2 0x1	/* PC23 periph B with pullup */
							 2 22 0x2 0x0>;	/* PC22 periph B */
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<2 24 0x2 0x0>;	/* PC24 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<2 25 0x2 0x0>;	/* PC25 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<2 9 0x3 0x1	/* PC9 periph C with pullup */
							 2 8 0x3 0x0>;	/* PC8 periph C */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<2 16 0x3 0x1	/* PC17 periph C with pullup */
							 2 17 0x3 0x0>;	/* PC16 periph C */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<3 5 0x0 0x1	/* PD5 gpio RDY pin pull_up*/
							 3 4 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
					};
				};

				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<0 17 0x1 0x0	/* PA17 periph A */
							 0 16 0x1 0x1	/* PA16 periph A with pullup */
							 0 15 0x1 0x1>;	/* PA15 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<0 18 0x1 0x1	/* PA18 periph A with pullup */
							 0 19 0x1 0x1	/* PA19 periph A with pullup */
							 0 20 0x1 0x1>;	/* PA20 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
						atmel,pins =
							<0 11 0x2 0x1	/* PA11 periph B with pullup */
							 0 12 0x2 0x1	/* PA12 periph B with pullup */
							 0 13 0x2 0x1	/* PA13 periph B with pullup */
							 0 14 0x2 0x1>;	/* PA14 periph B with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<0 24 0x2 0x0	/* PA24 periph B */
							 0 25 0x2 0x0	/* PA25 periph B */
							 0 26 0x2 0x0>;	/* PA26 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<0 27 0x2 0x0	/* PA27 periph B */
							 0 28 0x2 0x0	/* PA28 periph B */
							 0 29 0x2 0x0>;	/* PA29 periph B */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			ssc0: ssc@f0010000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xf0010000 0x4000>;
				interrupts = <28 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x4000>;
				interrupts = <5 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x4000>;
				interrupts = <6 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x4000>;
				interrupts = <7 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			usart3: serial@f8028000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8028000 0x4000>;
				interrupts = <8 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				dmas = <&dma 1 13>,
				       <&dma 1 14>;
				dma-names = "tx", "rx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				dmas = <&dma 1 15>,
				       <&dma 1 16>;
				dma-names = "tx", "rx";
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = < 0x40000000 0x10000000
				0xffffe000 0x00000600
				0xffffe600 0x00000200
				0x00108000 0x00018000
			       >;
			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00500000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00500000 0x00100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
cce783c6 HX	1	/*
	2	* at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
	3	*
	4	* Copyright (C) 2012 Atmel,
	5	* 2012 Hong Xu <hong.xu@atmel.com>
	6	*
	7	* Licensed under GPLv2 or later.
	8	*/
	9
	10	/include/ "skeleton.dtsi"
	11
	12	/ {
	13	model = "Atmel AT91SAM9N12 SoC";
	14	compatible = "atmel,at91sam9n12";
	15	interrupt-parent = <&aic>;
	16
	17	aliases {
	18	serial0 = &dbgu;
	19	serial1 = &usart0;
	20	serial2 = &usart1;
	21	serial3 = &usart2;
	22	serial4 = &usart3;
	23	gpio0 = &pioA;
	24	gpio1 = &pioB;
	25	gpio2 = &pioC;
	26	gpio3 = &pioD;
	27	tcb0 = &tcb0;
	28	tcb1 = &tcb1;
05dcd361 LD	29	i2c0 = &i2c0;
05dcd361 LD	30	i2c1 = &i2c1;
544ae6b2	31	ssc0 = &ssc0;
cce783c6 HX	32	};
	33	cpus {
	34	cpu@0 {
	35	compatible = "arm,arm926ejs";
	36	};
	37	};
	38
	39	memory {
	40	reg = <0x20000000 0x10000000>;
	41	};
	42
	43	ahb {
	44	compatible = "simple-bus";
	45	#address-cells = <1>;
	46	#size-cells = <1>;
	47	ranges;
	48
	49	apb {
	50	compatible = "simple-bus";
	51	#address-cells = <1>;
	52	#size-cells = <1>;
	53	ranges;
	54
	55	aic: interrupt-controller@fffff000 {
f8a073ee	56	#interrupt-cells = <3>;
cce783c6 HX	57	compatible = "atmel,at91rm9200-aic";
	58	interrupt-controller;
	59	reg = <0xfffff000 0x200>;
	60	};
	61
	62	ramc0: ramc@ffffe800 {
	63	compatible = "atmel,at91sam9g45-ddramc";
	64	reg = <0xffffe800 0x200>;
	65	};
	66
	67	pmc: pmc@fffffc00 {
	68	compatible = "atmel,at91rm9200-pmc";
	69	reg = <0xfffffc00 0x100>;
	70	};
	71
	72	rstc@fffffe00 {
	73	compatible = "atmel,at91sam9g45-rstc";
	74	reg = <0xfffffe00 0x10>;
	75	};
	76
	77	pit: timer@fffffe30 {
	78	compatible = "atmel,at91sam9260-pit";
	79	reg = <0xfffffe30 0xf>;
f8a073ee	80	interrupts = <1 4 7>;
cce783c6 HX	81	};
	82
	83	shdwc@fffffe10 {
	84	compatible = "atmel,at91sam9x5-shdwc";
	85	reg = <0xfffffe10 0x10>;
	86	};
	87
9873137a LD	88	mmc0: mmc@f0008000 {
	89	compatible = "atmel,hsmci";
	90	reg = <0xf0008000 0x600>;
	91	interrupts = <12 4 0>;
	92	#address-cells = <1>;
	93	#size-cells = <0>;
	94	status = "disabled";
	95	};
	96
cce783c6 HX	97	tcb0: timer@f8008000 {
	98	compatible = "atmel,at91sam9x5-tcb";
	99	reg = <0xf8008000 0x100>;
f8a073ee	100	interrupts = <17 4 0>;
cce783c6 HX	101	};
	102
	103	tcb1: timer@f800c000 {
	104	compatible = "atmel,at91sam9x5-tcb";
	105	reg = <0xf800c000 0x100>;
f8a073ee	106	interrupts = <17 4 0>;
cce783c6 HX	107	};
	108
	109	dma: dma-controller@ffffec00 {
	110	compatible = "atmel,at91sam9g45-dma";
	111	reg = <0xffffec00 0x200>;
f8a073ee	112	interrupts = <20 4 0>;
980ce7d9	113	#dma-cells = <2>;
cce783c6 HX	114	};
cce783c6 HX	115
e4541ff2 JCPV	116	pinctrl@fffff400 {
	117	#address-cells = <1>;
	118	#size-cells = <1>;
5314ec8e	119	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	120	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	121
5314ec8e JCPV	122	atmel,mux-mask = <
	123	/* A B C */
	124	0xffffffff 0xffe07983 0x00000000 /* pioA */
	125	0x00040000 0x00047e0f 0x00000000 /* pioB */
	126	0xfdffffff 0x07c00000 0xb83fffff /* pioC */
	127	0x003fffff 0x003f8000 0x00000000 /* pioD */
	128	>;
	129
	130	/* shared pinctrl settings */
ec6754a7 JCPV	131	dbgu {
	132	pinctrl_dbgu: dbgu-0 {
	133	atmel,pins =
	134	<0 9 0x1 0x0 /* PA9 periph A */
	135	0 10 0x1 0x1>; /* PA10 periph with pullup */
	136	};
	137	};
	138
9e3129e9 JCPV	139	usart0 {
9e3129e9 JCPV	140	pinctrl_usart0: usart0-0 {
ec6754a7 JCPV	141	atmel,pins =
	142	<0 1 0x1 0x1 /* PA1 periph A with pullup */
	143	0 0 0x1 0x0>; /* PA0 periph A */
	144	};
	145
c58c0c5a	146	pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7	147	atmel,pins =
c58c0c5a JCPV	148	<0 2 0x1 0x0>; /* PA2 periph A */
	149	};
	150
	151	pinctrl_usart0_cts: usart0_cts-0 {
	152	atmel,pins =
	153	<0 3 0x1 0x0>; /* PA3 periph A */
ec6754a7 JCPV	154	};
	155	};
	156
9e3129e9 JCPV	157	usart1 {
9e3129e9 JCPV	158	pinctrl_usart1: usart1-0 {
ec6754a7 JCPV	159	atmel,pins =
	160	<0 6 0x1 0x1 /* PA6 periph A with pullup */
	161	0 5 0x1 0x0>; /* PA5 periph A */
	162	};
	163	};
	164
9e3129e9 JCPV	165	usart2 {
9e3129e9 JCPV	166	pinctrl_usart2: usart2-0 {
ec6754a7 JCPV	167	atmel,pins =
	168	<0 8 0x1 0x1 /* PA8 periph A with pullup */
	169	0 7 0x1 0x0>; /* PA7 periph A */
	170	};
	171
c58c0c5a	172	pinctrl_usart2_rts: usart2_rts-0 {
ec6754a7	173	atmel,pins =
c58c0c5a JCPV	174	<1 0 0x2 0x0>; /* PB0 periph B */
	175	};
	176
	177	pinctrl_usart2_cts: usart2_cts-0 {
	178	atmel,pins =
	179	<1 1 0x2 0x0>; /* PB1 periph B */
ec6754a7 JCPV	180	};
	181	};
	182
9e3129e9 JCPV	183	usart3 {
9e3129e9 JCPV	184	pinctrl_usart3: usart3-0 {
ec6754a7 JCPV	185	atmel,pins =
	186	<2 23 0x2 0x1 /* PC23 periph B with pullup */
	187	2 22 0x2 0x0>; /* PC22 periph B */
	188	};
	189
c58c0c5a JCPV	190	pinctrl_usart3_rts: usart3_rts-0 {
	191	atmel,pins =
	192	<2 24 0x2 0x0>; /* PC24 periph B */
	193	};
	194
	195	pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7	196	atmel,pins =
c58c0c5a	197	<2 25 0x2 0x0>; /* PC25 periph B */
ec6754a7 JCPV	198	};
	199	};
	200
9e3129e9 JCPV	201	uart0 {
9e3129e9 JCPV	202	pinctrl_uart0: uart0-0 {
ec6754a7 JCPV	203	atmel,pins =
	204	<2 9 0x3 0x1 /* PC9 periph C with pullup */
	205	2 8 0x3 0x0>; /* PC8 periph C */
	206	};
	207	};
	208
9e3129e9 JCPV	209	uart1 {
9e3129e9 JCPV	210	pinctrl_uart1: uart1-0 {
ec6754a7 JCPV	211	atmel,pins =
	212	<2 16 0x3 0x1 /* PC17 periph C with pullup */
	213	2 17 0x3 0x0>; /* PC16 periph C */
	214	};
	215	};
5314ec8e	216
7a38d450 JCPV	217	nand {
	218	pinctrl_nand: nand-0 {
	219	atmel,pins =
	220	<3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
	221	3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
	222	};
	223	};
	224
d4fe9ac7 JCPV	225	mmc0 {
	226	pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
	227	atmel,pins =
	228	<0 17 0x1 0x0 /* PA17 periph A */
	229	0 16 0x1 0x1 /* PA16 periph A with pullup */
	230	0 15 0x1 0x1>; /* PA15 periph A with pullup */
	231	};
	232
	233	pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
	234	atmel,pins =
	235	<0 18 0x1 0x1 /* PA18 periph A with pullup */
	236	0 19 0x1 0x1 /* PA19 periph A with pullup */
	237	0 20 0x1 0x1>; /* PA20 periph A with pullup */
	238	};
	239
	240	pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
	241	atmel,pins =
	242	<0 11 0x2 0x1 /* PA11 periph B with pullup */
	243	0 12 0x2 0x1 /* PA12 periph B with pullup */
	244	0 13 0x2 0x1 /* PA13 periph B with pullup */
	245	0 14 0x2 0x1>; /* PA14 periph B with pullup */
	246	};
	247	};
	248
544ae6b2 BS	249	ssc0 {
	250	pinctrl_ssc0_tx: ssc0_tx-0 {
	251	atmel,pins =
	252	<0 24 0x2 0x0 /* PA24 periph B */
	253	0 25 0x2 0x0 /* PA25 periph B */
	254	0 26 0x2 0x0>; /* PA26 periph B */
	255	};
	256
	257	pinctrl_ssc0_rx: ssc0_rx-0 {
	258	atmel,pins =
	259	<0 27 0x2 0x0 /* PA27 periph B */
	260	0 28 0x2 0x0 /* PA28 periph B */
	261	0 29 0x2 0x0>; /* PA29 periph B */
	262	};
	263	};
	264
e4541ff2 JCPV	265	pioA: gpio@fffff400 {
	266	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	267	reg = <0xfffff400 0x200>;
	268	interrupts = <2 4 1>;
	269	#gpio-cells = <2>;
	270	gpio-controller;
	271	interrupt-controller;
	272	#interrupt-cells = <2>;
	273	};
	274
	275	pioB: gpio@fffff600 {
	276	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	277	reg = <0xfffff600 0x200>;
	278	interrupts = <2 4 1>;
	279	#gpio-cells = <2>;
	280	gpio-controller;
	281	interrupt-controller;
	282	#interrupt-cells = <2>;
	283	};
	284
	285	pioC: gpio@fffff800 {
	286	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	287	reg = <0xfffff800 0x200>;
	288	interrupts = <3 4 1>;
	289	#gpio-cells = <2>;
	290	gpio-controller;
	291	interrupt-controller;
	292	#interrupt-cells = <2>;
	293	};
	294
	295	pioD: gpio@fffffa00 {
	296	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	297	reg = <0xfffffa00 0x200>;
	298	interrupts = <3 4 1>;
	299	#gpio-cells = <2>;
	300	gpio-controller;
	301	interrupt-controller;
	302	#interrupt-cells = <2>;
	303	};
cce783c6 HX	304	};
	305
	306	dbgu: serial@fffff200 {
	307	compatible = "atmel,at91sam9260-usart";
	308	reg = <0xfffff200 0x200>;
f8a073ee	309	interrupts = <1 4 7>;
ec6754a7 JCPV	310	pinctrl-names = "default";
ec6754a7 JCPV	311	pinctrl-0 = <&pinctrl_dbgu>;
cce783c6 HX	312	status = "disabled";
	313	};
	314
544ae6b2 BS	315	ssc0: ssc@f0010000 {
	316	compatible = "atmel,at91sam9g45-ssc";
	317	reg = <0xf0010000 0x4000>;
	318	interrupts = <28 4 5>;
	319	pinctrl-names = "default";
	320	pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
	321	status = "disabled";
	322	};
	323
cce783c6 HX	324	usart0: serial@f801c000 {
	325	compatible = "atmel,at91sam9260-usart";
	326	reg = <0xf801c000 0x4000>;
f8a073ee	327	interrupts = <5 4 5>;
ec6754a7	328	pinctrl-names = "default";
9e3129e9	329	pinctrl-0 = <&pinctrl_usart0>;
cce783c6 HX	330	status = "disabled";
	331	};
	332
	333	usart1: serial@f8020000 {
	334	compatible = "atmel,at91sam9260-usart";
	335	reg = <0xf8020000 0x4000>;
f8a073ee	336	interrupts = <6 4 5>;
ec6754a7	337	pinctrl-names = "default";
9e3129e9	338	pinctrl-0 = <&pinctrl_usart1>;
cce783c6 HX	339	status = "disabled";
	340	};
	341
	342	usart2: serial@f8024000 {
	343	compatible = "atmel,at91sam9260-usart";
	344	reg = <0xf8024000 0x4000>;
f8a073ee	345	interrupts = <7 4 5>;
ec6754a7	346	pinctrl-names = "default";
9e3129e9	347	pinctrl-0 = <&pinctrl_usart2>;
cce783c6 HX	348	status = "disabled";
	349	};
	350
	351	usart3: serial@f8028000 {
	352	compatible = "atmel,at91sam9260-usart";
	353	reg = <0xf8028000 0x4000>;
f8a073ee	354	interrupts = <8 4 5>;
ec6754a7	355	pinctrl-names = "default";
9e3129e9	356	pinctrl-0 = <&pinctrl_usart3>;
cce783c6 HX	357	status = "disabled";
cce783c6 HX	358	};
05dcd361 LD	359
	360	i2c0: i2c@f8010000 {
	361	compatible = "atmel,at91sam9x5-i2c";
	362	reg = <0xf8010000 0x100>;
	363	interrupts = <9 4 6>;
d9a63a45 LD	364	dmas = <&dma 1 13>,
	365	<&dma 1 14>;
	366	dma-names = "tx", "rx";
05dcd361 LD	367	#address-cells = <1>;
	368	#size-cells = <0>;
	369	status = "disabled";
	370	};
	371
	372	i2c1: i2c@f8014000 {
	373	compatible = "atmel,at91sam9x5-i2c";
	374	reg = <0xf8014000 0x100>;
	375	interrupts = <10 4 6>;
d9a63a45 LD	376	dmas = <&dma 1 15>,
	377	<&dma 1 16>;
	378	dma-names = "tx", "rx";
05dcd361 LD	379	#address-cells = <1>;
	380	#size-cells = <0>;
	381	status = "disabled";
	382	};
cce783c6 HX	383	};
	384
	385	nand0: nand@40000000 {
	386	compatible = "atmel,at91rm9200-nand";
	387	#address-cells = <1>;
	388	#size-cells = <1>;
	389	reg = < 0x40000000 0x10000000
	390	0xffffe000 0x00000600
	391	0xffffe600 0x00000200
c18c6b29	392	0x00108000 0x00018000
cce783c6	393	>;
c18c6b29	394	atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
cce783c6 HX	395	atmel,nand-addr-offset = <21>;
cce783c6 HX	396	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	397	pinctrl-names = "default";
7a38d450 JCPV	398	pinctrl-0 = <&pinctrl_nand>;
cce783c6 HX	399	gpios = <&pioD 5 0
	400	&pioD 4 0
	401	0
	402	>;
	403	status = "disabled";
	404	};
	405
	406	usb0: ohci@00500000 {
	407	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	408	reg = <0x00500000 0x00100000>;
f8a073ee	409	interrupts = <22 4 2>;
cce783c6 HX	410	status = "disabled";
	411	};
	412	};
	413
	414	i2c@0 {
	415	compatible = "i2c-gpio";
	416	gpios = <&pioA 30 0 /* sda */
	417	&pioA 31 0 /* scl */
	418	>;
	419	i2c-gpio,sda-open-drain;
	420	i2c-gpio,scl-open-drain;
	421	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	422	#address-cells = <1>;
	423	#size-cells = <0>;
	424	status = "disabled";
	425	};
	426	};