[deliverable/linux.git] / arch / arm / boot / dts / at91sam9x5.dtsi

/*
 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
 *                   AT91SAM9X25, AT91SAM9X35 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9x5 family SoC";
	compatible = "atmel,at91sam9x5";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma0: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
			};

			dma1: dma-controller@ffffee00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffee00 0x200>;
				interrupts = <21 4 0>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<0 9 0x1 0x0	/* PA9 periph A */
							 0 10 0x1 0x1>;	/* PA10 periph A with pullup */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<0 0 0x1 0x1	/* PA0 periph A with pullup */
							 0 1 0x1 0x0>;	/* PA1 periph A */
					};

					pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
						atmel,pins =
							<0 2 0x1 0x0	/* PA2 periph A */
							 0 3 0x1 0x0>;	/* PA3 periph A */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<0 5 0x1 0x1	/* PA5 periph A with pullup */
							 0 6 0x1 0x0>;	/* PA6 periph A */
					};

					pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
						atmel,pins =
							<3 27 0x3 0x0	/* PC27 periph C */
							 3 28 0x3 0x0>;	/* PC28 periph C */
					};
				};

				uart2 {
					pinctrl_uart2: uart2-0 {
						atmel,pins =
							<0 7 0x1 0x1	/* PA7 periph A with pullup */
							 0 8 0x1 0x0>;	/* PA8 periph A */
					};

					pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
						atmel,pins =
							<0 0 0x2 0x0	/* PB0 periph B */
							 0 1 0x2 0x0>;	/* PB1 periph B */
					};
				};

				uart3 {
					pinctrl_uart3: uart3-0 {
						atmel,pins =
							<3 23 0x2 0x1	/* PC22 periph B with pullup */
							 3 23 0x2 0x0>;	/* PC23 periph B */
					};

					pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
						atmel,pins =
							<3 24 0x2 0x0	/* PC24 periph B */
							 3 25 0x2 0x0>;	/* PC25 periph B */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<3 8 0x3 0x0	/* PC8 periph C */
							 3 9 0x3 0x1>;	/* PC9 periph C with pullup */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<3 16 0x3 0x0	/* PC16 periph C */
							 3 17 0x3 0x1>;	/* PC17 periph C with pullup */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <19>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <22>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x200>;
				interrupts = <5 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x200>;
				interrupts = <6 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x200>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart2>;
				status = "disabled";
			};

			macb0: ethernet@f802c000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf802c000 0x100>;
				interrupts = <24 4 3>;
				status = "disabled";
			};

			macb1: ethernet@f8030000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf8030000 0x100>;
				interrupts = <27 4 3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c2: i2c@f8018000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8018000 0x100>;
				interrupts = <11 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			adc0: adc@f804c000 {
				compatible = "atmel,at91sam9260-adc";
				reg = <0xf804c000 0x100>;
				interrupts = <19 4 0>;
				atmel,adc-use-external;
				atmel,adc-channels-used = <0xffff>;
				atmel,adc-vref = <3300>;
				atmel,adc-num-channels = <12>;
				atmel,adc-startup-time = <40>;
				atmel,adc-channel-base = <0x50>;
				atmel,adc-drdy-mask = <0x1000000>;
				atmel,adc-status-register = <0x30>;
				atmel,adc-trigger-register = <0xc0>;

				trigger@0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};

				trigger@1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00600000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00600000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};

		usb1: ehci@00700000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@1 {
		compatible = "i2c-gpio";
		gpios = <&pioC 0 0 /* sda */
			 &pioC 1 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@2 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 0 /* sda */
			 &pioB 5 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
467f1cf5 NF	1	/*
	2	* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
	3	* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
	4	* AT91SAM9X25, AT91SAM9X35 SoC
	5	*
	6	* Copyright (C) 2012 Atmel,
	7	* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9x5 family SoC";
	16	compatible = "atmel,at91sam9x5";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	gpio0 = &pioA;
	25	gpio1 = &pioB;
	26	gpio2 = &pioC;
	27	gpio3 = &pioD;
	28	tcb0 = &tcb0;
	29	tcb1 = &tcb1;
05dcd361 LD	30	i2c0 = &i2c0;
	31	i2c1 = &i2c1;
	32	i2c2 = &i2c2;
467f1cf5 NF	33	};
	34	cpus {
	35	cpu@0 {
	36	compatible = "arm,arm926ejs";
	37	};
	38	};
	39
dcce6ce8	40	memory {
467f1cf5 NF	41	reg = <0x20000000 0x10000000>;
	42	};
	43
	44	ahb {
	45	compatible = "simple-bus";
	46	#address-cells = <1>;
	47	#size-cells = <1>;
	48	ranges;
	49
	50	apb {
	51	compatible = "simple-bus";
	52	#address-cells = <1>;
	53	#size-cells = <1>;
	54	ranges;
	55
	56	aic: interrupt-controller@fffff000 {
f8a073ee	57	#interrupt-cells = <3>;
467f1cf5 NF	58	compatible = "atmel,at91rm9200-aic";
467f1cf5 NF	59	interrupt-controller;
467f1cf5	60	reg = <0xfffff000 0x200>;
c6573943	61	atmel,external-irqs = <31>;
467f1cf5 NF	62	};
467f1cf5 NF	63
a7776ec6 JCPV	64	ramc0: ramc@ffffe800 {
	65	compatible = "atmel,at91sam9g45-ddramc";
	66	reg = <0xffffe800 0x200>;
	67	};
	68
eb5e76ff JCPV	69	pmc: pmc@fffffc00 {
	70	compatible = "atmel,at91rm9200-pmc";
	71	reg = <0xfffffc00 0x100>;
	72	};
	73
c8082d34 JCPV	74	rstc@fffffe00 {
	75	compatible = "atmel,at91sam9g45-rstc";
	76	reg = <0xfffffe00 0x10>;
	77	};
	78
82015c4e JCPV	79	shdwc@fffffe10 {
	80	compatible = "atmel,at91sam9x5-shdwc";
	81	reg = <0xfffffe10 0x10>;
	82	};
	83
467f1cf5 NF	84	pit: timer@fffffe30 {
	85	compatible = "atmel,at91sam9260-pit";
	86	reg = <0xfffffe30 0xf>;
f8a073ee	87	interrupts = <1 4 7>;
467f1cf5 NF	88	};
	89
	90	tcb0: timer@f8008000 {
	91	compatible = "atmel,at91sam9x5-tcb";
	92	reg = <0xf8008000 0x100>;
f8a073ee	93	interrupts = <17 4 0>;
467f1cf5 NF	94	};
	95
	96	tcb1: timer@f800c000 {
	97	compatible = "atmel,at91sam9x5-tcb";
	98	reg = <0xf800c000 0x100>;
f8a073ee	99	interrupts = <17 4 0>;
467f1cf5 NF	100	};
	101
	102	dma0: dma-controller@ffffec00 {
	103	compatible = "atmel,at91sam9g45-dma";
	104	reg = <0xffffec00 0x200>;
f8a073ee	105	interrupts = <20 4 0>;
467f1cf5 NF	106	};
	107
	108	dma1: dma-controller@ffffee00 {
	109	compatible = "atmel,at91sam9g45-dma";
	110	reg = <0xffffee00 0x200>;
f8a073ee	111	interrupts = <21 4 0>;
467f1cf5 NF	112	};
467f1cf5 NF	113
ec6754a7	114	pinctrl@fffff400 {
e4541ff2 JCPV	115	#address-cells = <1>;
e4541ff2 JCPV	116	#size-cells = <1>;
5314ec8e	117	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	118	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	119
5314ec8e	120	/* shared pinctrl settings */
ec6754a7 JCPV	121	dbgu {
	122	pinctrl_dbgu: dbgu-0 {
	123	atmel,pins =
	124	<0 9 0x1 0x0 /* PA9 periph A */
	125	0 10 0x1 0x1>; /* PA10 periph A with pullup */
	126	};
	127	};
	128
	129	uart0 {
	130	pinctrl_uart0: uart0-0 {
	131	atmel,pins =
	132	<0 0 0x1 0x1 /* PA0 periph A with pullup */
	133	0 1 0x1 0x0>; /* PA1 periph A */
	134	};
	135
	136	pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
	137	atmel,pins =
	138	<0 2 0x1 0x0 /* PA2 periph A */
	139	0 3 0x1 0x0>; /* PA3 periph A */
	140	};
	141	};
	142
	143	uart1 {
	144	pinctrl_uart1: uart1-0 {
	145	atmel,pins =
	146	<0 5 0x1 0x1 /* PA5 periph A with pullup */
	147	0 6 0x1 0x0>; /* PA6 periph A */
	148	};
	149
	150	pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
	151	atmel,pins =
	152	<3 27 0x3 0x0 /* PC27 periph C */
	153	3 28 0x3 0x0>; /* PC28 periph C */
	154	};
	155	};
	156
	157	uart2 {
	158	pinctrl_uart2: uart2-0 {
	159	atmel,pins =
	160	<0 7 0x1 0x1 /* PA7 periph A with pullup */
	161	0 8 0x1 0x0>; /* PA8 periph A */
	162	};
	163
	164	pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
	165	atmel,pins =
	166	<0 0 0x2 0x0 /* PB0 periph B */
	167	0 1 0x2 0x0>; /* PB1 periph B */
	168	};
	169	};
	170
	171	uart3 {
	172	pinctrl_uart3: uart3-0 {
	173	atmel,pins =
	174	<3 23 0x2 0x1 /* PC22 periph B with pullup */
	175	3 23 0x2 0x0>; /* PC23 periph B */
	176	};
	177
	178	pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
	179	atmel,pins =
	180	<3 24 0x2 0x0 /* PC24 periph B */
	181	3 25 0x2 0x0>; /* PC25 periph B */
	182	};
	183	};
	184
185	usart0 {
186	pinctrl_usart0: usart0-0 {
187	atmel,pins =
188	<3 8 0x3 0x0 /* PC8 periph C */
189	3 9 0x3 0x1>; /* PC9 periph C with pullup */
190	};
191	};
192
193	usart1 {
194	pinctrl_usart1: usart1-0 {
195	atmel,pins =
196	<3 16 0x3 0x0 /* PC16 periph C */
197	3 17 0x3 0x1>; /* PC17 periph C with pullup */
198	};
199	};
5314ec8e	200
e4541ff2 JCPV	201	pioA: gpio@fffff400 {
	202	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	203	reg = <0xfffff400 0x200>;
	204	interrupts = <2 4 1>;
	205	#gpio-cells = <2>;
	206	gpio-controller;
	207	interrupt-controller;
	208	#interrupt-cells = <2>;
	209	};
	210
	211	pioB: gpio@fffff600 {
	212	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	213	reg = <0xfffff600 0x200>;
	214	interrupts = <2 4 1>;
	215	#gpio-cells = <2>;
	216	gpio-controller;
fc33ff43	217	#gpio-lines = <19>;
e4541ff2 JCPV	218	interrupt-controller;
	219	#interrupt-cells = <2>;
	220	};
	221
	222	pioC: gpio@fffff800 {
	223	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	224	reg = <0xfffff800 0x200>;
	225	interrupts = <3 4 1>;
	226	#gpio-cells = <2>;
	227	gpio-controller;
	228	interrupt-controller;
	229	#interrupt-cells = <2>;
	230	};
	231
	232	pioD: gpio@fffffa00 {
	233	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	234	reg = <0xfffffa00 0x200>;
	235	interrupts = <3 4 1>;
	236	#gpio-cells = <2>;
	237	gpio-controller;
fc33ff43	238	#gpio-lines = <22>;
e4541ff2 JCPV	239	interrupt-controller;
	240	#interrupt-cells = <2>;
	241	};
467f1cf5 NF	242	};
	243
	244	dbgu: serial@fffff200 {
	245	compatible = "atmel,at91sam9260-usart";
	246	reg = <0xfffff200 0x200>;
f8a073ee	247	interrupts = <1 4 7>;
ec6754a7 JCPV	248	pinctrl-names = "default";
ec6754a7 JCPV	249	pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5 NF	250	status = "disabled";
	251	};
	252
	253	usart0: serial@f801c000 {
	254	compatible = "atmel,at91sam9260-usart";
	255	reg = <0xf801c000 0x200>;
f8a073ee	256	interrupts = <5 4 5>;
467f1cf5 NF	257	atmel,use-dma-rx;
467f1cf5 NF	258	atmel,use-dma-tx;
ec6754a7 JCPV	259	pinctrl-names = "default";
ec6754a7 JCPV	260	pinctrl-0 = <&pinctrl_uart0>;
467f1cf5 NF	261	status = "disabled";
	262	};
	263
	264	usart1: serial@f8020000 {
	265	compatible = "atmel,at91sam9260-usart";
	266	reg = <0xf8020000 0x200>;
f8a073ee	267	interrupts = <6 4 5>;
467f1cf5 NF	268	atmel,use-dma-rx;
467f1cf5 NF	269	atmel,use-dma-tx;
ec6754a7 JCPV	270	pinctrl-names = "default";
ec6754a7 JCPV	271	pinctrl-0 = <&pinctrl_uart1>;
467f1cf5 NF	272	status = "disabled";
	273	};
	274
	275	usart2: serial@f8024000 {
	276	compatible = "atmel,at91sam9260-usart";
	277	reg = <0xf8024000 0x200>;
f8a073ee	278	interrupts = <7 4 5>;
467f1cf5 NF	279	atmel,use-dma-rx;
467f1cf5 NF	280	atmel,use-dma-tx;
ec6754a7 JCPV	281	pinctrl-names = "default";
ec6754a7 JCPV	282	pinctrl-0 = <&pinctrl_uart2>;
467f1cf5 NF	283	status = "disabled";
	284	};
	285
	286	macb0: ethernet@f802c000 {
	287	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	288	reg = <0xf802c000 0x100>;
f8a073ee	289	interrupts = <24 4 3>;
467f1cf5 NF	290	status = "disabled";
	291	};
	292
	293	macb1: ethernet@f8030000 {
	294	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	295	reg = <0xf8030000 0x100>;
f8a073ee	296	interrupts = <27 4 3>;
467f1cf5 NF	297	status = "disabled";
467f1cf5 NF	298	};
d029f371	299
05dcd361 LD	300	i2c0: i2c@f8010000 {
	301	compatible = "atmel,at91sam9x5-i2c";
	302	reg = <0xf8010000 0x100>;
	303	interrupts = <9 4 6>;
	304	#address-cells = <1>;
	305	#size-cells = <0>;
	306	status = "disabled";
	307	};
	308
	309	i2c1: i2c@f8014000 {
	310	compatible = "atmel,at91sam9x5-i2c";
	311	reg = <0xf8014000 0x100>;
	312	interrupts = <10 4 6>;
	313	#address-cells = <1>;
	314	#size-cells = <0>;
	315	status = "disabled";
	316	};
	317
	318	i2c2: i2c@f8018000 {
	319	compatible = "atmel,at91sam9x5-i2c";
	320	reg = <0xf8018000 0x100>;
	321	interrupts = <11 4 6>;
	322	#address-cells = <1>;
	323	#size-cells = <0>;
	324	status = "disabled";
	325	};
	326
d029f371 MR	327	adc0: adc@f804c000 {
	328	compatible = "atmel,at91sam9260-adc";
	329	reg = <0xf804c000 0x100>;
f8a073ee	330	interrupts = <19 4 0>;
d029f371 MR	331	atmel,adc-use-external;
	332	atmel,adc-channels-used = <0xffff>;
	333	atmel,adc-vref = <3300>;
	334	atmel,adc-num-channels = <12>;
	335	atmel,adc-startup-time = <40>;
	336	atmel,adc-channel-base = <0x50>;
	337	atmel,adc-drdy-mask = <0x1000000>;
	338	atmel,adc-status-register = <0x30>;
	339	atmel,adc-trigger-register = <0xc0>;
	340
	341	trigger@0 {
	342	trigger-name = "external-rising";
	343	trigger-value = <0x1>;
	344	trigger-external;
	345	};
	346
	347	trigger@1 {
	348	trigger-name = "external-falling";
	349	trigger-value = <0x2>;
	350	trigger-external;
	351	};
	352
	353	trigger@2 {
	354	trigger-name = "external-any";
	355	trigger-value = <0x3>;
	356	trigger-external;
	357	};
	358
	359	trigger@3 {
	360	trigger-name = "continuous";
	361	trigger-value = <0x6>;
	362	};
	363	};
467f1cf5	364	};
86a89f4f JCPV	365
	366	nand0: nand@40000000 {
	367	compatible = "atmel,at91rm9200-nand";
	368	#address-cells = <1>;
	369	#size-cells = <1>;
	370	reg = <0x40000000 0x10000000
	371	>;
	372	atmel,nand-addr-offset = <21>;
	373	atmel,nand-cmd-offset = <22>;
4352808c NF	374	gpios = <&pioD 5 0
4352808c NF	375	&pioD 4 0
86a89f4f JCPV	376	0
	377	>;
	378	status = "disabled";
	379	};
6a062459 JCPV	380
	381	usb0: ohci@00600000 {
	382	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	383	reg = <0x00600000 0x100000>;
f8a073ee	384	interrupts = <22 4 2>;
6a062459 JCPV	385	status = "disabled";
6a062459 JCPV	386	};
62c5553a JCPV	387
	388	usb1: ehci@00700000 {
	389	compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	390	reg = <0x00700000 0x100000>;
f8a073ee	391	interrupts = <22 4 2>;
62c5553a JCPV	392	status = "disabled";
62c5553a JCPV	393	};
467f1cf5	394	};
10f71c28 JCPV	395
	396	i2c@0 {
	397	compatible = "i2c-gpio";
	398	gpios = <&pioA 30 0 /* sda */
	399	&pioA 31 0 /* scl */
	400	>;
	401	i2c-gpio,sda-open-drain;
	402	i2c-gpio,scl-open-drain;
	403	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	404	#address-cells = <1>;
	405	#size-cells = <0>;
	406	status = "disabled";
	407	};
	408
	409	i2c@1 {
	410	compatible = "i2c-gpio";
	411	gpios = <&pioC 0 0 /* sda */
	412	&pioC 1 0 /* scl */
	413	>;
	414	i2c-gpio,sda-open-drain;
	415	i2c-gpio,scl-open-drain;
	416	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	417	#address-cells = <1>;
	418	#size-cells = <0>;
	419	status = "disabled";
	420	};
	421
	422	i2c@2 {
	423	compatible = "i2c-gpio";
	424	gpios = <&pioB 4 0 /* sda */
	425	&pioB 5 0 /* scl */
	426	>;
	427	i2c-gpio,sda-open-drain;
	428	i2c-gpio,scl-open-drain;
	429	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	430	#address-cells = <1>;
	431	#size-cells = <0>;
	432	status = "disabled";
	433	};
467f1cf5	434	};