[deliverable/linux.git] / arch / arm / boot / dts / at91sam9x5.dtsi

/*
 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
 *                   AT91SAM9X25, AT91SAM9X35 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9x5 family SoC";
	compatible = "atmel,at91sam9x5";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma0: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
			};

			dma1: dma-controller@ffffee00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffee00 0x200>;
				interrupts = <21 4 0>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<0 9 0x1 0x0	/* PA9 periph A */
							 0 10 0x1 0x1>;	/* PA10 periph A with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<0 0 0x1 0x1	/* PA0 periph A with pullup */
							 0 1 0x1 0x0>;	/* PA1 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<0 2 0x1 0x0>;	/* PA2 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<0 3 0x1 0x0>;	/* PA3 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<0 5 0x1 0x1	/* PA5 periph A with pullup */
							 0 6 0x1 0x0>;	/* PA6 periph A */
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<3 27 0x3 0x0>;	/* PC27 periph C */
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<3 28 0x3 0x0>;	/* PC28 periph C */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<0 7 0x1 0x1	/* PA7 periph A with pullup */
							 0 8 0x1 0x0>;	/* PA8 periph A */
					};

					pinctrl_uart2_rts: uart2_rts-0 {
						atmel,pins =
							<0 0 0x2 0x0>;	/* PB0 periph B */
					};

					pinctrl_uart2_cts: uart2_cts-0 {
						atmel,pins =
							<0 1 0x2 0x0>;	/* PB1 periph B */
					};
				};

				usart3 {
					pinctrl_uart3: usart3-0 {
						atmel,pins =
							<3 23 0x2 0x1	/* PC22 periph B with pullup */
							 3 23 0x2 0x0>;	/* PC23 periph B */
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<3 24 0x2 0x0>;	/* PC24 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<3 25 0x2 0x0>;	/* PC25 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<3 8 0x3 0x0	/* PC8 periph C */
							 3 9 0x3 0x1>;	/* PC9 periph C with pullup */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<3 16 0x3 0x0	/* PC16 periph C */
							 3 17 0x3 0x1>;	/* PC17 periph C with pullup */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<3 4 0x0 0x1	/* PD5 gpio RDY pin pull_up */
							 3 5 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
					};
				};

				macb0 {
					pinctrl_macb0_rmii: macb0_rmii-0 {
						atmel,pins =
							<1 0 0x1 0x0	/* PB0 periph A */
							 1 1 0x1 0x0	/* PB1 periph A */
							 1 2 0x1 0x0	/* PB2 periph A */
							 1 3 0x1 0x0	/* PB3 periph A */
							 1 4 0x1 0x0	/* PB4 periph A */
							 1 5 0x1 0x0	/* PB5 periph A */
							 1 6 0x1 0x0	/* PB6 periph A */
							 1 7 0x1 0x0	/* PB7 periph A */
							 1 9 0x1 0x0	/* PB9 periph A */
							 1 10 0x1 0x0>;	/* PB10 periph A */
					};

					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
						atmel,pins =
							<1 8 0x1 0x0	/* PA8 periph A */
							 1 11 0x1 0x0	/* PA11 periph A */
							 1 12 0x1 0x0	/* PA12 periph A */
							 1 13 0x1 0x0	/* PA13 periph A */
							 1 14 0x1 0x0	/* PA14 periph A */
							 1 15 0x1 0x0	/* PA15 periph A */
							 1 16 0x1 0x0	/* PA16 periph A */
							 1 17 0x1 0x0>;	/* PA17 periph A */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <19>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <22>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
				interrupts = <12 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@f000c000 {
				compatible = "atmel,hsmci";
				reg = <0xf000c000 0x600>;
				interrupts = <26 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x200>;
				interrupts = <5 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x200>;
				interrupts = <6 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x200>;
				interrupts = <7 4 5>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			macb0: ethernet@f802c000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf802c000 0x100>;
				interrupts = <24 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_rmii>;
				status = "disabled";
			};

			macb1: ethernet@f8030000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf8030000 0x100>;
				interrupts = <27 4 3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c2: i2c@f8018000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8018000 0x100>;
				interrupts = <11 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			adc0: adc@f804c000 {
				compatible = "atmel,at91sam9260-adc";
				reg = <0xf804c000 0x100>;
				interrupts = <19 4 0>;
				atmel,adc-use-external;
				atmel,adc-channels-used = <0xffff>;
				atmel,adc-vref = <3300>;
				atmel,adc-num-channels = <12>;
				atmel,adc-startup-time = <40>;
				atmel,adc-channel-base = <0x50>;
				atmel,adc-drdy-mask = <0x1000000>;
				atmel,adc-status-register = <0x30>;
				atmel,adc-trigger-register = <0xc0>;

				trigger@0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};

				trigger@1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00600000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00600000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};

		usb1: ehci@00700000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@1 {
		compatible = "i2c-gpio";
		gpios = <&pioC 0 0 /* sda */
			 &pioC 1 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@2 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 0 /* sda */
			 &pioB 5 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
467f1cf5 NF	1	/*
	2	* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
	3	* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
	4	* AT91SAM9X25, AT91SAM9X35 SoC
	5	*
	6	* Copyright (C) 2012 Atmel,
	7	* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9x5 family SoC";
	16	compatible = "atmel,at91sam9x5";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	gpio0 = &pioA;
	25	gpio1 = &pioB;
	26	gpio2 = &pioC;
	27	gpio3 = &pioD;
	28	tcb0 = &tcb0;
	29	tcb1 = &tcb1;
05dcd361 LD	30	i2c0 = &i2c0;
	31	i2c1 = &i2c1;
	32	i2c2 = &i2c2;
467f1cf5 NF	33	};
	34	cpus {
	35	cpu@0 {
	36	compatible = "arm,arm926ejs";
	37	};
	38	};
	39
dcce6ce8	40	memory {
467f1cf5 NF	41	reg = <0x20000000 0x10000000>;
	42	};
	43
	44	ahb {
	45	compatible = "simple-bus";
	46	#address-cells = <1>;
	47	#size-cells = <1>;
	48	ranges;
	49
	50	apb {
	51	compatible = "simple-bus";
	52	#address-cells = <1>;
	53	#size-cells = <1>;
	54	ranges;
	55
	56	aic: interrupt-controller@fffff000 {
f8a073ee	57	#interrupt-cells = <3>;
467f1cf5 NF	58	compatible = "atmel,at91rm9200-aic";
467f1cf5 NF	59	interrupt-controller;
467f1cf5	60	reg = <0xfffff000 0x200>;
c6573943	61	atmel,external-irqs = <31>;
467f1cf5 NF	62	};
467f1cf5 NF	63
a7776ec6 JCPV	64	ramc0: ramc@ffffe800 {
	65	compatible = "atmel,at91sam9g45-ddramc";
	66	reg = <0xffffe800 0x200>;
	67	};
	68
eb5e76ff JCPV	69	pmc: pmc@fffffc00 {
	70	compatible = "atmel,at91rm9200-pmc";
	71	reg = <0xfffffc00 0x100>;
	72	};
	73
c8082d34 JCPV	74	rstc@fffffe00 {
	75	compatible = "atmel,at91sam9g45-rstc";
	76	reg = <0xfffffe00 0x10>;
	77	};
	78
82015c4e JCPV	79	shdwc@fffffe10 {
	80	compatible = "atmel,at91sam9x5-shdwc";
	81	reg = <0xfffffe10 0x10>;
	82	};
	83
467f1cf5 NF	84	pit: timer@fffffe30 {
	85	compatible = "atmel,at91sam9260-pit";
	86	reg = <0xfffffe30 0xf>;
f8a073ee	87	interrupts = <1 4 7>;
467f1cf5 NF	88	};
	89
	90	tcb0: timer@f8008000 {
	91	compatible = "atmel,at91sam9x5-tcb";
	92	reg = <0xf8008000 0x100>;
f8a073ee	93	interrupts = <17 4 0>;
467f1cf5 NF	94	};
	95
	96	tcb1: timer@f800c000 {
	97	compatible = "atmel,at91sam9x5-tcb";
	98	reg = <0xf800c000 0x100>;
f8a073ee	99	interrupts = <17 4 0>;
467f1cf5 NF	100	};
	101
	102	dma0: dma-controller@ffffec00 {
	103	compatible = "atmel,at91sam9g45-dma";
	104	reg = <0xffffec00 0x200>;
f8a073ee	105	interrupts = <20 4 0>;
467f1cf5 NF	106	};
	107
	108	dma1: dma-controller@ffffee00 {
	109	compatible = "atmel,at91sam9g45-dma";
	110	reg = <0xffffee00 0x200>;
f8a073ee	111	interrupts = <21 4 0>;
467f1cf5 NF	112	};
467f1cf5 NF	113
ec6754a7	114	pinctrl@fffff400 {
e4541ff2 JCPV	115	#address-cells = <1>;
e4541ff2 JCPV	116	#size-cells = <1>;
5314ec8e	117	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	118	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	119
5314ec8e	120	/* shared pinctrl settings */
ec6754a7 JCPV	121	dbgu {
	122	pinctrl_dbgu: dbgu-0 {
	123	atmel,pins =
	124	<0 9 0x1 0x0 /* PA9 periph A */
	125	0 10 0x1 0x1>; /* PA10 periph A with pullup */
	126	};
	127	};
	128
9e3129e9 JCPV	129	usart0 {
9e3129e9 JCPV	130	pinctrl_usart0: usart0-0 {
ec6754a7 JCPV	131	atmel,pins =
	132	<0 0 0x1 0x1 /* PA0 periph A with pullup */
	133	0 1 0x1 0x0>; /* PA1 periph A */
	134	};
	135
c58c0c5a	136	pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7	137	atmel,pins =
c58c0c5a JCPV	138	<0 2 0x1 0x0>; /* PA2 periph A */
	139	};
	140
	141	pinctrl_usart0_cts: usart0_cts-0 {
	142	atmel,pins =
	143	<0 3 0x1 0x0>; /* PA3 periph A */
ec6754a7 JCPV	144	};
	145	};
	146
9e3129e9 JCPV	147	usart1 {
9e3129e9 JCPV	148	pinctrl_usart1: usart1-0 {
ec6754a7 JCPV	149	atmel,pins =
	150	<0 5 0x1 0x1 /* PA5 periph A with pullup */
	151	0 6 0x1 0x0>; /* PA6 periph A */
	152	};
	153
c58c0c5a JCPV	154	pinctrl_usart1_rts: usart1_rts-0 {
	155	atmel,pins =
	156	<3 27 0x3 0x0>; /* PC27 periph C */
	157	};
	158
	159	pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7	160	atmel,pins =
c58c0c5a	161	<3 28 0x3 0x0>; /* PC28 periph C */
ec6754a7 JCPV	162	};
	163	};
	164
9e3129e9 JCPV	165	usart2 {
9e3129e9 JCPV	166	pinctrl_usart2: usart2-0 {
ec6754a7 JCPV	167	atmel,pins =
	168	<0 7 0x1 0x1 /* PA7 periph A with pullup */
	169	0 8 0x1 0x0>; /* PA8 periph A */
	170	};
	171
c58c0c5a	172	pinctrl_uart2_rts: uart2_rts-0 {
ec6754a7	173	atmel,pins =
c58c0c5a JCPV	174	<0 0 0x2 0x0>; /* PB0 periph B */
	175	};
	176
	177	pinctrl_uart2_cts: uart2_cts-0 {
	178	atmel,pins =
	179	<0 1 0x2 0x0>; /* PB1 periph B */
ec6754a7 JCPV	180	};
	181	};
	182
9e3129e9 JCPV	183	usart3 {
9e3129e9 JCPV	184	pinctrl_uart3: usart3-0 {
ec6754a7 JCPV	185	atmel,pins =
	186	<3 23 0x2 0x1 /* PC22 periph B with pullup */
	187	3 23 0x2 0x0>; /* PC23 periph B */
	188	};
	189
c58c0c5a JCPV	190	pinctrl_usart3_rts: usart3_rts-0 {
	191	atmel,pins =
	192	<3 24 0x2 0x0>; /* PC24 periph B */
	193	};
	194
	195	pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7	196	atmel,pins =
c58c0c5a	197	<3 25 0x2 0x0>; /* PC25 periph B */
ec6754a7 JCPV	198	};
	199	};
	200
9e3129e9 JCPV	201	uart0 {
9e3129e9 JCPV	202	pinctrl_uart0: uart0-0 {
ec6754a7 JCPV	203	atmel,pins =
	204	<3 8 0x3 0x0 /* PC8 periph C */
	205	3 9 0x3 0x1>; /* PC9 periph C with pullup */
	206	};
	207	};
	208
9e3129e9 JCPV	209	uart1 {
9e3129e9 JCPV	210	pinctrl_uart1: uart1-0 {
ec6754a7 JCPV	211	atmel,pins =
	212	<3 16 0x3 0x0 /* PC16 periph C */
	213	3 17 0x3 0x1>; /* PC17 periph C with pullup */
	214	};
	215	};
5314ec8e	216
7a38d450 JCPV	217	nand {
	218	pinctrl_nand: nand-0 {
	219	atmel,pins =
	220	<3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
	221	3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
	222	};
	223	};
	224
d9b4fe83 JCPV	225	macb0 {
	226	pinctrl_macb0_rmii: macb0_rmii-0 {
	227	atmel,pins =
	228	<1 0 0x1 0x0 /* PB0 periph A */
	229	1 1 0x1 0x0 /* PB1 periph A */
	230	1 2 0x1 0x0 /* PB2 periph A */
	231	1 3 0x1 0x0 /* PB3 periph A */
	232	1 4 0x1 0x0 /* PB4 periph A */
	233	1 5 0x1 0x0 /* PB5 periph A */
	234	1 6 0x1 0x0 /* PB6 periph A */
	235	1 7 0x1 0x0 /* PB7 periph A */
	236	1 9 0x1 0x0 /* PB9 periph A */
	237	1 10 0x1 0x0>; /* PB10 periph A */
	238	};
	239
	240	pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
	241	atmel,pins =
	242	<1 8 0x1 0x0 /* PA8 periph A */
	243	1 11 0x1 0x0 /* PA11 periph A */
	244	1 12 0x1 0x0 /* PA12 periph A */
	245	1 13 0x1 0x0 /* PA13 periph A */
	246	1 14 0x1 0x0 /* PA14 periph A */
	247	1 15 0x1 0x0 /* PA15 periph A */
	248	1 16 0x1 0x0 /* PA16 periph A */
	249	1 17 0x1 0x0>; /* PA17 periph A */
	250	};
	251	};
	252
e4541ff2 JCPV	253	pioA: gpio@fffff400 {
	254	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	255	reg = <0xfffff400 0x200>;
	256	interrupts = <2 4 1>;
	257	#gpio-cells = <2>;
	258	gpio-controller;
	259	interrupt-controller;
	260	#interrupt-cells = <2>;
	261	};
	262
	263	pioB: gpio@fffff600 {
	264	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	265	reg = <0xfffff600 0x200>;
	266	interrupts = <2 4 1>;
	267	#gpio-cells = <2>;
	268	gpio-controller;
fc33ff43	269	#gpio-lines = <19>;
e4541ff2 JCPV	270	interrupt-controller;
	271	#interrupt-cells = <2>;
	272	};
	273
	274	pioC: gpio@fffff800 {
	275	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	276	reg = <0xfffff800 0x200>;
	277	interrupts = <3 4 1>;
	278	#gpio-cells = <2>;
	279	gpio-controller;
	280	interrupt-controller;
	281	#interrupt-cells = <2>;
	282	};
	283
	284	pioD: gpio@fffffa00 {
	285	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	286	reg = <0xfffffa00 0x200>;
	287	interrupts = <3 4 1>;
	288	#gpio-cells = <2>;
	289	gpio-controller;
fc33ff43	290	#gpio-lines = <22>;
e4541ff2 JCPV	291	interrupt-controller;
	292	#interrupt-cells = <2>;
	293	};
467f1cf5 NF	294	};
467f1cf5 NF	295
9873137a LD	296	mmc0: mmc@f0008000 {
	297	compatible = "atmel,hsmci";
	298	reg = <0xf0008000 0x600>;
	299	interrupts = <12 4 0>;
	300	#address-cells = <1>;
	301	#size-cells = <0>;
	302	status = "disabled";
	303	};
	304
	305	mmc1: mmc@f000c000 {
	306	compatible = "atmel,hsmci";
	307	reg = <0xf000c000 0x600>;
	308	interrupts = <26 4 0>;
	309	#address-cells = <1>;
	310	#size-cells = <0>;
	311	status = "disabled";
	312	};
	313
467f1cf5 NF	314	dbgu: serial@fffff200 {
	315	compatible = "atmel,at91sam9260-usart";
	316	reg = <0xfffff200 0x200>;
f8a073ee	317	interrupts = <1 4 7>;
ec6754a7 JCPV	318	pinctrl-names = "default";
ec6754a7 JCPV	319	pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5 NF	320	status = "disabled";
	321	};
	322
	323	usart0: serial@f801c000 {
	324	compatible = "atmel,at91sam9260-usart";
	325	reg = <0xf801c000 0x200>;
f8a073ee	326	interrupts = <5 4 5>;
467f1cf5 NF	327	atmel,use-dma-rx;
467f1cf5 NF	328	atmel,use-dma-tx;
ec6754a7	329	pinctrl-names = "default";
9e3129e9	330	pinctrl-0 = <&pinctrl_usart0>;
467f1cf5 NF	331	status = "disabled";
	332	};
	333
	334	usart1: serial@f8020000 {
	335	compatible = "atmel,at91sam9260-usart";
	336	reg = <0xf8020000 0x200>;
f8a073ee	337	interrupts = <6 4 5>;
467f1cf5 NF	338	atmel,use-dma-rx;
467f1cf5 NF	339	atmel,use-dma-tx;
ec6754a7	340	pinctrl-names = "default";
9e3129e9	341	pinctrl-0 = <&pinctrl_usart1>;
467f1cf5 NF	342	status = "disabled";
	343	};
	344
	345	usart2: serial@f8024000 {
	346	compatible = "atmel,at91sam9260-usart";
	347	reg = <0xf8024000 0x200>;
f8a073ee	348	interrupts = <7 4 5>;
467f1cf5 NF	349	atmel,use-dma-rx;
467f1cf5 NF	350	atmel,use-dma-tx;
ec6754a7	351	pinctrl-names = "default";
9e3129e9	352	pinctrl-0 = <&pinctrl_usart2>;
467f1cf5 NF	353	status = "disabled";
	354	};
	355
	356	macb0: ethernet@f802c000 {
	357	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	358	reg = <0xf802c000 0x100>;
f8a073ee	359	interrupts = <24 4 3>;
d9b4fe83 JCPV	360	pinctrl-names = "default";
d9b4fe83 JCPV	361	pinctrl-0 = <&pinctrl_macb0_rmii>;
467f1cf5 NF	362	status = "disabled";
	363	};
	364
	365	macb1: ethernet@f8030000 {
	366	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	367	reg = <0xf8030000 0x100>;
f8a073ee	368	interrupts = <27 4 3>;
467f1cf5 NF	369	status = "disabled";
467f1cf5 NF	370	};
d029f371	371
05dcd361 LD	372	i2c0: i2c@f8010000 {
	373	compatible = "atmel,at91sam9x5-i2c";
	374	reg = <0xf8010000 0x100>;
	375	interrupts = <9 4 6>;
	376	#address-cells = <1>;
	377	#size-cells = <0>;
	378	status = "disabled";
	379	};
	380
	381	i2c1: i2c@f8014000 {
	382	compatible = "atmel,at91sam9x5-i2c";
	383	reg = <0xf8014000 0x100>;
	384	interrupts = <10 4 6>;
	385	#address-cells = <1>;
	386	#size-cells = <0>;
	387	status = "disabled";
	388	};
	389
	390	i2c2: i2c@f8018000 {
	391	compatible = "atmel,at91sam9x5-i2c";
	392	reg = <0xf8018000 0x100>;
	393	interrupts = <11 4 6>;
	394	#address-cells = <1>;
	395	#size-cells = <0>;
	396	status = "disabled";
	397	};
	398
d029f371 MR	399	adc0: adc@f804c000 {
	400	compatible = "atmel,at91sam9260-adc";
	401	reg = <0xf804c000 0x100>;
f8a073ee	402	interrupts = <19 4 0>;
d029f371 MR	403	atmel,adc-use-external;
	404	atmel,adc-channels-used = <0xffff>;
	405	atmel,adc-vref = <3300>;
	406	atmel,adc-num-channels = <12>;
	407	atmel,adc-startup-time = <40>;
	408	atmel,adc-channel-base = <0x50>;
	409	atmel,adc-drdy-mask = <0x1000000>;
	410	atmel,adc-status-register = <0x30>;
	411	atmel,adc-trigger-register = <0xc0>;
	412
	413	trigger@0 {
	414	trigger-name = "external-rising";
	415	trigger-value = <0x1>;
	416	trigger-external;
	417	};
	418
	419	trigger@1 {
	420	trigger-name = "external-falling";
	421	trigger-value = <0x2>;
	422	trigger-external;
	423	};
	424
	425	trigger@2 {
	426	trigger-name = "external-any";
	427	trigger-value = <0x3>;
	428	trigger-external;
	429	};
	430
	431	trigger@3 {
	432	trigger-name = "continuous";
	433	trigger-value = <0x6>;
	434	};
	435	};
467f1cf5	436	};
86a89f4f JCPV	437
	438	nand0: nand@40000000 {
	439	compatible = "atmel,at91rm9200-nand";
	440	#address-cells = <1>;
	441	#size-cells = <1>;
	442	reg = <0x40000000 0x10000000
	443	>;
	444	atmel,nand-addr-offset = <21>;
	445	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	446	pinctrl-names = "default";
7a38d450 JCPV	447	pinctrl-0 = <&pinctrl_nand>;
4352808c NF	448	gpios = <&pioD 5 0
4352808c NF	449	&pioD 4 0
86a89f4f JCPV	450	0
	451	>;
	452	status = "disabled";
	453	};
6a062459 JCPV	454
	455	usb0: ohci@00600000 {
	456	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	457	reg = <0x00600000 0x100000>;
f8a073ee	458	interrupts = <22 4 2>;
6a062459 JCPV	459	status = "disabled";
6a062459 JCPV	460	};
62c5553a JCPV	461
	462	usb1: ehci@00700000 {
	463	compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	464	reg = <0x00700000 0x100000>;
f8a073ee	465	interrupts = <22 4 2>;
62c5553a JCPV	466	status = "disabled";
62c5553a JCPV	467	};
467f1cf5	468	};
10f71c28 JCPV	469
	470	i2c@0 {
	471	compatible = "i2c-gpio";
	472	gpios = <&pioA 30 0 /* sda */
	473	&pioA 31 0 /* scl */
	474	>;
	475	i2c-gpio,sda-open-drain;
	476	i2c-gpio,scl-open-drain;
	477	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	478	#address-cells = <1>;
	479	#size-cells = <0>;
	480	status = "disabled";
	481	};
	482
	483	i2c@1 {
	484	compatible = "i2c-gpio";
	485	gpios = <&pioC 0 0 /* sda */
	486	&pioC 1 0 /* scl */
	487	>;
	488	i2c-gpio,sda-open-drain;
	489	i2c-gpio,scl-open-drain;
	490	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	491	#address-cells = <1>;
	492	#size-cells = <0>;
	493	status = "disabled";
	494	};
	495
	496	i2c@2 {
	497	compatible = "i2c-gpio";
	498	gpios = <&pioB 4 0 /* sda */
	499	&pioB 5 0 /* scl */
	500	>;
	501	i2c-gpio,sda-open-drain;
	502	i2c-gpio,scl-open-drain;
	503	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	504	#address-cells = <1>;
	505	#size-cells = <0>;
	506	status = "disabled";
	507	};
467f1cf5	508	};