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1 | /* |
2 | * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC | |
3 | * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, | |
4 | * AT91SAM9X25, AT91SAM9X35 SoC | |
5 | * | |
6 | * Copyright (C) 2012 Atmel, | |
7 | * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> | |
8 | * | |
9 | * Licensed under GPLv2 or later. | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | model = "Atmel AT91SAM9x5 family SoC"; | |
16 | compatible = "atmel,at91sam9x5"; | |
17 | interrupt-parent = <&aic>; | |
18 | ||
19 | aliases { | |
20 | serial0 = &dbgu; | |
21 | serial1 = &usart0; | |
22 | serial2 = &usart1; | |
23 | serial3 = &usart2; | |
24 | gpio0 = &pioA; | |
25 | gpio1 = &pioB; | |
26 | gpio2 = &pioC; | |
27 | gpio3 = &pioD; | |
28 | tcb0 = &tcb0; | |
29 | tcb1 = &tcb1; | |
30 | }; | |
31 | cpus { | |
32 | cpu@0 { | |
33 | compatible = "arm,arm926ejs"; | |
34 | }; | |
35 | }; | |
36 | ||
37 | memory@20000000 { | |
38 | reg = <0x20000000 0x10000000>; | |
39 | }; | |
40 | ||
41 | ahb { | |
42 | compatible = "simple-bus"; | |
43 | #address-cells = <1>; | |
44 | #size-cells = <1>; | |
45 | ranges; | |
46 | ||
47 | apb { | |
48 | compatible = "simple-bus"; | |
49 | #address-cells = <1>; | |
50 | #size-cells = <1>; | |
51 | ranges; | |
52 | ||
53 | aic: interrupt-controller@fffff000 { | |
54 | #interrupt-cells = <2>; | |
55 | compatible = "atmel,at91rm9200-aic"; | |
56 | interrupt-controller; | |
57 | interrupt-parent; | |
58 | reg = <0xfffff000 0x200>; | |
59 | }; | |
60 | ||
61 | pit: timer@fffffe30 { | |
62 | compatible = "atmel,at91sam9260-pit"; | |
63 | reg = <0xfffffe30 0xf>; | |
64 | interrupts = <1 4>; | |
65 | }; | |
66 | ||
67 | tcb0: timer@f8008000 { | |
68 | compatible = "atmel,at91sam9x5-tcb"; | |
69 | reg = <0xf8008000 0x100>; | |
70 | interrupts = <17 4>; | |
71 | }; | |
72 | ||
73 | tcb1: timer@f800c000 { | |
74 | compatible = "atmel,at91sam9x5-tcb"; | |
75 | reg = <0xf800c000 0x100>; | |
76 | interrupts = <17 4>; | |
77 | }; | |
78 | ||
79 | dma0: dma-controller@ffffec00 { | |
80 | compatible = "atmel,at91sam9g45-dma"; | |
81 | reg = <0xffffec00 0x200>; | |
82 | interrupts = <20 4>; | |
83 | }; | |
84 | ||
85 | dma1: dma-controller@ffffee00 { | |
86 | compatible = "atmel,at91sam9g45-dma"; | |
87 | reg = <0xffffee00 0x200>; | |
88 | interrupts = <21 4>; | |
89 | }; | |
90 | ||
91 | pioA: gpio@fffff400 { | |
582d5fbd | 92 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
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93 | reg = <0xfffff400 0x100>; |
94 | interrupts = <2 4>; | |
95 | #gpio-cells = <2>; | |
96 | gpio-controller; | |
21f81872 | 97 | interrupt-controller; |
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98 | }; |
99 | ||
100 | pioB: gpio@fffff600 { | |
582d5fbd | 101 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
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102 | reg = <0xfffff600 0x100>; |
103 | interrupts = <2 4>; | |
104 | #gpio-cells = <2>; | |
105 | gpio-controller; | |
21f81872 | 106 | interrupt-controller; |
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107 | }; |
108 | ||
109 | pioC: gpio@fffff800 { | |
582d5fbd | 110 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
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111 | reg = <0xfffff800 0x100>; |
112 | interrupts = <3 4>; | |
113 | #gpio-cells = <2>; | |
114 | gpio-controller; | |
21f81872 | 115 | interrupt-controller; |
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116 | }; |
117 | ||
118 | pioD: gpio@fffffa00 { | |
582d5fbd | 119 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
467f1cf5 NF |
120 | reg = <0xfffffa00 0x100>; |
121 | interrupts = <3 4>; | |
122 | #gpio-cells = <2>; | |
123 | gpio-controller; | |
21f81872 | 124 | interrupt-controller; |
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125 | }; |
126 | ||
127 | dbgu: serial@fffff200 { | |
128 | compatible = "atmel,at91sam9260-usart"; | |
129 | reg = <0xfffff200 0x200>; | |
130 | interrupts = <1 4>; | |
131 | status = "disabled"; | |
132 | }; | |
133 | ||
134 | usart0: serial@f801c000 { | |
135 | compatible = "atmel,at91sam9260-usart"; | |
136 | reg = <0xf801c000 0x200>; | |
137 | interrupts = <5 4>; | |
138 | atmel,use-dma-rx; | |
139 | atmel,use-dma-tx; | |
140 | status = "disabled"; | |
141 | }; | |
142 | ||
143 | usart1: serial@f8020000 { | |
144 | compatible = "atmel,at91sam9260-usart"; | |
145 | reg = <0xf8020000 0x200>; | |
146 | interrupts = <6 4>; | |
147 | atmel,use-dma-rx; | |
148 | atmel,use-dma-tx; | |
149 | status = "disabled"; | |
150 | }; | |
151 | ||
152 | usart2: serial@f8024000 { | |
153 | compatible = "atmel,at91sam9260-usart"; | |
154 | reg = <0xf8024000 0x200>; | |
155 | interrupts = <7 4>; | |
156 | atmel,use-dma-rx; | |
157 | atmel,use-dma-tx; | |
158 | status = "disabled"; | |
159 | }; | |
160 | ||
161 | macb0: ethernet@f802c000 { | |
162 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
163 | reg = <0xf802c000 0x100>; | |
164 | interrupts = <24 4>; | |
165 | status = "disabled"; | |
166 | }; | |
167 | ||
168 | macb1: ethernet@f8030000 { | |
169 | compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
170 | reg = <0xf8030000 0x100>; | |
171 | interrupts = <27 4>; | |
172 | status = "disabled"; | |
173 | }; | |
174 | }; | |
86a89f4f JCPV |
175 | |
176 | nand0: nand@40000000 { | |
177 | compatible = "atmel,at91rm9200-nand"; | |
178 | #address-cells = <1>; | |
179 | #size-cells = <1>; | |
180 | reg = <0x40000000 0x10000000 | |
181 | >; | |
182 | atmel,nand-addr-offset = <21>; | |
183 | atmel,nand-cmd-offset = <22>; | |
184 | gpios = <&pioC 8 0 | |
185 | &pioC 14 0 | |
186 | 0 | |
187 | >; | |
188 | status = "disabled"; | |
189 | }; | |
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190 | }; |
191 | }; |