[deliverable/linux.git] / arch / arm / boot / dts / at91sam9x5.dtsi

/*
 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
 *                   AT91SAM9X25, AT91SAM9X35 SoC
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9x5 family SoC";
	compatible = "atmel,at91sam9x5";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		gpio3 = &pioD;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		ssc0 = &ssc0;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		reg = <0x20000000 0x10000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <3>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				reg = <0xfffff000 0x200>;
				atmel,external-irqs = <31>;
			};

			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
			};

			pmc: pmc@fffffc00 {
				compatible = "atmel,at91rm9200-pmc";
				reg = <0xfffffc00 0x100>;
			};

			rstc@fffffe00 {
				compatible = "atmel,at91sam9g45-rstc";
				reg = <0xfffffe00 0x10>;
			};

			shdwc@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;
				interrupts = <1 4 7>;
			};

			tcb0: timer@f8008000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf8008000 0x100>;
				interrupts = <17 4 0>;
			};

			tcb1: timer@f800c000 {
				compatible = "atmel,at91sam9x5-tcb";
				reg = <0xf800c000 0x100>;
				interrupts = <17 4 0>;
			};

			dma0: dma-controller@ffffec00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffec00 0x200>;
				interrupts = <20 4 0>;
				#dma-cells = <2>;
			};

			dma1: dma-controller@ffffee00 {
				compatible = "atmel,at91sam9g45-dma";
				reg = <0xffffee00 0x200>;
				interrupts = <21 4 0>;
				#dma-cells = <2>;
			};

			pinctrl@fffff400 {
				#address-cells = <1>;
				#size-cells = <1>;
				compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
				ranges = <0xfffff400 0xfffff400 0x800>;

				/* shared pinctrl settings */
				dbgu {
					pinctrl_dbgu: dbgu-0 {
						atmel,pins =
							<0 9 0x1 0x0	/* PA9 periph A */
							 0 10 0x1 0x1>;	/* PA10 periph A with pullup */
					};
				};

				usart0 {
					pinctrl_usart0: usart0-0 {
						atmel,pins =
							<0 0 0x1 0x1	/* PA0 periph A with pullup */
							 0 1 0x1 0x0>;	/* PA1 periph A */
					};

					pinctrl_usart0_rts: usart0_rts-0 {
						atmel,pins =
							<0 2 0x1 0x0>;	/* PA2 periph A */
					};

					pinctrl_usart0_cts: usart0_cts-0 {
						atmel,pins =
							<0 3 0x1 0x0>;	/* PA3 periph A */
					};

					pinctrl_usart0_sck: usart0_sck-0 {
						atmel,pins =
							<0 4 0x1 0x0>;	/* PA4 periph A */
					};
				};

				usart1 {
					pinctrl_usart1: usart1-0 {
						atmel,pins =
							<0 5 0x1 0x1	/* PA5 periph A with pullup */
							 0 6 0x1 0x0>;	/* PA6 periph A */
					};

					pinctrl_usart1_rts: usart1_rts-0 {
						atmel,pins =
							<2 27 0x3 0x0>;	/* PC27 periph C */
					};

					pinctrl_usart1_cts: usart1_cts-0 {
						atmel,pins =
							<2 28 0x3 0x0>;	/* PC28 periph C */
					};

					pinctrl_usart1_sck: usart1_sck-0 {
						atmel,pins =
							<2 28 0x3 0x0>;	/* PC29 periph C */
					};
				};

				usart2 {
					pinctrl_usart2: usart2-0 {
						atmel,pins =
							<0 7 0x1 0x1	/* PA7 periph A with pullup */
							 0 8 0x1 0x0>;	/* PA8 periph A */
					};

					pinctrl_uart2_rts: uart2_rts-0 {
						atmel,pins =
							<1 0 0x2 0x0>;	/* PB0 periph B */
					};

					pinctrl_uart2_cts: uart2_cts-0 {
						atmel,pins =
							<1 1 0x2 0x0>;	/* PB1 periph B */
					};

					pinctrl_usart2_sck: usart2_sck-0 {
						atmel,pins =
							<1 2 0x2 0x0>;	/* PB2 periph B */
					};
				};

				usart3 {
					pinctrl_usart3: usart3-0 {
						atmel,pins =
							<2 22 0x2 0x1	/* PC22 periph B with pullup */
							 2 23 0x2 0x0>;	/* PC23 periph B */
					};

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<2 24 0x2 0x0>;	/* PC24 periph B */
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<2 25 0x2 0x0>;	/* PC25 periph B */
					};

					pinctrl_usart3_sck: usart3_sck-0 {
						atmel,pins =
							<2 26 0x2 0x0>;	/* PC26 periph B */
					};
				};

				uart0 {
					pinctrl_uart0: uart0-0 {
						atmel,pins =
							<2 8 0x3 0x0	/* PC8 periph C */
							 2 9 0x3 0x1>;	/* PC9 periph C with pullup */
					};
				};

				uart1 {
					pinctrl_uart1: uart1-0 {
						atmel,pins =
							<2 16 0x3 0x0	/* PC16 periph C */
							 2 17 0x3 0x1>;	/* PC17 periph C with pullup */
					};
				};

				nand {
					pinctrl_nand: nand-0 {
						atmel,pins =
							<3 4 0x0 0x1	/* PD5 gpio RDY pin pull_up */
							 3 5 0x0 0x1>;	/* PD4 gpio enable pin pull_up */
					};
				};

				macb0 {
					pinctrl_macb0_rmii: macb0_rmii-0 {
						atmel,pins =
							<1 0 0x1 0x0	/* PB0 periph A */
							 1 1 0x1 0x0	/* PB1 periph A */
							 1 2 0x1 0x0	/* PB2 periph A */
							 1 3 0x1 0x0	/* PB3 periph A */
							 1 4 0x1 0x0	/* PB4 periph A */
							 1 5 0x1 0x0	/* PB5 periph A */
							 1 6 0x1 0x0	/* PB6 periph A */
							 1 7 0x1 0x0	/* PB7 periph A */
							 1 9 0x1 0x0	/* PB9 periph A */
							 1 10 0x1 0x0>;	/* PB10 periph A */
					};

					pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
						atmel,pins =
							<1 8 0x1 0x0	/* PB8 periph A */
							 1 11 0x1 0x0	/* PB11 periph A */
							 1 12 0x1 0x0	/* PB12 periph A */
							 1 13 0x1 0x0	/* PB13 periph A */
							 1 14 0x1 0x0	/* PB14 periph A */
							 1 15 0x1 0x0	/* PB15 periph A */
							 1 16 0x1 0x0	/* PB16 periph A */
							 1 17 0x1 0x0>;	/* PB17 periph A */
					};
				};

				mmc0 {
					pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<0 17 0x1 0x0	/* PA17 periph A */
							 0 16 0x1 0x1	/* PA16 periph A with pullup */
							 0 15 0x1 0x1>;	/* PA15 periph A with pullup */
					};

					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
						atmel,pins =
							<0 18 0x1 0x1	/* PA18 periph A with pullup */
							 0 19 0x1 0x1	/* PA19 periph A with pullup */
							 0 20 0x1 0x1>;	/* PA20 periph A with pullup */
					};
				};

				mmc1 {
					pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
						atmel,pins =
							<0 13 0x2 0x0	/* PA13 periph B */
							 0 12 0x2 0x1	/* PA12 periph B with pullup */
							 0 11 0x2 0x1>;	/* PA11 periph B with pullup */
					};

					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
						atmel,pins =
							<0 2 0x2 0x1	/* PA2 periph B with pullup */
							 0 3 0x2 0x1	/* PA3 periph B with pullup */
							 0 4 0x2 0x1>;	/* PA4 periph B with pullup */
					};
				};

				ssc0 {
					pinctrl_ssc0_tx: ssc0_tx-0 {
						atmel,pins =
							<0 24 0x2 0x0	/* PA24 periph B */
							 0 25 0x2 0x0	/* PA25 periph B */
							 0 26 0x2 0x0>;	/* PA26 periph B */
					};

					pinctrl_ssc0_rx: ssc0_rx-0 {
						atmel,pins =
							<0 27 0x2 0x0	/* PA27 periph B */
							 0 28 0x2 0x0	/* PA28 periph B */
							 0 29 0x2 0x0>;	/* PA29 periph B */
					};
				};

				pioA: gpio@fffff400 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff400 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioB: gpio@fffff600 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff600 0x200>;
					interrupts = <2 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <19>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioC: gpio@fffff800 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffff800 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				pioD: gpio@fffffa00 {
					compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
					reg = <0xfffffa00 0x200>;
					interrupts = <3 4 1>;
					#gpio-cells = <2>;
					gpio-controller;
					#gpio-lines = <22>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};
			};

			ssc0: ssc@f0010000 {
				compatible = "atmel,at91sam9g45-ssc";
				reg = <0xf0010000 0x4000>;
				interrupts = <28 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
				status = "disabled";
			};

			mmc0: mmc@f0008000 {
				compatible = "atmel,hsmci";
				reg = <0xf0008000 0x600>;
				interrupts = <12 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			mmc1: mmc@f000c000 {
				compatible = "atmel,hsmci";
				reg = <0xf000c000 0x600>;
				interrupts = <26 4 0>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4 7>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_dbgu>;
				status = "disabled";
			};

			usart0: serial@f801c000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf801c000 0x200>;
				interrupts = <5 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart0>;
				status = "disabled";
			};

			usart1: serial@f8020000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8020000 0x200>;
				interrupts = <6 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart1>;
				status = "disabled";
			};

			usart2: serial@f8024000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xf8024000 0x200>;
				interrupts = <7 4 5>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_usart2>;
				status = "disabled";
			};

			macb0: ethernet@f802c000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf802c000 0x100>;
				interrupts = <24 4 3>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_macb0_rmii>;
				status = "disabled";
			};

			macb1: ethernet@f8030000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xf8030000 0x100>;
				interrupts = <27 4 3>;
				status = "disabled";
			};

			i2c0: i2c@f8010000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8010000 0x100>;
				interrupts = <9 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c1: i2c@f8014000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8014000 0x100>;
				interrupts = <10 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c2: i2c@f8018000 {
				compatible = "atmel,at91sam9x5-i2c";
				reg = <0xf8018000 0x100>;
				interrupts = <11 4 6>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			adc0: adc@f804c000 {
				compatible = "atmel,at91sam9260-adc";
				reg = <0xf804c000 0x100>;
				interrupts = <19 4 0>;
				atmel,adc-use-external;
				atmel,adc-channels-used = <0xffff>;
				atmel,adc-vref = <3300>;
				atmel,adc-num-channels = <12>;
				atmel,adc-startup-time = <40>;
				atmel,adc-channel-base = <0x50>;
				atmel,adc-drdy-mask = <0x1000000>;
				atmel,adc-status-register = <0x30>;
				atmel,adc-trigger-register = <0xc0>;

				trigger@0 {
					trigger-name = "external-rising";
					trigger-value = <0x1>;
					trigger-external;
				};

				trigger@1 {
					trigger-name = "external-falling";
					trigger-value = <0x2>;
					trigger-external;
				};

				trigger@2 {
					trigger-name = "external-any";
					trigger-value = <0x3>;
					trigger-external;
				};

				trigger@3 {
					trigger-name = "continuous";
					trigger-value = <0x6>;
				};
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe000 0x600		/* PMECC Registers */
			       0xffffe600 0x200		/* PMECC Error Location Registers */
			       0x00108000 0x18000	/* PMECC looup table in ROM code  */
			      >;
			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			gpios = <&pioD 5 0
				 &pioD 4 0
				 0
				>;
			status = "disabled";
		};

		usb0: ohci@00600000 {
			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
			reg = <0x00600000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};

		usb1: ehci@00700000 {
			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
			reg = <0x00700000 0x100000>;
			interrupts = <22 4 2>;
			status = "disabled";
		};
	};

	i2c@0 {
		compatible = "i2c-gpio";
		gpios = <&pioA 30 0 /* sda */
			 &pioA 31 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@1 {
		compatible = "i2c-gpio";
		gpios = <&pioC 0 0 /* sda */
			 &pioC 1 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};

	i2c@2 {
		compatible = "i2c-gpio";
		gpios = <&pioB 4 0 /* sda */
			 &pioB 5 0 /* scl */
			>;
		i2c-gpio,sda-open-drain;
		i2c-gpio,scl-open-drain;
		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
467f1cf5 NF	1	/*
	2	* at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
	3	* applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
	4	* AT91SAM9X25, AT91SAM9X35 SoC
	5	*
	6	* Copyright (C) 2012 Atmel,
	7	* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
	8	*
	9	* Licensed under GPLv2 or later.
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	model = "Atmel AT91SAM9x5 family SoC";
	16	compatible = "atmel,at91sam9x5";
	17	interrupt-parent = <&aic>;
	18
	19	aliases {
	20	serial0 = &dbgu;
	21	serial1 = &usart0;
	22	serial2 = &usart1;
	23	serial3 = &usart2;
	24	gpio0 = &pioA;
	25	gpio1 = &pioB;
	26	gpio2 = &pioC;
	27	gpio3 = &pioD;
	28	tcb0 = &tcb0;
	29	tcb1 = &tcb1;
05dcd361 LD	30	i2c0 = &i2c0;
	31	i2c1 = &i2c1;
	32	i2c2 = &i2c2;
099343c6	33	ssc0 = &ssc0;
467f1cf5 NF	34	};
	35	cpus {
	36	cpu@0 {
	37	compatible = "arm,arm926ejs";
	38	};
	39	};
	40
dcce6ce8	41	memory {
467f1cf5 NF	42	reg = <0x20000000 0x10000000>;
	43	};
	44
	45	ahb {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	ranges;
	50
	51	apb {
	52	compatible = "simple-bus";
	53	#address-cells = <1>;
	54	#size-cells = <1>;
	55	ranges;
	56
	57	aic: interrupt-controller@fffff000 {
f8a073ee	58	#interrupt-cells = <3>;
467f1cf5 NF	59	compatible = "atmel,at91rm9200-aic";
467f1cf5 NF	60	interrupt-controller;
467f1cf5	61	reg = <0xfffff000 0x200>;
c6573943	62	atmel,external-irqs = <31>;
467f1cf5 NF	63	};
467f1cf5 NF	64
a7776ec6 JCPV	65	ramc0: ramc@ffffe800 {
	66	compatible = "atmel,at91sam9g45-ddramc";
	67	reg = <0xffffe800 0x200>;
	68	};
	69
eb5e76ff JCPV	70	pmc: pmc@fffffc00 {
	71	compatible = "atmel,at91rm9200-pmc";
	72	reg = <0xfffffc00 0x100>;
	73	};
	74
c8082d34 JCPV	75	rstc@fffffe00 {
	76	compatible = "atmel,at91sam9g45-rstc";
	77	reg = <0xfffffe00 0x10>;
	78	};
	79
82015c4e JCPV	80	shdwc@fffffe10 {
	81	compatible = "atmel,at91sam9x5-shdwc";
	82	reg = <0xfffffe10 0x10>;
	83	};
	84
467f1cf5 NF	85	pit: timer@fffffe30 {
	86	compatible = "atmel,at91sam9260-pit";
	87	reg = <0xfffffe30 0xf>;
f8a073ee	88	interrupts = <1 4 7>;
467f1cf5 NF	89	};
	90
	91	tcb0: timer@f8008000 {
	92	compatible = "atmel,at91sam9x5-tcb";
	93	reg = <0xf8008000 0x100>;
f8a073ee	94	interrupts = <17 4 0>;
467f1cf5 NF	95	};
	96
	97	tcb1: timer@f800c000 {
	98	compatible = "atmel,at91sam9x5-tcb";
	99	reg = <0xf800c000 0x100>;
f8a073ee	100	interrupts = <17 4 0>;
467f1cf5 NF	101	};
	102
	103	dma0: dma-controller@ffffec00 {
	104	compatible = "atmel,at91sam9g45-dma";
	105	reg = <0xffffec00 0x200>;
f8a073ee	106	interrupts = <20 4 0>;
980ce7d9	107	#dma-cells = <2>;
467f1cf5 NF	108	};
	109
	110	dma1: dma-controller@ffffee00 {
	111	compatible = "atmel,at91sam9g45-dma";
	112	reg = <0xffffee00 0x200>;
f8a073ee	113	interrupts = <21 4 0>;
980ce7d9	114	#dma-cells = <2>;
467f1cf5 NF	115	};
467f1cf5 NF	116
ec6754a7	117	pinctrl@fffff400 {
e4541ff2 JCPV	118	#address-cells = <1>;
e4541ff2 JCPV	119	#size-cells = <1>;
5314ec8e	120	compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2 JCPV	121	ranges = <0xfffff400 0xfffff400 0x800>;
e4541ff2 JCPV	122
5314ec8e	123	/* shared pinctrl settings */
ec6754a7 JCPV	124	dbgu {
	125	pinctrl_dbgu: dbgu-0 {
	126	atmel,pins =
	127	<0 9 0x1 0x0 /* PA9 periph A */
	128	0 10 0x1 0x1>; /* PA10 periph A with pullup */
	129	};
	130	};
	131
9e3129e9 JCPV	132	usart0 {
9e3129e9 JCPV	133	pinctrl_usart0: usart0-0 {
ec6754a7 JCPV	134	atmel,pins =
	135	<0 0 0x1 0x1 /* PA0 periph A with pullup */
	136	0 1 0x1 0x0>; /* PA1 periph A */
	137	};
	138
c58c0c5a	139	pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7	140	atmel,pins =
c58c0c5a JCPV	141	<0 2 0x1 0x0>; /* PA2 periph A */
	142	};
	143
	144	pinctrl_usart0_cts: usart0_cts-0 {
	145	atmel,pins =
	146	<0 3 0x1 0x0>; /* PA3 periph A */
ec6754a7	147	};
1bab02ec RG	148
	149	pinctrl_usart0_sck: usart0_sck-0 {
	150	atmel,pins =
	151	<0 4 0x1 0x0>; /* PA4 periph A */
	152	};
ec6754a7 JCPV	153	};
ec6754a7 JCPV	154
9e3129e9 JCPV	155	usart1 {
9e3129e9 JCPV	156	pinctrl_usart1: usart1-0 {
ec6754a7 JCPV	157	atmel,pins =
	158	<0 5 0x1 0x1 /* PA5 periph A with pullup */
	159	0 6 0x1 0x0>; /* PA6 periph A */
	160	};
	161
c58c0c5a JCPV	162	pinctrl_usart1_rts: usart1_rts-0 {
c58c0c5a JCPV	163	atmel,pins =
c89cec3a	164	<2 27 0x3 0x0>; /* PC27 periph C */
c58c0c5a JCPV	165	};
	166
	167	pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7	168	atmel,pins =
c89cec3a	169	<2 28 0x3 0x0>; /* PC28 periph C */
ec6754a7	170	};
1bab02ec RG	171
	172	pinctrl_usart1_sck: usart1_sck-0 {
	173	atmel,pins =
	174	<2 28 0x3 0x0>; /* PC29 periph C */
	175	};
ec6754a7 JCPV	176	};
ec6754a7 JCPV	177
9e3129e9 JCPV	178	usart2 {
9e3129e9 JCPV	179	pinctrl_usart2: usart2-0 {
ec6754a7 JCPV	180	atmel,pins =
	181	<0 7 0x1 0x1 /* PA7 periph A with pullup */
	182	0 8 0x1 0x0>; /* PA8 periph A */
	183	};
	184
c58c0c5a	185	pinctrl_uart2_rts: uart2_rts-0 {
ec6754a7	186	atmel,pins =
c89cec3a	187	<1 0 0x2 0x0>; /* PB0 periph B */
c58c0c5a JCPV	188	};
	189
	190	pinctrl_uart2_cts: uart2_cts-0 {
	191	atmel,pins =
c89cec3a	192	<1 1 0x2 0x0>; /* PB1 periph B */
ec6754a7	193	};
1bab02ec RG	194
	195	pinctrl_usart2_sck: usart2_sck-0 {
	196	atmel,pins =
	197	<1 2 0x2 0x0>; /* PB2 periph B */
	198	};
ec6754a7 JCPV	199	};
ec6754a7 JCPV	200
9e3129e9	201	usart3 {
65a0fe04	202	pinctrl_usart3: usart3-0 {
ec6754a7	203	atmel,pins =
7d4cfece	204	<2 22 0x2 0x1 /* PC22 periph B with pullup */
c89cec3a	205	2 23 0x2 0x0>; /* PC23 periph B */
ec6754a7 JCPV	206	};
ec6754a7 JCPV	207
c58c0c5a JCPV	208	pinctrl_usart3_rts: usart3_rts-0 {
c58c0c5a JCPV	209	atmel,pins =
c89cec3a	210	<2 24 0x2 0x0>; /* PC24 periph B */
c58c0c5a JCPV	211	};
	212
	213	pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7	214	atmel,pins =
c89cec3a	215	<2 25 0x2 0x0>; /* PC25 periph B */
ec6754a7	216	};
1bab02ec RG	217
	218	pinctrl_usart3_sck: usart3_sck-0 {
	219	atmel,pins =
	220	<2 26 0x2 0x0>; /* PC26 periph B */
	221	};
ec6754a7 JCPV	222	};
ec6754a7 JCPV	223
9e3129e9 JCPV	224	uart0 {
9e3129e9 JCPV	225	pinctrl_uart0: uart0-0 {
ec6754a7	226	atmel,pins =
c89cec3a RG	227	<2 8 0x3 0x0 /* PC8 periph C */
c89cec3a RG	228	2 9 0x3 0x1>; /* PC9 periph C with pullup */
ec6754a7 JCPV	229	};
	230	};
	231
9e3129e9 JCPV	232	uart1 {
9e3129e9 JCPV	233	pinctrl_uart1: uart1-0 {
ec6754a7	234	atmel,pins =
c89cec3a RG	235	<2 16 0x3 0x0 /* PC16 periph C */
c89cec3a RG	236	2 17 0x3 0x1>; /* PC17 periph C with pullup */
ec6754a7 JCPV	237	};
ec6754a7 JCPV	238	};
5314ec8e	239
7a38d450 JCPV	240	nand {
	241	pinctrl_nand: nand-0 {
	242	atmel,pins =
	243	<3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */
	244	3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */
	245	};
	246	};
	247
d9b4fe83 JCPV	248	macb0 {
	249	pinctrl_macb0_rmii: macb0_rmii-0 {
	250	atmel,pins =
	251	<1 0 0x1 0x0 /* PB0 periph A */
	252	1 1 0x1 0x0 /* PB1 periph A */
	253	1 2 0x1 0x0 /* PB2 periph A */
	254	1 3 0x1 0x0 /* PB3 periph A */
	255	1 4 0x1 0x0 /* PB4 periph A */
	256	1 5 0x1 0x0 /* PB5 periph A */
	257	1 6 0x1 0x0 /* PB6 periph A */
	258	1 7 0x1 0x0 /* PB7 periph A */
	259	1 9 0x1 0x0 /* PB9 periph A */
	260	1 10 0x1 0x0>; /* PB10 periph A */
	261	};
	262
	263	pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
	264	atmel,pins =
8461c2f6 DG	265	<1 8 0x1 0x0 /* PB8 periph A */
	266	1 11 0x1 0x0 /* PB11 periph A */
	267	1 12 0x1 0x0 /* PB12 periph A */
	268	1 13 0x1 0x0 /* PB13 periph A */
	269	1 14 0x1 0x0 /* PB14 periph A */
	270	1 15 0x1 0x0 /* PB15 periph A */
	271	1 16 0x1 0x0 /* PB16 periph A */
	272	1 17 0x1 0x0>; /* PB17 periph A */
d9b4fe83 JCPV	273	};
	274	};
	275
d4fe9ac7 JCPV	276	mmc0 {
	277	pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
	278	atmel,pins =
	279	<0 17 0x1 0x0 /* PA17 periph A */
	280	0 16 0x1 0x1 /* PA16 periph A with pullup */
	281	0 15 0x1 0x1>; /* PA15 periph A with pullup */
	282	};
	283
	284	pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
	285	atmel,pins =
	286	<0 18 0x1 0x1 /* PA18 periph A with pullup */
	287	0 19 0x1 0x1 /* PA19 periph A with pullup */
	288	0 20 0x1 0x1>; /* PA20 periph A with pullup */
	289	};
	290	};
	291
	292	mmc1 {
	293	pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
	294	atmel,pins =
	295	<0 13 0x2 0x0 /* PA13 periph B */
	296	0 12 0x2 0x1 /* PA12 periph B with pullup */
	297	0 11 0x2 0x1>; /* PA11 periph B with pullup */
	298	};
	299
	300	pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
	301	atmel,pins =
	302	<0 2 0x2 0x1 /* PA2 periph B with pullup */
	303	0 3 0x2 0x1 /* PA3 periph B with pullup */
	304	0 4 0x2 0x1>; /* PA4 periph B with pullup */
	305	};
	306	};
	307
544ae6b2 BS	308	ssc0 {
	309	pinctrl_ssc0_tx: ssc0_tx-0 {
	310	atmel,pins =
	311	<0 24 0x2 0x0 /* PA24 periph B */
	312	0 25 0x2 0x0 /* PA25 periph B */
	313	0 26 0x2 0x0>; /* PA26 periph B */
	314	};
	315
	316	pinctrl_ssc0_rx: ssc0_rx-0 {
	317	atmel,pins =
	318	<0 27 0x2 0x0 /* PA27 periph B */
	319	0 28 0x2 0x0 /* PA28 periph B */
	320	0 29 0x2 0x0>; /* PA29 periph B */
	321	};
	322	};
	323
e4541ff2 JCPV	324	pioA: gpio@fffff400 {
	325	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	326	reg = <0xfffff400 0x200>;
	327	interrupts = <2 4 1>;
	328	#gpio-cells = <2>;
	329	gpio-controller;
	330	interrupt-controller;
	331	#interrupt-cells = <2>;
	332	};
	333
	334	pioB: gpio@fffff600 {
	335	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	336	reg = <0xfffff600 0x200>;
	337	interrupts = <2 4 1>;
	338	#gpio-cells = <2>;
	339	gpio-controller;
fc33ff43	340	#gpio-lines = <19>;
e4541ff2 JCPV	341	interrupt-controller;
	342	#interrupt-cells = <2>;
	343	};
	344
	345	pioC: gpio@fffff800 {
	346	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	347	reg = <0xfffff800 0x200>;
	348	interrupts = <3 4 1>;
	349	#gpio-cells = <2>;
	350	gpio-controller;
	351	interrupt-controller;
	352	#interrupt-cells = <2>;
	353	};
	354
	355	pioD: gpio@fffffa00 {
	356	compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
	357	reg = <0xfffffa00 0x200>;
	358	interrupts = <3 4 1>;
	359	#gpio-cells = <2>;
	360	gpio-controller;
fc33ff43	361	#gpio-lines = <22>;
e4541ff2 JCPV	362	interrupt-controller;
	363	#interrupt-cells = <2>;
	364	};
467f1cf5 NF	365	};
467f1cf5 NF	366
544ae6b2 BS	367	ssc0: ssc@f0010000 {
	368	compatible = "atmel,at91sam9g45-ssc";
	369	reg = <0xf0010000 0x4000>;
	370	interrupts = <28 4 5>;
	371	pinctrl-names = "default";
	372	pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
	373	status = "disabled";
	374	};
	375
9873137a LD	376	mmc0: mmc@f0008000 {
	377	compatible = "atmel,hsmci";
	378	reg = <0xf0008000 0x600>;
	379	interrupts = <12 4 0>;
	380	#address-cells = <1>;
	381	#size-cells = <0>;
	382	status = "disabled";
	383	};
	384
	385	mmc1: mmc@f000c000 {
	386	compatible = "atmel,hsmci";
	387	reg = <0xf000c000 0x600>;
	388	interrupts = <26 4 0>;
	389	#address-cells = <1>;
	390	#size-cells = <0>;
	391	status = "disabled";
	392	};
	393
467f1cf5 NF	394	dbgu: serial@fffff200 {
	395	compatible = "atmel,at91sam9260-usart";
	396	reg = <0xfffff200 0x200>;
f8a073ee	397	interrupts = <1 4 7>;
ec6754a7 JCPV	398	pinctrl-names = "default";
ec6754a7 JCPV	399	pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5 NF	400	status = "disabled";
	401	};
	402
	403	usart0: serial@f801c000 {
	404	compatible = "atmel,at91sam9260-usart";
	405	reg = <0xf801c000 0x200>;
f8a073ee	406	interrupts = <5 4 5>;
ec6754a7	407	pinctrl-names = "default";
9e3129e9	408	pinctrl-0 = <&pinctrl_usart0>;
467f1cf5 NF	409	status = "disabled";
	410	};
	411
	412	usart1: serial@f8020000 {
	413	compatible = "atmel,at91sam9260-usart";
	414	reg = <0xf8020000 0x200>;
f8a073ee	415	interrupts = <6 4 5>;
ec6754a7	416	pinctrl-names = "default";
9e3129e9	417	pinctrl-0 = <&pinctrl_usart1>;
467f1cf5 NF	418	status = "disabled";
	419	};
	420
	421	usart2: serial@f8024000 {
	422	compatible = "atmel,at91sam9260-usart";
	423	reg = <0xf8024000 0x200>;
f8a073ee	424	interrupts = <7 4 5>;
ec6754a7	425	pinctrl-names = "default";
9e3129e9	426	pinctrl-0 = <&pinctrl_usart2>;
467f1cf5 NF	427	status = "disabled";
	428	};
	429
	430	macb0: ethernet@f802c000 {
	431	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	432	reg = <0xf802c000 0x100>;
f8a073ee	433	interrupts = <24 4 3>;
d9b4fe83 JCPV	434	pinctrl-names = "default";
d9b4fe83 JCPV	435	pinctrl-0 = <&pinctrl_macb0_rmii>;
467f1cf5 NF	436	status = "disabled";
	437	};
	438
	439	macb1: ethernet@f8030000 {
	440	compatible = "cdns,at32ap7000-macb", "cdns,macb";
	441	reg = <0xf8030000 0x100>;
f8a073ee	442	interrupts = <27 4 3>;
467f1cf5 NF	443	status = "disabled";
467f1cf5 NF	444	};
d029f371	445
05dcd361 LD	446	i2c0: i2c@f8010000 {
	447	compatible = "atmel,at91sam9x5-i2c";
	448	reg = <0xf8010000 0x100>;
	449	interrupts = <9 4 6>;
	450	#address-cells = <1>;
	451	#size-cells = <0>;
	452	status = "disabled";
	453	};
	454
	455	i2c1: i2c@f8014000 {
	456	compatible = "atmel,at91sam9x5-i2c";
	457	reg = <0xf8014000 0x100>;
	458	interrupts = <10 4 6>;
	459	#address-cells = <1>;
	460	#size-cells = <0>;
	461	status = "disabled";
	462	};
	463
	464	i2c2: i2c@f8018000 {
	465	compatible = "atmel,at91sam9x5-i2c";
	466	reg = <0xf8018000 0x100>;
	467	interrupts = <11 4 6>;
	468	#address-cells = <1>;
	469	#size-cells = <0>;
	470	status = "disabled";
	471	};
	472
d029f371 MR	473	adc0: adc@f804c000 {
	474	compatible = "atmel,at91sam9260-adc";
	475	reg = <0xf804c000 0x100>;
f8a073ee	476	interrupts = <19 4 0>;
d029f371 MR	477	atmel,adc-use-external;
	478	atmel,adc-channels-used = <0xffff>;
	479	atmel,adc-vref = <3300>;
	480	atmel,adc-num-channels = <12>;
	481	atmel,adc-startup-time = <40>;
	482	atmel,adc-channel-base = <0x50>;
	483	atmel,adc-drdy-mask = <0x1000000>;
	484	atmel,adc-status-register = <0x30>;
	485	atmel,adc-trigger-register = <0xc0>;
	486
	487	trigger@0 {
	488	trigger-name = "external-rising";
	489	trigger-value = <0x1>;
	490	trigger-external;
	491	};
	492
	493	trigger@1 {
	494	trigger-name = "external-falling";
	495	trigger-value = <0x2>;
	496	trigger-external;
	497	};
	498
	499	trigger@2 {
	500	trigger-name = "external-any";
	501	trigger-value = <0x3>;
	502	trigger-external;
	503	};
	504
	505	trigger@3 {
	506	trigger-name = "continuous";
	507	trigger-value = <0x6>;
	508	};
	509	};
467f1cf5	510	};
86a89f4f JCPV	511
	512	nand0: nand@40000000 {
	513	compatible = "atmel,at91rm9200-nand";
	514	#address-cells = <1>;
	515	#size-cells = <1>;
	516	reg = <0x40000000 0x10000000
5314bc2d JW	517	0xffffe000 0x600 /* PMECC Registers */
	518	0xffffe600 0x200 /* PMECC Error Location Registers */
	519	0x00108000 0x18000 /* PMECC looup table in ROM code */
86a89f4f	520	>;
5314bc2d	521	atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
86a89f4f JCPV	522	atmel,nand-addr-offset = <21>;
86a89f4f JCPV	523	atmel,nand-cmd-offset = <22>;
7a38d450 JCPV	524	pinctrl-names = "default";
7a38d450 JCPV	525	pinctrl-0 = <&pinctrl_nand>;
4352808c NF	526	gpios = <&pioD 5 0
4352808c NF	527	&pioD 4 0
86a89f4f JCPV	528	0
	529	>;
	530	status = "disabled";
	531	};
6a062459 JCPV	532
	533	usb0: ohci@00600000 {
	534	compatible = "atmel,at91rm9200-ohci", "usb-ohci";
	535	reg = <0x00600000 0x100000>;
f8a073ee	536	interrupts = <22 4 2>;
6a062459 JCPV	537	status = "disabled";
6a062459 JCPV	538	};
62c5553a JCPV	539
	540	usb1: ehci@00700000 {
	541	compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
	542	reg = <0x00700000 0x100000>;
f8a073ee	543	interrupts = <22 4 2>;
62c5553a JCPV	544	status = "disabled";
62c5553a JCPV	545	};
467f1cf5	546	};
10f71c28 JCPV	547
	548	i2c@0 {
	549	compatible = "i2c-gpio";
	550	gpios = <&pioA 30 0 /* sda */
	551	&pioA 31 0 /* scl */
	552	>;
	553	i2c-gpio,sda-open-drain;
	554	i2c-gpio,scl-open-drain;
	555	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	556	#address-cells = <1>;
	557	#size-cells = <0>;
	558	status = "disabled";
	559	};
	560
	561	i2c@1 {
	562	compatible = "i2c-gpio";
	563	gpios = <&pioC 0 0 /* sda */
	564	&pioC 1 0 /* scl */
	565	>;
	566	i2c-gpio,sda-open-drain;
	567	i2c-gpio,scl-open-drain;
	568	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	569	#address-cells = <1>;
	570	#size-cells = <0>;
	571	status = "disabled";
	572	};
	573
	574	i2c@2 {
	575	compatible = "i2c-gpio";
	576	gpios = <&pioB 4 0 /* sda */
	577	&pioB 5 0 /* scl */
	578	>;
	579	i2c-gpio,sda-open-drain;
	580	i2c-gpio,scl-open-drain;
	581	i2c-gpio,delay-us = <2>; /* ~100 kHz */
	582	#address-cells = <1>;
	583	#size-cells = <0>;
	584	status = "disabled";
	585	};
467f1cf5	586	};