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ARM: at91: dt: add header to define at_hdmac configuration
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9x5.dtsi
CommitLineData
467f1cf5
NF		 1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
c9d0f317 13#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 14#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 15#include <dt-bindings/gpio/gpio.h>
467f1cf5
NF		 16
17/ {
18 model = "Atmel AT91SAM9x5 family SoC";
19 compatible = "atmel,at91sam9x5";
20 interrupt-parent = <&aic>;
21
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 gpio0 = &pioA;
28 gpio1 = &pioB;
29 gpio2 = &pioC;
30 gpio3 = &pioD;
31 tcb0 = &tcb0;
32 tcb1 = &tcb1;
05dcd361
LD		 33 i2c0 = &i2c0;
34 i2c1 = &i2c1;
35 i2c2 = &i2c2;
099343c6 36 ssc0 = &ssc0;
467f1cf5
NF		 37 };
38 cpus {
39 cpu@0 {
40 compatible = "arm,arm926ejs";
41 };
42 };
43
dcce6ce8 44 memory {
467f1cf5
NF		 45 reg = <0x20000000 0x10000000>;
46 };
47
48 ahb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 apb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 aic: interrupt-controller@fffff000 {
f8a073ee 61 #interrupt-cells = <3>;
467f1cf5
NF		 62 compatible = "atmel,at91rm9200-aic";
63 interrupt-controller;
467f1cf5 64 reg = <0xfffff000 0x200>;
c6573943 65 atmel,external-irqs = <31>;
467f1cf5
NF		 66 };
67
a7776ec6
JCPV		 68 ramc0: ramc@ffffe800 {
69 compatible = "atmel,at91sam9g45-ddramc";
70 reg = <0xffffe800 0x200>;
71 };
72
eb5e76ff
JCPV		 73 pmc: pmc@fffffc00 {
74 compatible = "atmel,at91rm9200-pmc";
75 reg = <0xfffffc00 0x100>;
76 };
77
c8082d34
JCPV		 78 rstc@fffffe00 {
79 compatible = "atmel,at91sam9g45-rstc";
80 reg = <0xfffffe00 0x10>;
81 };
82
82015c4e
JCPV		 83 shdwc@fffffe10 {
84 compatible = "atmel,at91sam9x5-shdwc";
85 reg = <0xfffffe10 0x10>;
86 };
87
467f1cf5
NF		 88 pit: timer@fffffe30 {
89 compatible = "atmel,at91sam9260-pit";
90 reg = <0xfffffe30 0xf>;
5e8b3bc3 91 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
467f1cf5
NF		 92 };
93
94 tcb0: timer@f8008000 {
95 compatible = "atmel,at91sam9x5-tcb";
96 reg = <0xf8008000 0x100>;
5e8b3bc3 97 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
467f1cf5
NF		 98 };
99
100 tcb1: timer@f800c000 {
101 compatible = "atmel,at91sam9x5-tcb";
102 reg = <0xf800c000 0x100>;
5e8b3bc3 103 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
467f1cf5
NF		 104 };
105
106 dma0: dma-controller@ffffec00 {
107 compatible = "atmel,at91sam9g45-dma";
108 reg = <0xffffec00 0x200>;
5e8b3bc3 109 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 110 #dma-cells = <2>;
467f1cf5
NF		 111 };
112
113 dma1: dma-controller@ffffee00 {
114 compatible = "atmel,at91sam9g45-dma";
115 reg = <0xffffee00 0x200>;
5e8b3bc3 116 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 117 #dma-cells = <2>;
467f1cf5
NF		 118 };
119
ec6754a7 120 pinctrl@fffff400 {
e4541ff2
JCPV		 121 #address-cells = <1>;
122 #size-cells = <1>;
5314ec8e 123 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2
JCPV		 124 ranges = <0xfffff400 0xfffff400 0x800>;
125
5314ec8e 126 /* shared pinctrl settings */
ec6754a7
JCPV		 127 dbgu {
128 pinctrl_dbgu: dbgu-0 {
129 atmel,pins =
c9d0f317
JCPV		 130 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
131 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
ec6754a7
JCPV		 132 };
133 };
134
9e3129e9
JCPV		 135 usart0 {
136 pinctrl_usart0: usart0-0 {
ec6754a7 137 atmel,pins =
c9d0f317
JCPV		 138 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
139 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
ec6754a7
JCPV		 140 };
141
c58c0c5a 142 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 143 atmel,pins =
c9d0f317 144 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
c58c0c5a
JCPV		 145 };
146
147 pinctrl_usart0_cts: usart0_cts-0 {
148 atmel,pins =
c9d0f317 149 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
ec6754a7 150 };
1bab02ec
RG		 151
152 pinctrl_usart0_sck: usart0_sck-0 {
153 atmel,pins =
c9d0f317 154 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
1bab02ec 155 };
ec6754a7
JCPV		 156 };
157
9e3129e9
JCPV		 158 usart1 {
159 pinctrl_usart1: usart1-0 {
ec6754a7 160 atmel,pins =
c9d0f317
JCPV		 161 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
162 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
ec6754a7
JCPV		 163 };
164
c58c0c5a
JCPV		 165 pinctrl_usart1_rts: usart1_rts-0 {
166 atmel,pins =
c9d0f317 167 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
c58c0c5a
JCPV		 168 };
169
170 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 171 atmel,pins =
c9d0f317 172 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
ec6754a7 173 };
1bab02ec
RG		 174
175 pinctrl_usart1_sck: usart1_sck-0 {
176 atmel,pins =
c9d0f317 177 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
1bab02ec 178 };
ec6754a7
JCPV		 179 };
180
9e3129e9
JCPV		 181 usart2 {
182 pinctrl_usart2: usart2-0 {
ec6754a7 183 atmel,pins =
c9d0f317
JCPV		 184 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
185 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
ec6754a7
JCPV		 186 };
187
c58c0c5a 188 pinctrl_uart2_rts: uart2_rts-0 {
ec6754a7 189 atmel,pins =
c9d0f317 190 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
c58c0c5a
JCPV		 191 };
192
193 pinctrl_uart2_cts: uart2_cts-0 {
194 atmel,pins =
c9d0f317 195 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
ec6754a7 196 };
1bab02ec
RG		 197
198 pinctrl_usart2_sck: usart2_sck-0 {
199 atmel,pins =
c9d0f317 200 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
1bab02ec 201 };
ec6754a7
JCPV		 202 };
203
9e3129e9 204 usart3 {
65a0fe04 205 pinctrl_usart3: usart3-0 {
ec6754a7 206 atmel,pins =
c9d0f317
JCPV		 207 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
208 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
ec6754a7
JCPV		 209 };
210
c58c0c5a
JCPV		 211 pinctrl_usart3_rts: usart3_rts-0 {
212 atmel,pins =
c9d0f317 213 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
c58c0c5a
JCPV		 214 };
215
216 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 217 atmel,pins =
c9d0f317 218 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
ec6754a7 219 };
1bab02ec
RG		 220
221 pinctrl_usart3_sck: usart3_sck-0 {
222 atmel,pins =
c9d0f317 223 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
1bab02ec 224 };
ec6754a7
JCPV		 225 };
226
9e3129e9
JCPV		 227 uart0 {
228 pinctrl_uart0: uart0-0 {
ec6754a7 229 atmel,pins =
c9d0f317
JCPV		 230 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
231 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
ec6754a7
JCPV		 232 };
233 };
234
9e3129e9
JCPV		 235 uart1 {
236 pinctrl_uart1: uart1-0 {
ec6754a7 237 atmel,pins =
c9d0f317
JCPV		 238 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
239 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
ec6754a7
JCPV		 240 };
241 };
5314ec8e 242
7a38d450
JCPV		 243 nand {
244 pinctrl_nand: nand-0 {
245 atmel,pins =
c9d0f317
JCPV		 246 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
247 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
248 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
249 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
250 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
251 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
252 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
253 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
254 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
255 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
256 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
257 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
258 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
259 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
7f06472f
RG		 260 };
261
262 pinctrl_nand_16bits: nand_16bits-0 {
263 atmel,pins =
c9d0f317
JCPV		 264 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
265 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
266 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
267 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
268 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
269 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
270 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
271 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
7a38d450
JCPV		 272 };
273 };
274
d9b4fe83
JCPV		 275 macb0 {
276 pinctrl_macb0_rmii: macb0_rmii-0 {
277 atmel,pins =
c9d0f317
JCPV		 278 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
279 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
280 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
281 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
282 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
283 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
284 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
285 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
286 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
287 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
d9b4fe83
JCPV		 288 };
289
290 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
291 atmel,pins =
c9d0f317
JCPV		 292 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
293 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
294 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
295 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
296 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
297 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
298 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
299 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
d9b4fe83
JCPV		 300 };
301 };
302
d4fe9ac7
JCPV		 303 mmc0 {
304 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
305 atmel,pins =
c9d0f317
JCPV		 306 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
307 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
308 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
d4fe9ac7
JCPV		 309 };
310
311 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
312 atmel,pins =
c9d0f317
JCPV		 313 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
314 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
315 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
d4fe9ac7
JCPV		 316 };
317 };
318
319 mmc1 {
320 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
321 atmel,pins =
c9d0f317
JCPV		 322 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
323 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
324 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
d4fe9ac7
JCPV		 325 };
326
327 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
328 atmel,pins =
c9d0f317
JCPV		 329 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
330 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
331 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
d4fe9ac7
JCPV		 332 };
333 };
334
544ae6b2
BS		 335 ssc0 {
336 pinctrl_ssc0_tx: ssc0_tx-0 {
337 atmel,pins =
c9d0f317
JCPV		 338 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
339 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
340 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
544ae6b2
BS		 341 };
342
343 pinctrl_ssc0_rx: ssc0_rx-0 {
344 atmel,pins =
c9d0f317
JCPV		 345 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
346 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
347 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
544ae6b2
BS		 348 };
349 };
350
a68b728f
WY		 351 spi0 {
352 pinctrl_spi0: spi0-0 {
353 atmel,pins =
c9d0f317
JCPV		 354 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
355 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
356 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
a68b728f
WY		 357 };
358 };
359
360 spi1 {
361 pinctrl_spi1: spi1-0 {
362 atmel,pins =
c9d0f317
JCPV		 363 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
364 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
365 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
a68b728f
WY		 366 };
367 };
368
e9a72ee8
RG		 369 i2c0 {
370 pinctrl_i2c0: i2c0-0 {
371 atmel,pins =
c9d0f317
JCPV		 372 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
373 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
e9a72ee8
RG		 374 };
375 };
376
377 i2c1 {
378 pinctrl_i2c1: i2c1-0 {
379 atmel,pins =
c9d0f317
JCPV		 380 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
381 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
e9a72ee8
RG		 382 };
383 };
384
385 i2c2 {
386 pinctrl_i2c2: i2c2-0 {
387 atmel,pins =
c9d0f317
JCPV		 388 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
389 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
e9a72ee8
RG		 390 };
391 };
392
463c9c7b
RG		 393 i2c_gpio0 {
394 pinctrl_i2c_gpio0: i2c_gpio0-0 {
395 atmel,pins =
c9d0f317
JCPV		 396 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
397 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
463c9c7b
RG		 398 };
399 };
400
401 i2c_gpio1 {
402 pinctrl_i2c_gpio1: i2c_gpio1-0 {
403 atmel,pins =
c9d0f317
JCPV		 404 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
405 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
463c9c7b
RG		 406 };
407 };
408
409 i2c_gpio2 {
410 pinctrl_i2c_gpio2: i2c_gpio2-0 {
411 atmel,pins =
c9d0f317
JCPV		 412 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
413 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
463c9c7b
RG		 414 };
415 };
416
028633c2
BB		 417 tcb0 {
418 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
419 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
420 };
421
422 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
423 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
424 };
425
426 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
427 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
428 };
429
430 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
431 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
432 };
433
434 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
435 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
436 };
437
438 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
439 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
440 };
441
442 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
443 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
444 };
445
446 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
447 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
448 };
449
450 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
451 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
452 };
453 };
454
455 tcb1 {
456 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
457 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
458 };
459
460 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
461 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
462 };
463
464 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
465 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
466 };
467
468 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
469 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
470 };
471
472 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
473 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
474 };
475
476 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
477 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
478 };
479
480 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
481 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
482 };
483
484 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
485 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
486 };
487
488 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
489 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
490 };
491 };
492
e4541ff2
JCPV		 493 pioA: gpio@fffff400 {
494 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
495 reg = <0xfffff400 0x200>;
5e8b3bc3 496 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 497 #gpio-cells = <2>;
498 gpio-controller;
499 interrupt-controller;
500 #interrupt-cells = <2>;
501 };
502
503 pioB: gpio@fffff600 {
504 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
505 reg = <0xfffff600 0x200>;
5e8b3bc3 506 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 507 #gpio-cells = <2>;
508 gpio-controller;
fc33ff43 509 #gpio-lines = <19>;
e4541ff2
JCPV		 510 interrupt-controller;
511 #interrupt-cells = <2>;
512 };
513
514 pioC: gpio@fffff800 {
515 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
516 reg = <0xfffff800 0x200>;
5e8b3bc3 517 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 518 #gpio-cells = <2>;
519 gpio-controller;
520 interrupt-controller;
521 #interrupt-cells = <2>;
522 };
523
524 pioD: gpio@fffffa00 {
525 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
526 reg = <0xfffffa00 0x200>;
5e8b3bc3 527 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 528 #gpio-cells = <2>;
529 gpio-controller;
fc33ff43 530 #gpio-lines = <22>;
e4541ff2
JCPV		 531 interrupt-controller;
532 #interrupt-cells = <2>;
533 };
467f1cf5
NF		 534 };
535
544ae6b2
BS		 536 ssc0: ssc@f0010000 {
537 compatible = "atmel,at91sam9g45-ssc";
538 reg = <0xf0010000 0x4000>;
5e8b3bc3 539 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 540 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
542 status = "disabled";
543 };
544
9873137a
LD		 545 mmc0: mmc@f0008000 {
546 compatible = "atmel,hsmci";
547 reg = <0xf0008000 0x600>;
5e8b3bc3 548 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 549 dmas = <&dma0 1 0>;
550 dma-names = "rxtx";
9873137a
LD		 551 #address-cells = <1>;
552 #size-cells = <0>;
553 status = "disabled";
554 };
555
556 mmc1: mmc@f000c000 {
557 compatible = "atmel,hsmci";
558 reg = <0xf000c000 0x600>;
5e8b3bc3 559 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
05c1bc97
LD		 560 dmas = <&dma1 1 0>;
561 dma-names = "rxtx";
9873137a
LD		 562 #address-cells = <1>;
563 #size-cells = <0>;
564 status = "disabled";
565 };
566
467f1cf5
NF		 567 dbgu: serial@fffff200 {
568 compatible = "atmel,at91sam9260-usart";
569 reg = <0xfffff200 0x200>;
5e8b3bc3 570 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 571 pinctrl-names = "default";
572 pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5
NF		 573 status = "disabled";
574 };
575
576 usart0: serial@f801c000 {
577 compatible = "atmel,at91sam9260-usart";
578 reg = <0xf801c000 0x200>;
5e8b3bc3 579 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 580 pinctrl-names = "default";
9e3129e9 581 pinctrl-0 = <&pinctrl_usart0>;
467f1cf5
NF		 582 status = "disabled";
583 };
584
585 usart1: serial@f8020000 {
586 compatible = "atmel,at91sam9260-usart";
587 reg = <0xf8020000 0x200>;
5e8b3bc3 588 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 589 pinctrl-names = "default";
9e3129e9 590 pinctrl-0 = <&pinctrl_usart1>;
467f1cf5
NF		 591 status = "disabled";
592 };
593
594 usart2: serial@f8024000 {
595 compatible = "atmel,at91sam9260-usart";
596 reg = <0xf8024000 0x200>;
5e8b3bc3 597 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 598 pinctrl-names = "default";
9e3129e9 599 pinctrl-0 = <&pinctrl_usart2>;
467f1cf5
NF		 600 status = "disabled";
601 };
602
603 macb0: ethernet@f802c000 {
604 compatible = "cdns,at32ap7000-macb", "cdns,macb";
605 reg = <0xf802c000 0x100>;
5e8b3bc3 606 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 607 pinctrl-names = "default";
608 pinctrl-0 = <&pinctrl_macb0_rmii>;
467f1cf5
NF		 609 status = "disabled";
610 };
611
612 macb1: ethernet@f8030000 {
613 compatible = "cdns,at32ap7000-macb", "cdns,macb";
614 reg = <0xf8030000 0x100>;
5e8b3bc3 615 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
467f1cf5
NF		 616 status = "disabled";
617 };
d029f371 618
05dcd361
LD		 619 i2c0: i2c@f8010000 {
620 compatible = "atmel,at91sam9x5-i2c";
621 reg = <0xf8010000 0x100>;
5e8b3bc3 622 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 623 dmas = <&dma0 1 7>,
624 <&dma0 1 8>;
625 dma-names = "tx", "rx";
05dcd361
LD		 626 #address-cells = <1>;
627 #size-cells = <0>;
e9a72ee8
RG		 628 pinctrl-names = "default";
629 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 630 status = "disabled";
631 };
632
633 i2c1: i2c@f8014000 {
634 compatible = "atmel,at91sam9x5-i2c";
635 reg = <0xf8014000 0x100>;
5e8b3bc3 636 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 637 dmas = <&dma1 1 5>,
638 <&dma1 1 6>;
639 dma-names = "tx", "rx";
05dcd361
LD		 640 #address-cells = <1>;
641 #size-cells = <0>;
e9a72ee8
RG		 642 pinctrl-names = "default";
643 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 644 status = "disabled";
645 };
646
647 i2c2: i2c@f8018000 {
648 compatible = "atmel,at91sam9x5-i2c";
649 reg = <0xf8018000 0x100>;
5e8b3bc3 650 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
d9a63a45
LD		 651 dmas = <&dma0 1 9>,
652 <&dma0 1 10>;
653 dma-names = "tx", "rx";
05dcd361
LD		 654 #address-cells = <1>;
655 #size-cells = <0>;
e9a72ee8
RG		 656 pinctrl-names = "default";
657 pinctrl-0 = <&pinctrl_i2c2>;
05dcd361
LD		 658 status = "disabled";
659 };
660
06723db5
NF		 661 uart0: serial@f8040000 {
662 compatible = "atmel,at91sam9260-usart";
663 reg = <0xf8040000 0x200>;
664 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
665 pinctrl-names = "default";
666 pinctrl-0 = <&pinctrl_uart0>;
667 status = "disabled";
668 };
669
670 uart1: serial@f8044000 {
671 compatible = "atmel,at91sam9260-usart";
672 reg = <0xf8044000 0x200>;
673 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
674 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_uart1>;
676 status = "disabled";
677 };
678
d029f371
MR		 679 adc0: adc@f804c000 {
680 compatible = "atmel,at91sam9260-adc";
681 reg = <0xf804c000 0x100>;
5e8b3bc3 682 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
d029f371
MR		 683 atmel,adc-use-external;
684 atmel,adc-channels-used = <0xffff>;
685 atmel,adc-vref = <3300>;
686 atmel,adc-num-channels = <12>;
687 atmel,adc-startup-time = <40>;
688 atmel,adc-channel-base = <0x50>;
689 atmel,adc-drdy-mask = <0x1000000>;
690 atmel,adc-status-register = <0x30>;
691 atmel,adc-trigger-register = <0xc0>;
4b50da65
LD		 692 atmel,adc-res = <8 10>;
693 atmel,adc-res-names = "lowres", "highres";
694 atmel,adc-use-res = "highres";
d029f371
MR		 695
696 trigger@0 {
697 trigger-name = "external-rising";
698 trigger-value = <0x1>;
699 trigger-external;
700 };
701
702 trigger@1 {
703 trigger-name = "external-falling";
704 trigger-value = <0x2>;
705 trigger-external;
706 };
707
708 trigger@2 {
709 trigger-name = "external-any";
710 trigger-value = <0x3>;
711 trigger-external;
712 };
713
714 trigger@3 {
715 trigger-name = "continuous";
716 trigger-value = <0x6>;
717 };
718 };
d50f88a0
RG		 719
720 spi0: spi@f0000000 {
721 #address-cells = <1>;
722 #size-cells = <0>;
723 compatible = "atmel,at91rm9200-spi";
724 reg = <0xf0000000 0x100>;
5e8b3bc3 725 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 726 pinctrl-names = "default";
727 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 728 status = "disabled";
729 };
730
731 spi1: spi@f0004000 {
732 #address-cells = <1>;
733 #size-cells = <0>;
734 compatible = "atmel,at91rm9200-spi";
735 reg = <0xf0004000 0x100>;
5e8b3bc3 736 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 737 pinctrl-names = "default";
738 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG		 739 status = "disabled";
740 };
dfab34aa 741
136d3556
WY		 742 watchdog@fffffe40 {
743 compatible = "atmel,at91sam9260-wdt";
744 reg = <0xfffffe40 0x10>;
745 status = "disabled";
746 };
747
b909c6c9 748 rtc@fffffeb0 {
23fb05c6 749 compatible = "atmel,at91sam9x5-rtc";
b909c6c9 750 reg = <0xfffffeb0 0x40>;
5e8b3bc3 751 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
b909c6c9
NF		 752 status = "disabled";
753 };
467f1cf5 754 };
86a89f4f
JCPV		 755
756 nand0: nand@40000000 {
757 compatible = "atmel,at91rm9200-nand";
758 #address-cells = <1>;
759 #size-cells = <1>;
760 reg = <0x40000000 0x10000000
5314bc2d
JW		 761 0xffffe000 0x600 /* PMECC Registers */
762 0xffffe600 0x200 /* PMECC Error Location Registers */
763 0x00108000 0x18000 /* PMECC looup table in ROM code */
86a89f4f 764 >;
5314bc2d 765 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
86a89f4f
JCPV		 766 atmel,nand-addr-offset = <21>;
767 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 768 pinctrl-names = "default";
769 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 770 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
771 &pioD 4 GPIO_ACTIVE_HIGH
86a89f4f
JCPV		 772 0
773 >;
774 status = "disabled";
775 };
6a062459
JCPV		 776
777 usb0: ohci@00600000 {
778 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
779 reg = <0x00600000 0x100000>;
5e8b3bc3 780 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 781 status = "disabled";
782 };
62c5553a
JCPV		 783
784 usb1: ehci@00700000 {
785 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
786 reg = <0x00700000 0x100000>;
5e8b3bc3 787 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 788 status = "disabled";
789 };
467f1cf5 790 };
10f71c28
JCPV		 791
792 i2c@0 {
793 compatible = "i2c-gpio";
92f8629b
JCPV		 794 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
795 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 796 >;
797 i2c-gpio,sda-open-drain;
798 i2c-gpio,scl-open-drain;
799 i2c-gpio,delay-us = <2>; /* ~100 kHz */
800 #address-cells = <1>;
801 #size-cells = <0>;
463c9c7b
RG		 802 pinctrl-names = "default";
803 pinctrl-0 = <&pinctrl_i2c_gpio0>;
10f71c28
JCPV		 804 status = "disabled";
805 };
806
807 i2c@1 {
808 compatible = "i2c-gpio";
92f8629b
JCPV		 809 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
810 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 811 >;
812 i2c-gpio,sda-open-drain;
813 i2c-gpio,scl-open-drain;
814 i2c-gpio,delay-us = <2>; /* ~100 kHz */
815 #address-cells = <1>;
816 #size-cells = <0>;
463c9c7b
RG		 817 pinctrl-names = "default";
818 pinctrl-0 = <&pinctrl_i2c_gpio1>;
10f71c28
JCPV		 819 status = "disabled";
820 };
821
822 i2c@2 {
823 compatible = "i2c-gpio";
92f8629b
JCPV		 824 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
825 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 826 >;
827 i2c-gpio,sda-open-drain;
828 i2c-gpio,scl-open-drain;
829 i2c-gpio,delay-us = <2>; /* ~100 kHz */
830 #address-cells = <1>;
831 #size-cells = <0>;
463c9c7b
RG		 832 pinctrl-names = "default";
833 pinctrl-0 = <&pinctrl_i2c_gpio2>;
10f71c28
JCPV		 834 status = "disabled";
835 };
467f1cf5 836};
Linux kernel - Deliverables
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