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ARM: at91: dt: switch DMA DT bindings to pre-processor
[deliverable/linux.git] / arch / arm / boot / dts / at91sam9x5.dtsi
CommitLineData
467f1cf5
NF		 1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
6db64d29 12#include "skeleton.dtsi"
d4ae89c8 13#include <dt-bindings/dma/at91.h>
c9d0f317 14#include <dt-bindings/pinctrl/at91.h>
5e8b3bc3 15#include <dt-bindings/interrupt-controller/irq.h>
92f8629b 16#include <dt-bindings/gpio/gpio.h>
467f1cf5
NF		 17
18/ {
19 model = "Atmel AT91SAM9x5 family SoC";
20 compatible = "atmel,at91sam9x5";
21 interrupt-parent = <&aic>;
22
23 aliases {
24 serial0 = &dbgu;
25 serial1 = &usart0;
26 serial2 = &usart1;
27 serial3 = &usart2;
28 gpio0 = &pioA;
29 gpio1 = &pioB;
30 gpio2 = &pioC;
31 gpio3 = &pioD;
32 tcb0 = &tcb0;
33 tcb1 = &tcb1;
05dcd361
LD		 34 i2c0 = &i2c0;
35 i2c1 = &i2c1;
36 i2c2 = &i2c2;
099343c6 37 ssc0 = &ssc0;
467f1cf5
NF		 38 };
39 cpus {
40 cpu@0 {
41 compatible = "arm,arm926ejs";
42 };
43 };
44
dcce6ce8 45 memory {
467f1cf5
NF		 46 reg = <0x20000000 0x10000000>;
47 };
48
49 ahb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 apb {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60
61 aic: interrupt-controller@fffff000 {
f8a073ee 62 #interrupt-cells = <3>;
467f1cf5
NF		 63 compatible = "atmel,at91rm9200-aic";
64 interrupt-controller;
467f1cf5 65 reg = <0xfffff000 0x200>;
c6573943 66 atmel,external-irqs = <31>;
467f1cf5
NF		 67 };
68
a7776ec6
JCPV		 69 ramc0: ramc@ffffe800 {
70 compatible = "atmel,at91sam9g45-ddramc";
71 reg = <0xffffe800 0x200>;
72 };
73
eb5e76ff
JCPV		 74 pmc: pmc@fffffc00 {
75 compatible = "atmel,at91rm9200-pmc";
76 reg = <0xfffffc00 0x100>;
77 };
78
c8082d34
JCPV		 79 rstc@fffffe00 {
80 compatible = "atmel,at91sam9g45-rstc";
81 reg = <0xfffffe00 0x10>;
82 };
83
82015c4e
JCPV		 84 shdwc@fffffe10 {
85 compatible = "atmel,at91sam9x5-shdwc";
86 reg = <0xfffffe10 0x10>;
87 };
88
467f1cf5
NF		 89 pit: timer@fffffe30 {
90 compatible = "atmel,at91sam9260-pit";
91 reg = <0xfffffe30 0xf>;
5e8b3bc3 92 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
467f1cf5
NF		 93 };
94
95 tcb0: timer@f8008000 {
96 compatible = "atmel,at91sam9x5-tcb";
97 reg = <0xf8008000 0x100>;
5e8b3bc3 98 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
467f1cf5
NF		 99 };
100
101 tcb1: timer@f800c000 {
102 compatible = "atmel,at91sam9x5-tcb";
103 reg = <0xf800c000 0x100>;
5e8b3bc3 104 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
467f1cf5
NF		 105 };
106
107 dma0: dma-controller@ffffec00 {
108 compatible = "atmel,at91sam9g45-dma";
109 reg = <0xffffec00 0x200>;
5e8b3bc3 110 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 111 #dma-cells = <2>;
467f1cf5
NF		 112 };
113
114 dma1: dma-controller@ffffee00 {
115 compatible = "atmel,at91sam9g45-dma";
116 reg = <0xffffee00 0x200>;
5e8b3bc3 117 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
980ce7d9 118 #dma-cells = <2>;
467f1cf5
NF		 119 };
120
ec6754a7 121 pinctrl@fffff400 {
e4541ff2
JCPV		 122 #address-cells = <1>;
123 #size-cells = <1>;
5314ec8e 124 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
e4541ff2
JCPV		 125 ranges = <0xfffff400 0xfffff400 0x800>;
126
5314ec8e 127 /* shared pinctrl settings */
ec6754a7
JCPV		 128 dbgu {
129 pinctrl_dbgu: dbgu-0 {
130 atmel,pins =
c9d0f317
JCPV		 131 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
132 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
ec6754a7
JCPV		 133 };
134 };
135
9e3129e9
JCPV		 136 usart0 {
137 pinctrl_usart0: usart0-0 {
ec6754a7 138 atmel,pins =
c9d0f317
JCPV		 139 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
140 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
ec6754a7
JCPV		 141 };
142
c58c0c5a 143 pinctrl_usart0_rts: usart0_rts-0 {
ec6754a7 144 atmel,pins =
c9d0f317 145 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
c58c0c5a
JCPV		 146 };
147
148 pinctrl_usart0_cts: usart0_cts-0 {
149 atmel,pins =
c9d0f317 150 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
ec6754a7 151 };
1bab02ec
RG		 152
153 pinctrl_usart0_sck: usart0_sck-0 {
154 atmel,pins =
c9d0f317 155 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
1bab02ec 156 };
ec6754a7
JCPV		 157 };
158
9e3129e9
JCPV		 159 usart1 {
160 pinctrl_usart1: usart1-0 {
ec6754a7 161 atmel,pins =
c9d0f317
JCPV		 162 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
163 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
ec6754a7
JCPV		 164 };
165
c58c0c5a
JCPV		 166 pinctrl_usart1_rts: usart1_rts-0 {
167 atmel,pins =
c9d0f317 168 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
c58c0c5a
JCPV		 169 };
170
171 pinctrl_usart1_cts: usart1_cts-0 {
ec6754a7 172 atmel,pins =
c9d0f317 173 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
ec6754a7 174 };
1bab02ec
RG		 175
176 pinctrl_usart1_sck: usart1_sck-0 {
177 atmel,pins =
c9d0f317 178 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
1bab02ec 179 };
ec6754a7
JCPV		 180 };
181
9e3129e9
JCPV		 182 usart2 {
183 pinctrl_usart2: usart2-0 {
ec6754a7 184 atmel,pins =
c9d0f317
JCPV		 185 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
186 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
ec6754a7
JCPV		 187 };
188
c58c0c5a 189 pinctrl_uart2_rts: uart2_rts-0 {
ec6754a7 190 atmel,pins =
c9d0f317 191 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
c58c0c5a
JCPV		 192 };
193
194 pinctrl_uart2_cts: uart2_cts-0 {
195 atmel,pins =
c9d0f317 196 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
ec6754a7 197 };
1bab02ec
RG		 198
199 pinctrl_usart2_sck: usart2_sck-0 {
200 atmel,pins =
c9d0f317 201 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
1bab02ec 202 };
ec6754a7
JCPV		 203 };
204
9e3129e9 205 usart3 {
65a0fe04 206 pinctrl_usart3: usart3-0 {
ec6754a7 207 atmel,pins =
c9d0f317
JCPV		 208 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
209 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
ec6754a7
JCPV		 210 };
211
c58c0c5a
JCPV		 212 pinctrl_usart3_rts: usart3_rts-0 {
213 atmel,pins =
c9d0f317 214 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
c58c0c5a
JCPV		 215 };
216
217 pinctrl_usart3_cts: usart3_cts-0 {
ec6754a7 218 atmel,pins =
c9d0f317 219 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
ec6754a7 220 };
1bab02ec
RG		 221
222 pinctrl_usart3_sck: usart3_sck-0 {
223 atmel,pins =
c9d0f317 224 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
1bab02ec 225 };
ec6754a7
JCPV		 226 };
227
9e3129e9
JCPV		 228 uart0 {
229 pinctrl_uart0: uart0-0 {
ec6754a7 230 atmel,pins =
c9d0f317
JCPV		 231 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
232 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
ec6754a7
JCPV		 233 };
234 };
235
9e3129e9
JCPV		 236 uart1 {
237 pinctrl_uart1: uart1-0 {
ec6754a7 238 atmel,pins =
c9d0f317
JCPV		 239 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
240 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
ec6754a7
JCPV		 241 };
242 };
5314ec8e 243
7a38d450
JCPV		 244 nand {
245 pinctrl_nand: nand-0 {
246 atmel,pins =
c9d0f317
JCPV		 247 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
248 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
249 AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
250 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
251 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
252 AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
253 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
254 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
255 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
256 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
257 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
258 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
259 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
260 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
7f06472f
RG		 261 };
262
263 pinctrl_nand_16bits: nand_16bits-0 {
264 atmel,pins =
c9d0f317
JCPV		 265 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
266 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
267 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
268 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
269 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
270 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
271 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
272 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
7a38d450
JCPV		 273 };
274 };
275
d9b4fe83
JCPV		 276 macb0 {
277 pinctrl_macb0_rmii: macb0_rmii-0 {
278 atmel,pins =
c9d0f317
JCPV		 279 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
280 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
281 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
282 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
283 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
284 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
285 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
286 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
287 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
288 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
d9b4fe83
JCPV		 289 };
290
291 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
292 atmel,pins =
c9d0f317
JCPV		 293 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
294 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
295 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
296 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
297 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
298 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
299 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
300 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
d9b4fe83
JCPV		 301 };
302 };
303
d4fe9ac7
JCPV		 304 mmc0 {
305 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
306 atmel,pins =
c9d0f317
JCPV		 307 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
308 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
309 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
d4fe9ac7
JCPV		 310 };
311
312 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
313 atmel,pins =
c9d0f317
JCPV		 314 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
315 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
316 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
d4fe9ac7
JCPV		 317 };
318 };
319
320 mmc1 {
321 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
322 atmel,pins =
c9d0f317
JCPV		 323 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
324 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
325 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
d4fe9ac7
JCPV		 326 };
327
328 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
329 atmel,pins =
c9d0f317
JCPV		 330 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
331 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
332 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
d4fe9ac7
JCPV		 333 };
334 };
335
544ae6b2
BS		 336 ssc0 {
337 pinctrl_ssc0_tx: ssc0_tx-0 {
338 atmel,pins =
c9d0f317
JCPV		 339 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
340 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
341 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
544ae6b2
BS		 342 };
343
344 pinctrl_ssc0_rx: ssc0_rx-0 {
345 atmel,pins =
c9d0f317
JCPV		 346 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
347 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
348 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
544ae6b2
BS		 349 };
350 };
351
a68b728f
WY		 352 spi0 {
353 pinctrl_spi0: spi0-0 {
354 atmel,pins =
c9d0f317
JCPV		 355 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
356 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
357 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
a68b728f
WY		 358 };
359 };
360
361 spi1 {
362 pinctrl_spi1: spi1-0 {
363 atmel,pins =
c9d0f317
JCPV		 364 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
365 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
366 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
a68b728f
WY		 367 };
368 };
369
e9a72ee8
RG		 370 i2c0 {
371 pinctrl_i2c0: i2c0-0 {
372 atmel,pins =
c9d0f317
JCPV		 373 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
374 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
e9a72ee8
RG		 375 };
376 };
377
378 i2c1 {
379 pinctrl_i2c1: i2c1-0 {
380 atmel,pins =
c9d0f317
JCPV		 381 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
382 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
e9a72ee8
RG		 383 };
384 };
385
386 i2c2 {
387 pinctrl_i2c2: i2c2-0 {
388 atmel,pins =
c9d0f317
JCPV		 389 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
390 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
e9a72ee8
RG		 391 };
392 };
393
463c9c7b
RG		 394 i2c_gpio0 {
395 pinctrl_i2c_gpio0: i2c_gpio0-0 {
396 atmel,pins =
c9d0f317
JCPV		 397 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
398 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
463c9c7b
RG		 399 };
400 };
401
402 i2c_gpio1 {
403 pinctrl_i2c_gpio1: i2c_gpio1-0 {
404 atmel,pins =
c9d0f317
JCPV		 405 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
406 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
463c9c7b
RG		 407 };
408 };
409
410 i2c_gpio2 {
411 pinctrl_i2c_gpio2: i2c_gpio2-0 {
412 atmel,pins =
c9d0f317
JCPV		 413 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
414 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
463c9c7b
RG		 415 };
416 };
417
028633c2
BB		 418 tcb0 {
419 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
420 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
424 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
428 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
432 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
436 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
440 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 };
442
443 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
444 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
445 };
446
447 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
448 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
449 };
450
451 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
452 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
453 };
454 };
455
456 tcb1 {
457 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
458 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
459 };
460
461 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
462 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
463 };
464
465 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
466 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
467 };
468
469 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
470 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
471 };
472
473 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
474 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
475 };
476
477 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
478 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
479 };
480
481 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
482 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
483 };
484
485 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
486 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
487 };
488
489 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
490 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
491 };
492 };
493
e4541ff2
JCPV		 494 pioA: gpio@fffff400 {
495 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
496 reg = <0xfffff400 0x200>;
5e8b3bc3 497 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 498 #gpio-cells = <2>;
499 gpio-controller;
500 interrupt-controller;
501 #interrupt-cells = <2>;
502 };
503
504 pioB: gpio@fffff600 {
505 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
506 reg = <0xfffff600 0x200>;
5e8b3bc3 507 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 508 #gpio-cells = <2>;
509 gpio-controller;
fc33ff43 510 #gpio-lines = <19>;
e4541ff2
JCPV		 511 interrupt-controller;
512 #interrupt-cells = <2>;
513 };
514
515 pioC: gpio@fffff800 {
516 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
517 reg = <0xfffff800 0x200>;
5e8b3bc3 518 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 519 #gpio-cells = <2>;
520 gpio-controller;
521 interrupt-controller;
522 #interrupt-cells = <2>;
523 };
524
525 pioD: gpio@fffffa00 {
526 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
527 reg = <0xfffffa00 0x200>;
5e8b3bc3 528 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
e4541ff2
JCPV		 529 #gpio-cells = <2>;
530 gpio-controller;
fc33ff43 531 #gpio-lines = <22>;
e4541ff2
JCPV		 532 interrupt-controller;
533 #interrupt-cells = <2>;
534 };
467f1cf5
NF		 535 };
536
544ae6b2
BS		 537 ssc0: ssc@f0010000 {
538 compatible = "atmel,at91sam9g45-ssc";
539 reg = <0xf0010000 0x4000>;
5e8b3bc3 540 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
544ae6b2
BS		 541 pinctrl-names = "default";
542 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
543 status = "disabled";
544 };
545
9873137a
LD		 546 mmc0: mmc@f0008000 {
547 compatible = "atmel,hsmci";
548 reg = <0xf0008000 0x600>;
5e8b3bc3 549 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 550 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 551 dma-names = "rxtx";
9873137a
LD		 552 #address-cells = <1>;
553 #size-cells = <0>;
554 status = "disabled";
555 };
556
557 mmc1: mmc@f000c000 {
558 compatible = "atmel,hsmci";
559 reg = <0xf000c000 0x600>;
5e8b3bc3 560 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
d4ae89c8 561 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
05c1bc97 562 dma-names = "rxtx";
9873137a
LD		 563 #address-cells = <1>;
564 #size-cells = <0>;
565 status = "disabled";
566 };
567
467f1cf5
NF		 568 dbgu: serial@fffff200 {
569 compatible = "atmel,at91sam9260-usart";
570 reg = <0xfffff200 0x200>;
5e8b3bc3 571 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
ec6754a7
JCPV		 572 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_dbgu>;
467f1cf5
NF		 574 status = "disabled";
575 };
576
577 usart0: serial@f801c000 {
578 compatible = "atmel,at91sam9260-usart";
579 reg = <0xf801c000 0x200>;
5e8b3bc3 580 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 581 pinctrl-names = "default";
9e3129e9 582 pinctrl-0 = <&pinctrl_usart0>;
467f1cf5
NF		 583 status = "disabled";
584 };
585
586 usart1: serial@f8020000 {
587 compatible = "atmel,at91sam9260-usart";
588 reg = <0xf8020000 0x200>;
5e8b3bc3 589 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 590 pinctrl-names = "default";
9e3129e9 591 pinctrl-0 = <&pinctrl_usart1>;
467f1cf5
NF		 592 status = "disabled";
593 };
594
595 usart2: serial@f8024000 {
596 compatible = "atmel,at91sam9260-usart";
597 reg = <0xf8024000 0x200>;
5e8b3bc3 598 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
ec6754a7 599 pinctrl-names = "default";
9e3129e9 600 pinctrl-0 = <&pinctrl_usart2>;
467f1cf5
NF		 601 status = "disabled";
602 };
603
604 macb0: ethernet@f802c000 {
605 compatible = "cdns,at32ap7000-macb", "cdns,macb";
606 reg = <0xf802c000 0x100>;
5e8b3bc3 607 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
d9b4fe83
JCPV		 608 pinctrl-names = "default";
609 pinctrl-0 = <&pinctrl_macb0_rmii>;
467f1cf5
NF		 610 status = "disabled";
611 };
612
613 macb1: ethernet@f8030000 {
614 compatible = "cdns,at32ap7000-macb", "cdns,macb";
615 reg = <0xf8030000 0x100>;
5e8b3bc3 616 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
467f1cf5
NF		 617 status = "disabled";
618 };
d029f371 619
05dcd361
LD		 620 i2c0: i2c@f8010000 {
621 compatible = "atmel,at91sam9x5-i2c";
622 reg = <0xf8010000 0x100>;
5e8b3bc3 623 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 624 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
625 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
d9a63a45 626 dma-names = "tx", "rx";
05dcd361
LD		 627 #address-cells = <1>;
628 #size-cells = <0>;
e9a72ee8
RG		 629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_i2c0>;
05dcd361
LD		 631 status = "disabled";
632 };
633
634 i2c1: i2c@f8014000 {
635 compatible = "atmel,at91sam9x5-i2c";
636 reg = <0xf8014000 0x100>;
5e8b3bc3 637 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 638 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
639 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
d9a63a45 640 dma-names = "tx", "rx";
05dcd361
LD		 641 #address-cells = <1>;
642 #size-cells = <0>;
e9a72ee8
RG		 643 pinctrl-names = "default";
644 pinctrl-0 = <&pinctrl_i2c1>;
05dcd361
LD		 645 status = "disabled";
646 };
647
648 i2c2: i2c@f8018000 {
649 compatible = "atmel,at91sam9x5-i2c";
650 reg = <0xf8018000 0x100>;
5e8b3bc3 651 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
d4ae89c8
LD		 652 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
653 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
d9a63a45 654 dma-names = "tx", "rx";
05dcd361
LD		 655 #address-cells = <1>;
656 #size-cells = <0>;
e9a72ee8
RG		 657 pinctrl-names = "default";
658 pinctrl-0 = <&pinctrl_i2c2>;
05dcd361
LD		 659 status = "disabled";
660 };
661
06723db5
NF		 662 uart0: serial@f8040000 {
663 compatible = "atmel,at91sam9260-usart";
664 reg = <0xf8040000 0x200>;
665 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
666 pinctrl-names = "default";
667 pinctrl-0 = <&pinctrl_uart0>;
668 status = "disabled";
669 };
670
671 uart1: serial@f8044000 {
672 compatible = "atmel,at91sam9260-usart";
673 reg = <0xf8044000 0x200>;
674 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
675 pinctrl-names = "default";
676 pinctrl-0 = <&pinctrl_uart1>;
677 status = "disabled";
678 };
679
d029f371
MR		 680 adc0: adc@f804c000 {
681 compatible = "atmel,at91sam9260-adc";
682 reg = <0xf804c000 0x100>;
5e8b3bc3 683 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
d029f371
MR		 684 atmel,adc-use-external;
685 atmel,adc-channels-used = <0xffff>;
686 atmel,adc-vref = <3300>;
687 atmel,adc-num-channels = <12>;
688 atmel,adc-startup-time = <40>;
689 atmel,adc-channel-base = <0x50>;
690 atmel,adc-drdy-mask = <0x1000000>;
691 atmel,adc-status-register = <0x30>;
692 atmel,adc-trigger-register = <0xc0>;
4b50da65
LD		 693 atmel,adc-res = <8 10>;
694 atmel,adc-res-names = "lowres", "highres";
695 atmel,adc-use-res = "highres";
d029f371
MR		 696
697 trigger@0 {
698 trigger-name = "external-rising";
699 trigger-value = <0x1>;
700 trigger-external;
701 };
702
703 trigger@1 {
704 trigger-name = "external-falling";
705 trigger-value = <0x2>;
706 trigger-external;
707 };
708
709 trigger@2 {
710 trigger-name = "external-any";
711 trigger-value = <0x3>;
712 trigger-external;
713 };
714
715 trigger@3 {
716 trigger-name = "continuous";
717 trigger-value = <0x6>;
718 };
719 };
d50f88a0
RG		 720
721 spi0: spi@f0000000 {
722 #address-cells = <1>;
723 #size-cells = <0>;
724 compatible = "atmel,at91rm9200-spi";
725 reg = <0xf0000000 0x100>;
5e8b3bc3 726 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 727 pinctrl-names = "default";
728 pinctrl-0 = <&pinctrl_spi0>;
d50f88a0
RG		 729 status = "disabled";
730 };
731
732 spi1: spi@f0004000 {
733 #address-cells = <1>;
734 #size-cells = <0>;
735 compatible = "atmel,at91rm9200-spi";
736 reg = <0xf0004000 0x100>;
5e8b3bc3 737 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
a68b728f
WY		 738 pinctrl-names = "default";
739 pinctrl-0 = <&pinctrl_spi1>;
d50f88a0
RG		 740 status = "disabled";
741 };
dfab34aa 742
136d3556
WY		 743 watchdog@fffffe40 {
744 compatible = "atmel,at91sam9260-wdt";
745 reg = <0xfffffe40 0x10>;
746 status = "disabled";
747 };
748
b909c6c9 749 rtc@fffffeb0 {
23fb05c6 750 compatible = "atmel,at91sam9x5-rtc";
b909c6c9 751 reg = <0xfffffeb0 0x40>;
5e8b3bc3 752 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
b909c6c9
NF		 753 status = "disabled";
754 };
467f1cf5 755 };
86a89f4f
JCPV		 756
757 nand0: nand@40000000 {
758 compatible = "atmel,at91rm9200-nand";
759 #address-cells = <1>;
760 #size-cells = <1>;
761 reg = <0x40000000 0x10000000
5314bc2d
JW		 762 0xffffe000 0x600 /* PMECC Registers */
763 0xffffe600 0x200 /* PMECC Error Location Registers */
764 0x00108000 0x18000 /* PMECC looup table in ROM code */
86a89f4f 765 >;
5314bc2d 766 atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
86a89f4f
JCPV		 767 atmel,nand-addr-offset = <21>;
768 atmel,nand-cmd-offset = <22>;
7a38d450
JCPV		 769 pinctrl-names = "default";
770 pinctrl-0 = <&pinctrl_nand>;
92f8629b
JCPV		 771 gpios = <&pioD 5 GPIO_ACTIVE_HIGH
772 &pioD 4 GPIO_ACTIVE_HIGH
86a89f4f
JCPV		 773 0
774 >;
775 status = "disabled";
776 };
6a062459
JCPV		 777
778 usb0: ohci@00600000 {
779 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
780 reg = <0x00600000 0x100000>;
5e8b3bc3 781 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
6a062459
JCPV		 782 status = "disabled";
783 };
62c5553a
JCPV		 784
785 usb1: ehci@00700000 {
786 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
787 reg = <0x00700000 0x100000>;
5e8b3bc3 788 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
62c5553a
JCPV		 789 status = "disabled";
790 };
467f1cf5 791 };
10f71c28
JCPV		 792
793 i2c@0 {
794 compatible = "i2c-gpio";
92f8629b
JCPV		 795 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
796 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 797 >;
798 i2c-gpio,sda-open-drain;
799 i2c-gpio,scl-open-drain;
800 i2c-gpio,delay-us = <2>; /* ~100 kHz */
801 #address-cells = <1>;
802 #size-cells = <0>;
463c9c7b
RG		 803 pinctrl-names = "default";
804 pinctrl-0 = <&pinctrl_i2c_gpio0>;
10f71c28
JCPV		 805 status = "disabled";
806 };
807
808 i2c@1 {
809 compatible = "i2c-gpio";
92f8629b
JCPV		 810 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
811 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 812 >;
813 i2c-gpio,sda-open-drain;
814 i2c-gpio,scl-open-drain;
815 i2c-gpio,delay-us = <2>; /* ~100 kHz */
816 #address-cells = <1>;
817 #size-cells = <0>;
463c9c7b
RG		 818 pinctrl-names = "default";
819 pinctrl-0 = <&pinctrl_i2c_gpio1>;
10f71c28
JCPV		 820 status = "disabled";
821 };
822
823 i2c@2 {
824 compatible = "i2c-gpio";
92f8629b
JCPV		 825 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
826 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
10f71c28
JCPV		 827 >;
828 i2c-gpio,sda-open-drain;
829 i2c-gpio,scl-open-drain;
830 i2c-gpio,delay-us = <2>; /* ~100 kHz */
831 #address-cells = <1>;
832 #size-cells = <0>;
463c9c7b
RG		 833 pinctrl-names = "default";
834 pinctrl-0 = <&pinctrl_i2c_gpio2>;
10f71c28
JCPV		 835 status = "disabled";
836 };
467f1cf5 837};
Linux kernel - Deliverables
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