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1 | /* |
2 | * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an | |
3 | * LCD controller. | |
4 | * | |
5 | * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> | |
6 | * | |
7 | * Licensed under GPLv2. | |
8 | */ | |
9 | ||
10 | #include <dt-bindings/pinctrl/at91.h> | |
11 | #include <dt-bindings/interrupt-controller/irq.h> | |
12 | ||
13 | / { | |
14 | ahb { | |
15 | apb { | |
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16 | hlcdc: hlcdc@f8038000 { |
17 | compatible = "atmel,at91sam9x5-hlcdc"; | |
18 | reg = <0xf8038000 0x4000>; | |
19 | interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; | |
20 | clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; | |
21 | clock-names = "periph_clk","sys_clk", "slow_clk"; | |
22 | status = "disabled"; | |
23 | ||
24 | hlcdc-display-controller { | |
25 | compatible = "atmel,hlcdc-display-controller"; | |
26 | #address-cells = <1>; | |
27 | #size-cells = <0>; | |
28 | ||
29 | port@0 { | |
30 | #address-cells = <1>; | |
31 | #size-cells = <0>; | |
32 | reg = <0>; | |
33 | }; | |
34 | }; | |
35 | ||
36 | hlcdc_pwm: hlcdc-pwm { | |
37 | compatible = "atmel,hlcdc-pwm"; | |
38 | pinctrl-names = "default"; | |
39 | pinctrl-0 = <&pinctrl_lcd_pwm>; | |
40 | #pwm-cells = <3>; | |
41 | }; | |
42 | }; | |
43 | ||
44 | pinctrl@fffff400 { | |
45 | lcd { | |
46 | pinctrl_lcd_base: lcd-base-0 { | |
47 | atmel,pins = | |
48 | <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */ | |
49 | AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */ | |
50 | AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */ | |
51 | AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */ | |
52 | AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */ | |
53 | }; | |
54 | ||
55 | pinctrl_lcd_pwm: lcd-pwm-0 { | |
56 | atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */ | |
57 | }; | |
58 | ||
59 | pinctrl_lcd_rgb444: lcd-rgb-0 { | |
60 | atmel,pins = | |
61 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ | |
62 | AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ | |
63 | AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ | |
64 | AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ | |
65 | AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ | |
66 | AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ | |
67 | AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ | |
68 | AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ | |
69 | AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ | |
70 | AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ | |
71 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ | |
72 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */ | |
73 | }; | |
74 | ||
75 | pinctrl_lcd_rgb565: lcd-rgb-1 { | |
76 | atmel,pins = | |
77 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ | |
78 | AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ | |
79 | AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ | |
80 | AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ | |
81 | AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ | |
82 | AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ | |
83 | AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ | |
84 | AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ | |
85 | AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ | |
86 | AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ | |
87 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ | |
88 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ | |
89 | AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ | |
90 | AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ | |
91 | AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ | |
92 | AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */ | |
93 | }; | |
94 | ||
95 | pinctrl_lcd_rgb666: lcd-rgb-2 { | |
96 | atmel,pins = | |
97 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ | |
98 | AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ | |
99 | AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ | |
100 | AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ | |
101 | AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ | |
102 | AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ | |
103 | AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ | |
104 | AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ | |
105 | AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ | |
106 | AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ | |
107 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ | |
108 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ | |
109 | AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ | |
110 | AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ | |
111 | AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ | |
112 | AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ | |
113 | AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ | |
114 | AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD17 pin */ | |
115 | }; | |
116 | ||
117 | pinctrl_lcd_rgb888: lcd-rgb-3 { | |
118 | atmel,pins = | |
119 | <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */ | |
120 | AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */ | |
121 | AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */ | |
122 | AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */ | |
123 | AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */ | |
124 | AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */ | |
125 | AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */ | |
126 | AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */ | |
127 | AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */ | |
128 | AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */ | |
129 | AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */ | |
130 | AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */ | |
131 | AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */ | |
132 | AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */ | |
133 | AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */ | |
134 | AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */ | |
135 | AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */ | |
136 | AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */ | |
137 | AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */ | |
138 | AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */ | |
139 | AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */ | |
140 | AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */ | |
141 | AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */ | |
142 | AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */ | |
143 | }; | |
144 | }; | |
145 | }; | |
146 | ||
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147 | pmc: pmc@fffffc00 { |
148 | periphck { | |
149 | lcdc_clk: lcdc_clk { | |
150 | #clock-cells = <0>; | |
151 | reg = <25>; | |
152 | }; | |
153 | }; | |
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154 | |
155 | systemck { | |
156 | lcdck: lcdck { | |
157 | #clock-cells = <0>; | |
158 | reg = <3>; | |
159 | clocks = <&mck>; | |
160 | }; | |
161 | }; | |
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162 | }; |
163 | }; | |
164 | }; | |
165 | }; |