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8ac49e04 | 1 | /* |
e3b62ffd | 2 | * Copyright (C) 2012-2013 Broadcom Corporation |
8ac49e04 CD |
3 | * |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation version 2. | |
7 | * | |
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
9 | * kind, whether express or implied; without even the implied warranty | |
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
5401cc43 MP |
14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
15 | #include <dt-bindings/interrupt-controller/irq.h> | |
16 | ||
74375653 | 17 | #include "skeleton.dtsi" |
8ac49e04 CD |
18 | |
19 | / { | |
20 | model = "BCM11351 SoC"; | |
15e22ddf | 21 | compatible = "brcm,bcm11351"; |
8ac49e04 CD |
22 | interrupt-parent = <&gic>; |
23 | ||
24 | chosen { | |
25 | bootargs = "console=ttyS0,115200n8"; | |
26 | }; | |
27 | ||
28 | gic: interrupt-controller@3ff00100 { | |
29 | compatible = "arm,cortex-a9-gic"; | |
30 | #interrupt-cells = <3>; | |
31 | #address-cells = <0>; | |
32 | interrupt-controller; | |
33 | reg = <0x3ff01000 0x1000>, | |
34 | <0x3ff00100 0x100>; | |
35 | }; | |
36 | ||
7f6c62e2 | 37 | smc@0x3404c000 { |
15e22ddf | 38 | compatible = "brcm,bcm11351-smc", "brcm,kona-smc"; |
d22dc5ed | 39 | reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */ |
7f6c62e2 CD |
40 | }; |
41 | ||
8ac49e04 | 42 | uart@3e000000 { |
15e22ddf | 43 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; |
8ac49e04 CD |
44 | status = "disabled"; |
45 | reg = <0x3e000000 0x1000>; | |
740309b6 | 46 | clocks = <&uartb_clk>; |
5401cc43 | 47 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; |
8ac49e04 CD |
48 | reg-shift = <2>; |
49 | reg-io-width = <4>; | |
50 | }; | |
51 | ||
84491c0f TK |
52 | uart@3e001000 { |
53 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | |
54 | status = "disabled"; | |
55 | reg = <0x3e001000 0x1000>; | |
740309b6 | 56 | clocks = <&uartb2_clk>; |
84491c0f TK |
57 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; |
58 | reg-shift = <2>; | |
59 | reg-io-width = <4>; | |
60 | }; | |
61 | ||
62 | uart@3e002000 { | |
63 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | |
64 | status = "disabled"; | |
65 | reg = <0x3e002000 0x1000>; | |
740309b6 | 66 | clocks = <&uartb3_clk>; |
84491c0f TK |
67 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
68 | reg-shift = <2>; | |
69 | reg-io-width = <4>; | |
70 | }; | |
71 | ||
72 | uart@3e003000 { | |
73 | compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; | |
74 | status = "disabled"; | |
75 | reg = <0x3e003000 0x1000>; | |
740309b6 | 76 | clocks = <&uartb4_clk>; |
84491c0f TK |
77 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
78 | reg-shift = <2>; | |
79 | reg-io-width = <4>; | |
80 | }; | |
81 | ||
8ac49e04 | 82 | L2: l2-cache { |
15e22ddf | 83 | compatible = "brcm,bcm11351-a2-pl310-cache"; |
3b656fed CD |
84 | reg = <0x3ff20000 0x1000>; |
85 | cache-unified; | |
86 | cache-level = <2>; | |
8ac49e04 | 87 | }; |
5f03dc20 | 88 | |
e3b62ffd MM |
89 | watchdog@35002f40 { |
90 | compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt"; | |
91 | reg = <0x35002f40 0x6c>; | |
92 | }; | |
93 | ||
5f03dc20 | 94 | timer@35006000 { |
15e22ddf | 95 | compatible = "brcm,kona-timer"; |
5f03dc20 | 96 | reg = <0x35006000 0x1000>; |
5401cc43 | 97 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
788db61a | 98 | clocks = <&hub_timer_clk>; |
5f03dc20 CD |
99 | }; |
100 | ||
d394c7bb MM |
101 | gpio: gpio@35003000 { |
102 | compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; | |
103 | reg = <0x35003000 0x800>; | |
104 | interrupts = | |
105 | <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH | |
106 | GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH | |
107 | GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH | |
108 | GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | |
109 | GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | |
110 | GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; | |
111 | #gpio-cells = <2>; | |
112 | #interrupt-cells = <2>; | |
113 | gpio-controller; | |
114 | interrupt-controller; | |
115 | }; | |
116 | ||
d7358f84 | 117 | sdio1: sdio@3f180000 { |
15e22ddf | 118 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 119 | reg = <0x3f180000 0x10000>; |
9c0dae04 | 120 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; |
92f5d827 | 121 | clocks = <&sdio1_clk>; |
2dbfe748 CD |
122 | status = "disabled"; |
123 | }; | |
124 | ||
d7358f84 | 125 | sdio2: sdio@3f190000 { |
15e22ddf | 126 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 127 | reg = <0x3f190000 0x10000>; |
9c0dae04 | 128 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; |
92f5d827 | 129 | clocks = <&sdio2_clk>; |
2dbfe748 CD |
130 | status = "disabled"; |
131 | }; | |
132 | ||
d7358f84 | 133 | sdio3: sdio@3f1a0000 { |
15e22ddf | 134 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 135 | reg = <0x3f1a0000 0x10000>; |
9c0dae04 | 136 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
92f5d827 | 137 | clocks = <&sdio3_clk>; |
2dbfe748 CD |
138 | status = "disabled"; |
139 | }; | |
140 | ||
d7358f84 | 141 | sdio4: sdio@3f1b0000 { |
15e22ddf | 142 | compatible = "brcm,kona-sdhci"; |
2dbfe748 | 143 | reg = <0x3f1b0000 0x10000>; |
9c0dae04 | 144 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
92f5d827 | 145 | clocks = <&sdio4_clk>; |
2dbfe748 CD |
146 | status = "disabled"; |
147 | }; | |
148 | ||
67a57be8 SY |
149 | pinctrl@35004800 { |
150 | compatible = "brcm,capri-pinctrl"; | |
151 | reg = <0x35004800 0x430>; | |
152 | }; | |
f8a504c4 | 153 | |
dfc4334b TK |
154 | i2c@3e016000 { |
155 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
156 | reg = <0x3e016000 0x80>; | |
157 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | |
158 | #address-cells = <1>; | |
159 | #size-cells = <0>; | |
160 | clocks = <&bsc1_clk>; | |
161 | status = "disabled"; | |
162 | }; | |
163 | ||
164 | i2c@3e017000 { | |
165 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
166 | reg = <0x3e017000 0x80>; | |
167 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
168 | #address-cells = <1>; | |
169 | #size-cells = <0>; | |
170 | clocks = <&bsc2_clk>; | |
171 | status = "disabled"; | |
172 | }; | |
173 | ||
174 | i2c@3e018000 { | |
175 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
176 | reg = <0x3e018000 0x80>; | |
177 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | |
178 | #address-cells = <1>; | |
179 | #size-cells = <0>; | |
180 | clocks = <&bsc3_clk>; | |
181 | status = "disabled"; | |
182 | }; | |
183 | ||
184 | i2c@3500d000 { | |
185 | compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c"; | |
186 | reg = <0x3500d000 0x80>; | |
187 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
188 | #address-cells = <1>; | |
189 | #size-cells = <0>; | |
190 | clocks = <&pmu_bsc_clk>; | |
191 | status = "disabled"; | |
192 | }; | |
193 | ||
0bd898b8 TK |
194 | clocks { |
195 | bsc1_clk: bsc1 { | |
196 | compatible = "fixed-clock"; | |
197 | clock-frequency = <13000000>; | |
198 | #clock-cells = <0>; | |
199 | }; | |
200 | ||
201 | bsc2_clk: bsc2 { | |
202 | compatible = "fixed-clock"; | |
203 | clock-frequency = <13000000>; | |
204 | #clock-cells = <0>; | |
205 | }; | |
206 | ||
207 | bsc3_clk: bsc3 { | |
208 | compatible = "fixed-clock"; | |
209 | clock-frequency = <13000000>; | |
210 | #clock-cells = <0>; | |
211 | }; | |
212 | ||
213 | pmu_bsc_clk: pmu_bsc { | |
214 | compatible = "fixed-clock"; | |
215 | clock-frequency = <13000000>; | |
216 | #clock-cells = <0>; | |
217 | }; | |
218 | ||
219 | hub_timer_clk: hub_timer { | |
220 | compatible = "fixed-clock"; | |
221 | clock-frequency = <32768>; | |
222 | #clock-cells = <0>; | |
223 | }; | |
224 | ||
225 | pwm_clk: pwm { | |
226 | compatible = "fixed-clock"; | |
227 | clock-frequency = <26000000>; | |
228 | #clock-cells = <0>; | |
229 | }; | |
230 | ||
231 | sdio1_clk: sdio1 { | |
232 | compatible = "fixed-clock"; | |
233 | clock-frequency = <48000000>; | |
234 | #clock-cells = <0>; | |
235 | }; | |
236 | ||
237 | sdio2_clk: sdio2 { | |
238 | compatible = "fixed-clock"; | |
239 | clock-frequency = <48000000>; | |
240 | #clock-cells = <0>; | |
241 | }; | |
242 | ||
243 | sdio3_clk: sdio3 { | |
244 | compatible = "fixed-clock"; | |
245 | clock-frequency = <48000000>; | |
246 | #clock-cells = <0>; | |
247 | }; | |
248 | ||
249 | sdio4_clk: sdio4 { | |
250 | compatible = "fixed-clock"; | |
251 | clock-frequency = <48000000>; | |
252 | #clock-cells = <0>; | |
253 | }; | |
254 | ||
255 | tmon_1m_clk: tmon_1m { | |
256 | compatible = "fixed-clock"; | |
257 | clock-frequency = <1000000>; | |
258 | #clock-cells = <0>; | |
259 | }; | |
260 | ||
261 | uartb_clk: uartb { | |
262 | compatible = "fixed-clock"; | |
263 | clock-frequency = <13000000>; | |
264 | #clock-cells = <0>; | |
265 | }; | |
266 | ||
267 | uartb2_clk: uartb2 { | |
268 | compatible = "fixed-clock"; | |
269 | clock-frequency = <13000000>; | |
270 | #clock-cells = <0>; | |
271 | }; | |
272 | ||
273 | uartb3_clk: uartb3 { | |
274 | compatible = "fixed-clock"; | |
275 | clock-frequency = <13000000>; | |
276 | #clock-cells = <0>; | |
277 | }; | |
278 | ||
279 | uartb4_clk: uartb4 { | |
280 | compatible = "fixed-clock"; | |
281 | clock-frequency = <13000000>; | |
282 | #clock-cells = <0>; | |
283 | }; | |
284 | ||
285 | usb_otg_ahb_clk: usb_otg_ahb { | |
286 | compatible = "fixed-clock"; | |
287 | clock-frequency = <52000000>; | |
288 | #clock-cells = <0>; | |
289 | }; | |
290 | }; | |
d97f7997 MP |
291 | |
292 | usbotg: usb@3f120000 { | |
293 | compatible = "snps,dwc2"; | |
294 | reg = <0x3f120000 0x10000>; | |
295 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; | |
296 | clocks = <&usb_otg_ahb_clk>; | |
297 | clock-names = "otg"; | |
298 | phys = <&usbphy>; | |
299 | phy-names = "usb2-phy"; | |
300 | status = "disabled"; | |
301 | }; | |
302 | ||
303 | usbphy: usb-phy@3f130000 { | |
304 | compatible = "brcm,kona-usb2-phy"; | |
305 | reg = <0x3f130000 0x28>; | |
306 | #phy-cells = <0>; | |
307 | status = "disabled"; | |
308 | }; | |
8ac49e04 | 309 | }; |