ARM: dts: bcm281xx: Add card detect GPIO
[deliverable/linux.git] / arch / arm / boot / dts / bcm11351.dtsi
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8ac49e04 1/*
e3b62ffd 2 * Copyright (C) 2012-2013 Broadcom Corporation
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3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
5401cc43
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14#include <dt-bindings/interrupt-controller/arm-gic.h>
15#include <dt-bindings/interrupt-controller/irq.h>
16
74375653 17#include "skeleton.dtsi"
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18
19/ {
20 model = "BCM11351 SoC";
15e22ddf 21 compatible = "brcm,bcm11351";
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22 interrupt-parent = <&gic>;
23
24 chosen {
25 bootargs = "console=ttyS0,115200n8";
26 };
27
28 gic: interrupt-controller@3ff00100 {
29 compatible = "arm,cortex-a9-gic";
30 #interrupt-cells = <3>;
31 #address-cells = <0>;
32 interrupt-controller;
33 reg = <0x3ff01000 0x1000>,
34 <0x3ff00100 0x100>;
35 };
36
7f6c62e2 37 smc@0x3404c000 {
15e22ddf 38 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
d22dc5ed 39 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
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40 };
41
8ac49e04 42 uart@3e000000 {
15e22ddf 43 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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44 status = "disabled";
45 reg = <0x3e000000 0x1000>;
46 clock-frequency = <13000000>;
5401cc43 47 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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48 reg-shift = <2>;
49 reg-io-width = <4>;
50 };
51
52 L2: l2-cache {
15e22ddf 53 compatible = "brcm,bcm11351-a2-pl310-cache";
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54 reg = <0x3ff20000 0x1000>;
55 cache-unified;
56 cache-level = <2>;
8ac49e04 57 };
5f03dc20 58
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59 watchdog@35002f40 {
60 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
61 reg = <0x35002f40 0x6c>;
62 };
63
5f03dc20 64 timer@35006000 {
15e22ddf 65 compatible = "brcm,kona-timer";
5f03dc20 66 reg = <0x35006000 0x1000>;
5401cc43 67 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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68 clock-frequency = <32768>;
69 };
70
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71 gpio: gpio@35003000 {
72 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
73 reg = <0x35003000 0x800>;
74 interrupts =
75 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
76 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
77 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
78 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
79 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
80 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
81 #gpio-cells = <2>;
82 #interrupt-cells = <2>;
83 gpio-controller;
84 interrupt-controller;
85 };
86
d7358f84 87 sdio1: sdio@3f180000 {
15e22ddf 88 compatible = "brcm,kona-sdhci";
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89 reg = <0x3f180000 0x10000>;
90 interrupts = <0x0 77 0x4>;
91 status = "disabled";
92 };
93
d7358f84 94 sdio2: sdio@3f190000 {
15e22ddf 95 compatible = "brcm,kona-sdhci";
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96 reg = <0x3f190000 0x10000>;
97 interrupts = <0x0 76 0x4>;
98 status = "disabled";
99 };
100
d7358f84 101 sdio3: sdio@3f1a0000 {
15e22ddf 102 compatible = "brcm,kona-sdhci";
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103 reg = <0x3f1a0000 0x10000>;
104 interrupts = <0x0 74 0x4>;
105 status = "disabled";
106 };
107
d7358f84 108 sdio4: sdio@3f1b0000 {
15e22ddf 109 compatible = "brcm,kona-sdhci";
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110 reg = <0x3f1b0000 0x10000>;
111 interrupts = <0x0 73 0x4>;
112 status = "disabled";
113 };
114
8ac49e04 115};
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