[deliverable/linux.git] / arch / arm / boot / dts / bcm11351.dtsi

/*
 * Copyright (C) 2012-2013 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "dt-bindings/clock/bcm281xx.h"

#include "skeleton.dtsi"

/ {
	model = "BCM11351 SoC";
	compatible = "brcm,bcm11351";
	interrupt-parent = <&gic>;

	chosen {
		bootargs = "console=ttyS0,115200n8";
	};

	gic: interrupt-controller@3ff00100 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0x3ff01000 0x1000>,
		      <0x3ff00100 0x100>;
	};

	smc@0x3404c000 {
		compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
		reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
	};

	uart@3e000000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e000000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e001000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e001000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e002000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e003000 {
		compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e003000 0x1000>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	L2: l2-cache {
		compatible = "brcm,bcm11351-a2-pl310-cache";
		reg = <0x3ff20000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	watchdog@35002f40 {
		compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
		reg = <0x35002f40 0x6c>;
	};

	timer@35006000 {
		compatible = "brcm,kona-timer";
		reg = <0x35006000 0x1000>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
	};

	gpio: gpio@35003000 {
		compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
		reg = <0x35003000 0x800>;
		interrupts =
		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		gpio-controller;
		interrupt-controller;
	};

	sdio1: sdio@3f180000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f180000 0x10000>;
		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
		status = "disabled";
	};

	sdio2: sdio@3f190000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f190000 0x10000>;
		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
		status = "disabled";
	};

	sdio3: sdio@3f1a0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1a0000 0x10000>;
		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
		status = "disabled";
	};

	sdio4: sdio@3f1b0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1b0000 0x10000>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
		status = "disabled";
	};

	pinctrl@35004800 {
		compatible = "brcm,bcm11351-pinctrl";
		reg = <0x35004800 0x430>;
	};

	i2c@3e016000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3e016000 0x80>;
		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
		status = "disabled";
	};

	i2c@3e017000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3e017000 0x80>;
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
		status = "disabled";
	};

	i2c@3e018000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3e018000 0x80>;
		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
		status = "disabled";
	};

	i2c@3500d000 {
		compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
		reg = <0x3500d000 0x80>;
		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
		status = "disabled";
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		root_ccu: root_ccu {
			compatible = "brcm,bcm11351-root-ccu";
			reg = <0x35001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "frac_1m";
		};

		hub_ccu: hub_ccu {
			compatible = "brcm,bcm11351-hub-ccu";
			reg = <0x34000000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "tmon_1m";
		};

		aon_ccu: aon_ccu {
			compatible = "brcm,bcm11351-aon-ccu";
			reg = <0x35002000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "hub_timer",
					     "pmu_bsc",
					     "pmu_bsc_var";
		};

		master_ccu: master_ccu {
			compatible = "brcm,bcm11351-master-ccu";
			reg = <0x3f001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "sdio1",
					     "sdio2",
					     "sdio3",
					     "sdio4",
					     "usb_ic",
					     "hsic2_48m",
					     "hsic2_12m";
		};

		slave_ccu: slave_ccu {
			compatible = "brcm,bcm11351-slave-ccu";
			reg = <0x3e011000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "uartb",
					     "uartb2",
					     "uartb3",
					     "uartb4",
					     "ssp0",
					     "ssp2",
					     "bsc1",
					     "bsc2",
					     "bsc3",
					     "pwm";
		};

		ref_1m_clk: ref_1m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <1000000>;
		};

		ref_32k_clk: ref_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		bbl_32k_clk: bbl_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		ref_13m_clk: ref_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		var_13m_clk: var_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		dft_19_5m_clk: dft_19_5m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <19500000>;
		};

		ref_crystal_clk: ref_crystal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
		};

		ref_cx40_clk: ref_cx40 {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <40000000>;
		};

		ref_52m_clk: ref_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		var_52m_clk: var_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		usb_otg_ahb_clk: usb_otg_ahb {
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
			#clock-cells = <0>;
		};

		ref_96m_clk: ref_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		var_96m_clk: var_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		ref_104m_clk: ref_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		var_104m_clk: var_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		ref_156m_clk: ref_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		var_156m_clk: var_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		ref_208m_clk: ref_208m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <208000000>;
		};

		var_208m_clk: var_208m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <208000000>;
		};

		ref_312m_clk: ref_312m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <312000000>;
		};

		var_312m_clk: var_312m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <312000000>;
		};
	};

	usbotg: usb@3f120000 {
		compatible = "snps,dwc2";
		reg = <0x3f120000 0x10000>;
		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&usb_otg_ahb_clk>;
		clock-names = "otg";
		phys = <&usbphy>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	usbphy: usb-phy@3f130000 {
		compatible = "brcm,kona-usb2-phy";
		reg = <0x3f130000 0x28>;
		#phy-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
8ac49e04	1	/*
e3b62ffd	2	* Copyright (C) 2012-2013 Broadcom Corporation
8ac49e04 CD	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation version 2.
	7	*
	8	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	9	* kind, whether express or implied; without even the implied warranty
	10	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
5401cc43 MP	14	#include <dt-bindings/interrupt-controller/arm-gic.h>
	15	#include <dt-bindings/interrupt-controller/irq.h>
	16
2bb9453b AE	17	#include "dt-bindings/clock/bcm281xx.h"
2bb9453b AE	18
74375653	19	#include "skeleton.dtsi"
8ac49e04 CD	20
	21	/ {
	22	model = "BCM11351 SoC";
15e22ddf	23	compatible = "brcm,bcm11351";
8ac49e04 CD	24	interrupt-parent = <&gic>;
	25
	26	chosen {
	27	bootargs = "console=ttyS0,115200n8";
	28	};
	29
	30	gic: interrupt-controller@3ff00100 {
	31	compatible = "arm,cortex-a9-gic";
	32	#interrupt-cells = <3>;
	33	#address-cells = <0>;
	34	interrupt-controller;
	35	reg = <0x3ff01000 0x1000>,
	36	<0x3ff00100 0x100>;
	37	};
	38
7f6c62e2	39	smc@0x3404c000 {
15e22ddf	40	compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
d22dc5ed	41	reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
7f6c62e2 CD	42	};
7f6c62e2 CD	43
8ac49e04	44	uart@3e000000 {
15e22ddf	45	compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
8ac49e04 CD	46	status = "disabled";
8ac49e04 CD	47	reg = <0x3e000000 0x1000>;
2bb9453b	48	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
5401cc43	49	interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
8ac49e04 CD	50	reg-shift = <2>;
	51	reg-io-width = <4>;
	52	};
	53
84491c0f TK	54	uart@3e001000 {
	55	compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
	56	status = "disabled";
	57	reg = <0x3e001000 0x1000>;
2bb9453b	58	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
84491c0f TK	59	interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
	60	reg-shift = <2>;
	61	reg-io-width = <4>;
	62	};
	63
	64	uart@3e002000 {
	65	compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
	66	status = "disabled";
	67	reg = <0x3e002000 0x1000>;
2bb9453b	68	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
84491c0f TK	69	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
	70	reg-shift = <2>;
	71	reg-io-width = <4>;
	72	};
	73
	74	uart@3e003000 {
	75	compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
	76	status = "disabled";
	77	reg = <0x3e003000 0x1000>;
2bb9453b	78	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
84491c0f TK	79	interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
	80	reg-shift = <2>;
	81	reg-io-width = <4>;
	82	};
	83
8ac49e04	84	L2: l2-cache {
15e22ddf	85	compatible = "brcm,bcm11351-a2-pl310-cache";
3b656fed CD	86	reg = <0x3ff20000 0x1000>;
	87	cache-unified;
	88	cache-level = <2>;
8ac49e04	89	};
5f03dc20	90
e3b62ffd MM	91	watchdog@35002f40 {
	92	compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
	93	reg = <0x35002f40 0x6c>;
	94	};
	95
5f03dc20	96	timer@35006000 {
15e22ddf	97	compatible = "brcm,kona-timer";
5f03dc20	98	reg = <0x35006000 0x1000>;
5401cc43	99	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
2bb9453b	100	clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
5f03dc20 CD	101	};
5f03dc20 CD	102
d394c7bb MM	103	gpio: gpio@35003000 {
	104	compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
	105	reg = <0x35003000 0x800>;
	106	interrupts =
	107	<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
	108	GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
	109	GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
	110	GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
	111	GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
	112	GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
	113	#gpio-cells = <2>;
	114	#interrupt-cells = <2>;
	115	gpio-controller;
	116	interrupt-controller;
	117	};
	118
d7358f84	119	sdio1: sdio@3f180000 {
15e22ddf	120	compatible = "brcm,kona-sdhci";
2dbfe748	121	reg = <0x3f180000 0x10000>;
9c0dae04	122	interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
2bb9453b	123	clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
2dbfe748 CD	124	status = "disabled";
	125	};
	126
d7358f84	127	sdio2: sdio@3f190000 {
15e22ddf	128	compatible = "brcm,kona-sdhci";
2dbfe748	129	reg = <0x3f190000 0x10000>;
9c0dae04	130	interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
2bb9453b	131	clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
2dbfe748 CD	132	status = "disabled";
	133	};
	134
d7358f84	135	sdio3: sdio@3f1a0000 {
15e22ddf	136	compatible = "brcm,kona-sdhci";
2dbfe748	137	reg = <0x3f1a0000 0x10000>;
9c0dae04	138	interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
2bb9453b	139	clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
2dbfe748 CD	140	status = "disabled";
	141	};
	142
d7358f84	143	sdio4: sdio@3f1b0000 {
15e22ddf	144	compatible = "brcm,kona-sdhci";
2dbfe748	145	reg = <0x3f1b0000 0x10000>;
9c0dae04	146	interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
2bb9453b	147	clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
2dbfe748 CD	148	status = "disabled";
	149	};
	150
67a57be8	151	pinctrl@35004800 {
a2530060	152	compatible = "brcm,bcm11351-pinctrl";
67a57be8 SY	153	reg = <0x35004800 0x430>;
67a57be8 SY	154	};
f8a504c4	155
dfc4334b TK	156	i2c@3e016000 {
	157	compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
	158	reg = <0x3e016000 0x80>;
	159	interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
	160	#address-cells = <1>;
	161	#size-cells = <0>;
2bb9453b	162	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
dfc4334b TK	163	status = "disabled";
	164	};
	165
	166	i2c@3e017000 {
	167	compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
	168	reg = <0x3e017000 0x80>;
	169	interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
	170	#address-cells = <1>;
	171	#size-cells = <0>;
2bb9453b	172	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
dfc4334b TK	173	status = "disabled";
	174	};
	175
	176	i2c@3e018000 {
	177	compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
	178	reg = <0x3e018000 0x80>;
	179	interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
	180	#address-cells = <1>;
	181	#size-cells = <0>;
2bb9453b	182	clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
dfc4334b TK	183	status = "disabled";
	184	};
	185
	186	i2c@3500d000 {
	187	compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
	188	reg = <0x3500d000 0x80>;
	189	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
	190	#address-cells = <1>;
	191	#size-cells = <0>;
2bb9453b	192	clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
dfc4334b TK	193	status = "disabled";
	194	};
	195
0bd898b8	196	clocks {
2bb9453b AE	197	#address-cells = <1>;
	198	#size-cells = <1>;
	199	ranges;
	200
	201	root_ccu: root_ccu {
	202	compatible = "brcm,bcm11351-root-ccu";
	203	reg = <0x35001000 0x0f00>;
	204	#clock-cells = <1>;
	205	clock-output-names = "frac_1m";
	206	};
	207
	208	hub_ccu: hub_ccu {
	209	compatible = "brcm,bcm11351-hub-ccu";
	210	reg = <0x34000000 0x0f00>;
	211	#clock-cells = <1>;
	212	clock-output-names = "tmon_1m";
	213	};
	214
	215	aon_ccu: aon_ccu {
	216	compatible = "brcm,bcm11351-aon-ccu";
	217	reg = <0x35002000 0x0f00>;
	218	#clock-cells = <1>;
	219	clock-output-names = "hub_timer",
	220	"pmu_bsc",
	221	"pmu_bsc_var";
	222	};
	223
	224	master_ccu: master_ccu {
	225	compatible = "brcm,bcm11351-master-ccu";
	226	reg = <0x3f001000 0x0f00>;
	227	#clock-cells = <1>;
	228	clock-output-names = "sdio1",
	229	"sdio2",
	230	"sdio3",
	231	"sdio4",
	232	"usb_ic",
	233	"hsic2_48m",
	234	"hsic2_12m";
	235	};
	236
	237	slave_ccu: slave_ccu {
	238	compatible = "brcm,bcm11351-slave-ccu";
	239	reg = <0x3e011000 0x0f00>;
	240	#clock-cells = <1>;
	241	clock-output-names = "uartb",
	242	"uartb2",
	243	"uartb3",
	244	"uartb4",
	245	"ssp0",
	246	"ssp2",
	247	"bsc1",
	248	"bsc2",
	249	"bsc3",
	250	"pwm";
	251	};
	252
	253	ref_1m_clk: ref_1m {
0bd898b8	254	#clock-cells = <0>;
2bb9453b AE	255	compatible = "fixed-clock";
2bb9453b AE	256	clock-frequency = <1000000>;
0bd898b8 TK	257	};
0bd898b8 TK	258
2bb9453b AE	259	ref_32k_clk: ref_32k {
2bb9453b AE	260	#clock-cells = <0>;
0bd898b8	261	compatible = "fixed-clock";
2bb9453b AE	262	clock-frequency = <32768>;
	263	};
	264
	265	bbl_32k_clk: bbl_32k {
0bd898b8	266	#clock-cells = <0>;
2bb9453b AE	267	compatible = "fixed-clock";
2bb9453b AE	268	clock-frequency = <32768>;
0bd898b8 TK	269	};
0bd898b8 TK	270
2bb9453b AE	271	ref_13m_clk: ref_13m {
2bb9453b AE	272	#clock-cells = <0>;
0bd898b8 TK	273	compatible = "fixed-clock";
0bd898b8 TK	274	clock-frequency = <13000000>;
0bd898b8 TK	275	};
0bd898b8 TK	276
2bb9453b AE	277	var_13m_clk: var_13m {
2bb9453b AE	278	#clock-cells = <0>;
0bd898b8 TK	279	compatible = "fixed-clock";
0bd898b8 TK	280	clock-frequency = <13000000>;
0bd898b8 TK	281	};
0bd898b8 TK	282
2bb9453b	283	dft_19_5m_clk: dft_19_5m {
0bd898b8	284	#clock-cells = <0>;
2bb9453b AE	285	compatible = "fixed-clock";
2bb9453b AE	286	clock-frequency = <19500000>;
0bd898b8 TK	287	};
0bd898b8 TK	288
2bb9453b AE	289	ref_crystal_clk: ref_crystal {
2bb9453b AE	290	#clock-cells = <0>;
0bd898b8 TK	291	compatible = "fixed-clock";
0bd898b8 TK	292	clock-frequency = <26000000>;
0bd898b8 TK	293	};
0bd898b8 TK	294
2bb9453b	295	ref_cx40_clk: ref_cx40 {
0bd898b8	296	#clock-cells = <0>;
2bb9453b AE	297	compatible = "fixed-clock";
2bb9453b AE	298	clock-frequency = <40000000>;
0bd898b8 TK	299	};
0bd898b8 TK	300
2bb9453b	301	ref_52m_clk: ref_52m {
0bd898b8	302	#clock-cells = <0>;
2bb9453b AE	303	compatible = "fixed-clock";
2bb9453b AE	304	clock-frequency = <52000000>;
0bd898b8 TK	305	};
0bd898b8 TK	306
2bb9453b	307	var_52m_clk: var_52m {
0bd898b8	308	#clock-cells = <0>;
2bb9453b AE	309	compatible = "fixed-clock";
2bb9453b AE	310	clock-frequency = <52000000>;
0bd898b8 TK	311	};
0bd898b8 TK	312
2bb9453b	313	usb_otg_ahb_clk: usb_otg_ahb {
0bd898b8	314	compatible = "fixed-clock";
2bb9453b	315	clock-frequency = <52000000>;
0bd898b8 TK	316	#clock-cells = <0>;
	317	};
	318
2bb9453b	319	ref_96m_clk: ref_96m {
0bd898b8	320	#clock-cells = <0>;
2bb9453b AE	321	compatible = "fixed-clock";
2bb9453b AE	322	clock-frequency = <96000000>;
0bd898b8 TK	323	};
0bd898b8 TK	324
2bb9453b	325	var_96m_clk: var_96m {
0bd898b8	326	#clock-cells = <0>;
2bb9453b AE	327	compatible = "fixed-clock";
2bb9453b AE	328	clock-frequency = <96000000>;
0bd898b8 TK	329	};
0bd898b8 TK	330
2bb9453b AE	331	ref_104m_clk: ref_104m {
2bb9453b AE	332	#clock-cells = <0>;
0bd898b8	333	compatible = "fixed-clock";
2bb9453b AE	334	clock-frequency = <104000000>;
	335	};
	336
	337	var_104m_clk: var_104m {
0bd898b8	338	#clock-cells = <0>;
2bb9453b AE	339	compatible = "fixed-clock";
2bb9453b AE	340	clock-frequency = <104000000>;
0bd898b8 TK	341	};
0bd898b8 TK	342
2bb9453b AE	343	ref_156m_clk: ref_156m {
2bb9453b AE	344	#clock-cells = <0>;
0bd898b8	345	compatible = "fixed-clock";
2bb9453b AE	346	clock-frequency = <156000000>;
	347	};
	348
	349	var_156m_clk: var_156m {
0bd898b8	350	#clock-cells = <0>;
2bb9453b AE	351	compatible = "fixed-clock";
2bb9453b AE	352	clock-frequency = <156000000>;
0bd898b8 TK	353	};
0bd898b8 TK	354
2bb9453b AE	355	ref_208m_clk: ref_208m {
2bb9453b AE	356	#clock-cells = <0>;
0bd898b8	357	compatible = "fixed-clock";
2bb9453b AE	358	clock-frequency = <208000000>;
	359	};
	360
	361	var_208m_clk: var_208m {
0bd898b8	362	#clock-cells = <0>;
2bb9453b AE	363	compatible = "fixed-clock";
2bb9453b AE	364	clock-frequency = <208000000>;
0bd898b8 TK	365	};
0bd898b8 TK	366
2bb9453b AE	367	ref_312m_clk: ref_312m {
2bb9453b AE	368	#clock-cells = <0>;
0bd898b8	369	compatible = "fixed-clock";
2bb9453b AE	370	clock-frequency = <312000000>;
	371	};
	372
	373	var_312m_clk: var_312m {
0bd898b8	374	#clock-cells = <0>;
2bb9453b AE	375	compatible = "fixed-clock";
2bb9453b AE	376	clock-frequency = <312000000>;
0bd898b8 TK	377	};
0bd898b8 TK	378	};
d97f7997 MP	379
	380	usbotg: usb@3f120000 {
	381	compatible = "snps,dwc2";
	382	reg = <0x3f120000 0x10000>;
	383	interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
	384	clocks = <&usb_otg_ahb_clk>;
	385	clock-names = "otg";
	386	phys = <&usbphy>;
	387	phy-names = "usb2-phy";
	388	status = "disabled";
	389	};
	390
	391	usbphy: usb-phy@3f130000 {
	392	compatible = "brcm,kona-usb2-phy";
	393	reg = <0x3f130000 0x28>;
	394	#phy-cells = <0>;
	395	status = "disabled";
	396	};
8ac49e04	397	};