[deliverable/linux.git] / arch / arm / boot / dts / bcm21664.dtsi

/*
 * Copyright (C) 2014 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "dt-bindings/clock/bcm21664.h"

#include "skeleton.dtsi"

/ {
	model = "BCM21664 SoC";
	compatible = "brcm,bcm21664";
	interrupt-parent = <&gic>;

	chosen {
		bootargs = "console=ttyS0,115200n8";
	};

       cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "brcm,bcm11351-cpu-method";
		secondary-boot-reg = <0x35004178>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	gic: interrupt-controller@3ff00100 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		reg = <0x3ff01000 0x1000>,
		      <0x3ff00100 0x100>;
	};

	smc@0x3404e000 {
		compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
		reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
	};

	uart@3e000000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e000000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e001000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e001000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
		interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	uart@3e002000 {
		compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
		status = "disabled";
		reg = <0x3e002000 0x118>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		reg-shift = <2>;
		reg-io-width = <4>;
	};

	L2: l2-cache {
		compatible = "arm,pl310-cache";
		reg = <0x3ff20000 0x1000>;
		cache-unified;
		cache-level = <2>;
	};

	brcm,resetmgr@35001f00 {
		compatible = "brcm,bcm21664-resetmgr";
		reg = <0x35001f00 0x24>;
	};

	timer@35006000 {
		compatible = "brcm,kona-timer";
		reg = <0x35006000 0x1c>;
		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
	};

	gpio: gpio@35003000 {
		compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
		reg = <0x35003000 0x524>;
		interrupts =
		       <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
			GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		gpio-controller;
		interrupt-controller;
	};

	sdio1: sdio@3f180000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f180000 0x801c>;
		interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
		status = "disabled";
	};

	sdio2: sdio@3f190000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f190000 0x801c>;
		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
		status = "disabled";
	};

	sdio3: sdio@3f1a0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1a0000 0x801c>;
		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
		status = "disabled";
	};

	sdio4: sdio@3f1b0000 {
		compatible = "brcm,kona-sdhci";
		reg = <0x3f1b0000 0x801c>;
		interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
		status = "disabled";
	};

	i2c@3e016000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e016000 0x70>;
		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
		status = "disabled";
	};

	i2c@3e017000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e017000 0x70>;
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
		status = "disabled";
	};

	i2c@3e018000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e018000 0x70>;
		interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
		status = "disabled";
	};

	i2c@3e01c000 {
		compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
		reg = <0x3e01c000 0x70>;
		interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
		status = "disabled";
	};

	clocks {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/*
		 * Fixed clocks are defined before CCUs whose
		 * clocks may depend on them.
		 */

		ref_32k_clk: ref_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		bbl_32k_clk: bbl_32k {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <32768>;
		};

		ref_13m_clk: ref_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		var_13m_clk: var_13m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <13000000>;
		};

		dft_19_5m_clk: dft_19_5m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <19500000>;
		};

		ref_crystal_clk: ref_crystal {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
		};

		ref_52m_clk: ref_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		var_52m_clk: var_52m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		usb_otg_ahb_clk: usb_otg_ahb {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <52000000>;
		};

		ref_96m_clk: ref_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		var_96m_clk: var_96m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <96000000>;
		};

		ref_104m_clk: ref_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		var_104m_clk: var_104m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <104000000>;
		};

		ref_156m_clk: ref_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		var_156m_clk: var_156m {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <156000000>;
		};

		root_ccu: root_ccu {
			compatible = BCM21664_DT_ROOT_CCU_COMPAT;
			reg = <0x35001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "frac_1m";
		};

		aon_ccu: aon_ccu {
			compatible = BCM21664_DT_AON_CCU_COMPAT;
			reg = <0x35002000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "hub_timer";
		};

		master_ccu: master_ccu {
			compatible = BCM21664_DT_MASTER_CCU_COMPAT;
			reg = <0x3f001000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "sdio1",
					     "sdio2",
					     "sdio3",
					     "sdio4",
					     "sdio1_sleep",
					     "sdio2_sleep",
					     "sdio3_sleep",
					     "sdio4_sleep";
		};

		slave_ccu: slave_ccu {
			compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
			reg = <0x3e011000 0x0f00>;
			#clock-cells = <1>;
			clock-output-names = "uartb",
					     "uartb2",
					     "uartb3",
					     "bsc1",
					     "bsc2",
					     "bsc3",
					     "bsc4";
		};
	};

	usbotg: usb@3f120000 {
		compatible = "snps,dwc2";
		reg = <0x3f120000 0x10000>;
		interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&usb_otg_ahb_clk>;
		clock-names = "otg";
		phys = <&usbphy>;
		phy-names = "usb2-phy";
		status = "disabled";
	};

	usbphy: usb-phy@3f130000 {
		compatible = "brcm,kona-usb2-phy";
		reg = <0x3f130000 0x28>;
		#phy-cells = <0>;
		status = "disabled";
	};
};
Commit	Line	Data
2eba905e MM	1	/*
	2	* Copyright (C) 2014 Broadcom Corporation
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation version 2.
	7	*
	8	* This program is distributed "as is" WITHOUT ANY WARRANTY of any
	9	* kind, whether express or implied; without even the implied warranty
	10	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	11	* GNU General Public License for more details.
	12	*/
	13
	14	#include <dt-bindings/interrupt-controller/arm-gic.h>
	15	#include <dt-bindings/interrupt-controller/irq.h>
	16
8d90c5af AE	17	#include "dt-bindings/clock/bcm21664.h"
8d90c5af AE	18
2eba905e MM	19	#include "skeleton.dtsi"
	20
	21	/ {
	22	model = "BCM21664 SoC";
	23	compatible = "brcm,bcm21664";
	24	interrupt-parent = <&gic>;
	25
	26	chosen {
	27	bootargs = "console=ttyS0,115200n8";
	28	};
	29
1d3138b7 AE	30	cpus {
	31	#address-cells = <1>;
	32	#size-cells = <0>;
	33	enable-method = "brcm,bcm11351-cpu-method";
	34	secondary-boot-reg = <0x35004178>;
	35
	36	cpu0: cpu@0 {
	37	device_type = "cpu";
	38	compatible = "arm,cortex-a9";
	39	reg = <0>;
	40	};
	41
	42	cpu1: cpu@1 {
	43	device_type = "cpu";
	44	compatible = "arm,cortex-a9";
	45	reg = <1>;
	46	};
	47	};
	48
2eba905e MM	49	gic: interrupt-controller@3ff00100 {
	50	compatible = "arm,cortex-a9-gic";
	51	#interrupt-cells = <3>;
	52	#address-cells = <0>;
	53	interrupt-controller;
	54	reg = <0x3ff01000 0x1000>,
	55	<0x3ff00100 0x100>;
	56	};
	57
	58	smc@0x3404e000 {
	59	compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
	60	reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
	61	};
	62
	63	uart@3e000000 {
	64	compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
	65	status = "disabled";
	66	reg = <0x3e000000 0x118>;
8d90c5af	67	clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
2eba905e MM	68	interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
	69	reg-shift = <2>;
	70	reg-io-width = <4>;
	71	};
	72
	73	uart@3e001000 {
	74	compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
	75	status = "disabled";
	76	reg = <0x3e001000 0x118>;
8d90c5af	77	clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
2eba905e MM	78	interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
	79	reg-shift = <2>;
	80	reg-io-width = <4>;
	81	};
	82
	83	uart@3e002000 {
	84	compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
	85	status = "disabled";
	86	reg = <0x3e002000 0x118>;
8d90c5af	87	clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
2eba905e MM	88	interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
	89	reg-shift = <2>;
	90	reg-io-width = <4>;
	91	};
	92
	93	L2: l2-cache {
	94	compatible = "arm,pl310-cache";
	95	reg = <0x3ff20000 0x1000>;
	96	cache-unified;
	97	cache-level = <2>;
	98	};
	99
	100	brcm,resetmgr@35001f00 {
	101	compatible = "brcm,bcm21664-resetmgr";
	102	reg = <0x35001f00 0x24>;
	103	};
	104
	105	timer@35006000 {
	106	compatible = "brcm,kona-timer";
	107	reg = <0x35006000 0x1c>;
	108	interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	109	clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
2eba905e MM	110	};
	111
	112	gpio: gpio@35003000 {
	113	compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
	114	reg = <0x35003000 0x524>;
	115	interrupts =
	116	<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
	117	GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
	118	GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
	119	GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
	120	#gpio-cells = <2>;
	121	#interrupt-cells = <2>;
	122	gpio-controller;
	123	interrupt-controller;
	124	};
	125
	126	sdio1: sdio@3f180000 {
	127	compatible = "brcm,kona-sdhci";
	128	reg = <0x3f180000 0x801c>;
	129	interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	130	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
2eba905e MM	131	status = "disabled";
	132	};
	133
	134	sdio2: sdio@3f190000 {
	135	compatible = "brcm,kona-sdhci";
	136	reg = <0x3f190000 0x801c>;
	137	interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	138	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
2eba905e MM	139	status = "disabled";
	140	};
	141
	142	sdio3: sdio@3f1a0000 {
	143	compatible = "brcm,kona-sdhci";
	144	reg = <0x3f1a0000 0x801c>;
	145	interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	146	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
2eba905e MM	147	status = "disabled";
	148	};
	149
	150	sdio4: sdio@3f1b0000 {
	151	compatible = "brcm,kona-sdhci";
	152	reg = <0x3f1b0000 0x801c>;
	153	interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
8d90c5af	154	clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
2eba905e MM	155	status = "disabled";
	156	};
	157
	158	i2c@3e016000 {
	159	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	160	reg = <0x3e016000 0x70>;
	161	interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
	162	#address-cells = <1>;
	163	#size-cells = <0>;
8d90c5af	164	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
2eba905e MM	165	status = "disabled";
	166	};
	167
	168	i2c@3e017000 {
	169	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	170	reg = <0x3e017000 0x70>;
	171	interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
	172	#address-cells = <1>;
	173	#size-cells = <0>;
8d90c5af	174	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
2eba905e MM	175	status = "disabled";
	176	};
	177
	178	i2c@3e018000 {
	179	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	180	reg = <0x3e018000 0x70>;
	181	interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
	182	#address-cells = <1>;
	183	#size-cells = <0>;
8d90c5af	184	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
2eba905e MM	185	status = "disabled";
	186	};
	187
	188	i2c@3e01c000 {
	189	compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
	190	reg = <0x3e01c000 0x70>;
	191	interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
	192	#address-cells = <1>;
	193	#size-cells = <0>;
8d90c5af	194	clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
2eba905e MM	195	status = "disabled";
	196	};
	197
	198	clocks {
8d90c5af AE	199	#address-cells = <1>;
	200	#size-cells = <1>;
	201	ranges;
2eba905e	202
8d90c5af AE	203	/*
	204	* Fixed clocks are defined before CCUs whose
	205	* clocks may depend on them.
	206	*/
	207
	208	ref_32k_clk: ref_32k {
2eba905e	209	#clock-cells = <0>;
8d90c5af AE	210	compatible = "fixed-clock";
8d90c5af AE	211	clock-frequency = <32768>;
2eba905e MM	212	};
2eba905e MM	213
8d90c5af	214	bbl_32k_clk: bbl_32k {
2eba905e	215	#clock-cells = <0>;
8d90c5af AE	216	compatible = "fixed-clock";
8d90c5af AE	217	clock-frequency = <32768>;
2eba905e MM	218	};
2eba905e MM	219
8d90c5af AE	220	ref_13m_clk: ref_13m {
8d90c5af AE	221	#clock-cells = <0>;
2eba905e MM	222	compatible = "fixed-clock";
2eba905e MM	223	clock-frequency = <13000000>;
2eba905e MM	224	};
2eba905e MM	225
8d90c5af AE	226	var_13m_clk: var_13m {
8d90c5af AE	227	#clock-cells = <0>;
2eba905e MM	228	compatible = "fixed-clock";
2eba905e MM	229	clock-frequency = <13000000>;
2eba905e MM	230	};
2eba905e MM	231
8d90c5af	232	dft_19_5m_clk: dft_19_5m {
2eba905e	233	#clock-cells = <0>;
8d90c5af AE	234	compatible = "fixed-clock";
8d90c5af AE	235	clock-frequency = <19500000>;
2eba905e MM	236	};
2eba905e MM	237
8d90c5af AE	238	ref_crystal_clk: ref_crystal {
8d90c5af AE	239	#clock-cells = <0>;
2eba905e MM	240	compatible = "fixed-clock";
2eba905e MM	241	clock-frequency = <26000000>;
2eba905e MM	242	};
2eba905e MM	243
8d90c5af	244	ref_52m_clk: ref_52m {
2eba905e	245	#clock-cells = <0>;
8d90c5af AE	246	compatible = "fixed-clock";
8d90c5af AE	247	clock-frequency = <52000000>;
2eba905e MM	248	};
2eba905e MM	249
8d90c5af	250	var_52m_clk: var_52m {
2eba905e	251	#clock-cells = <0>;
8d90c5af AE	252	compatible = "fixed-clock";
8d90c5af AE	253	clock-frequency = <52000000>;
2eba905e MM	254	};
2eba905e MM	255
8d90c5af	256	usb_otg_ahb_clk: usb_otg_ahb {
2eba905e	257	#clock-cells = <0>;
8d90c5af AE	258	compatible = "fixed-clock";
8d90c5af AE	259	clock-frequency = <52000000>;
2eba905e MM	260	};
2eba905e MM	261
8d90c5af	262	ref_96m_clk: ref_96m {
2eba905e	263	#clock-cells = <0>;
8d90c5af AE	264	compatible = "fixed-clock";
8d90c5af AE	265	clock-frequency = <96000000>;
2eba905e MM	266	};
2eba905e MM	267
8d90c5af	268	var_96m_clk: var_96m {
2eba905e	269	#clock-cells = <0>;
8d90c5af AE	270	compatible = "fixed-clock";
8d90c5af AE	271	clock-frequency = <96000000>;
2eba905e MM	272	};
2eba905e MM	273
8d90c5af	274	ref_104m_clk: ref_104m {
2eba905e	275	#clock-cells = <0>;
8d90c5af AE	276	compatible = "fixed-clock";
8d90c5af AE	277	clock-frequency = <104000000>;
2eba905e MM	278	};
2eba905e MM	279
8d90c5af	280	var_104m_clk: var_104m {
2eba905e	281	#clock-cells = <0>;
8d90c5af AE	282	compatible = "fixed-clock";
8d90c5af AE	283	clock-frequency = <104000000>;
2eba905e MM	284	};
2eba905e MM	285
8d90c5af	286	ref_156m_clk: ref_156m {
2eba905e	287	#clock-cells = <0>;
8d90c5af AE	288	compatible = "fixed-clock";
8d90c5af AE	289	clock-frequency = <156000000>;
2eba905e MM	290	};
2eba905e MM	291
8d90c5af	292	var_156m_clk: var_156m {
2eba905e	293	#clock-cells = <0>;
8d90c5af AE	294	compatible = "fixed-clock";
	295	clock-frequency = <156000000>;
	296	};
	297
	298	root_ccu: root_ccu {
	299	compatible = BCM21664_DT_ROOT_CCU_COMPAT;
	300	reg = <0x35001000 0x0f00>;
	301	#clock-cells = <1>;
	302	clock-output-names = "frac_1m";
	303	};
	304
	305	aon_ccu: aon_ccu {
	306	compatible = BCM21664_DT_AON_CCU_COMPAT;
	307	reg = <0x35002000 0x0f00>;
	308	#clock-cells = <1>;
	309	clock-output-names = "hub_timer";
	310	};
	311
	312	master_ccu: master_ccu {
	313	compatible = BCM21664_DT_MASTER_CCU_COMPAT;
	314	reg = <0x3f001000 0x0f00>;
	315	#clock-cells = <1>;
	316	clock-output-names = "sdio1",
	317	"sdio2",
	318	"sdio3",
	319	"sdio4",
	320	"sdio1_sleep",
	321	"sdio2_sleep",
	322	"sdio3_sleep",
	323	"sdio4_sleep";
	324	};
	325
	326	slave_ccu: slave_ccu {
	327	compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
	328	reg = <0x3e011000 0x0f00>;
	329	#clock-cells = <1>;
	330	clock-output-names = "uartb",
	331	"uartb2",
	332	"uartb3",
	333	"bsc1",
	334	"bsc2",
	335	"bsc3",
	336	"bsc4";
2eba905e MM	337	};
	338	};
	339
	340	usbotg: usb@3f120000 {
	341	compatible = "snps,dwc2";
	342	reg = <0x3f120000 0x10000>;
	343	interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
	344	clocks = <&usb_otg_ahb_clk>;
	345	clock-names = "otg";
	346	phys = <&usbphy>;
	347	phy-names = "usb2-phy";
	348	status = "disabled";
	349	};
	350
	351	usbphy: usb-phy@3f130000 {
	352	compatible = "brcm,kona-usb2-phy";
	353	reg = <0x3f130000 0x28>;
	354	#phy-cells = <0>;
	355	status = "disabled";
	356	};
	357	};