projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 2eba905e MM |
1 | /* |
| 2 | * Copyright (C) 2014 Broadcom Corporation | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or | |
| 5 | * modify it under the terms of the GNU General Public License as | |
| 6 | * published by the Free Software Foundation version 2. | |
| 7 | * | |
| 8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
| 9 | * kind, whether express or implied; without even the implied warranty | |
| 10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | * GNU General Public License for more details. | |
| 12 | */ | |
| 13 | ||
| 14 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 15 | #include <dt-bindings/interrupt-controller/irq.h> | |
| 16 | ||
| 17 | #include "skeleton.dtsi" | |
| 18 | ||
| 19 | / { | |
| 20 | model = "BCM21664 SoC"; | |
| 21 | compatible = "brcm,bcm21664"; | |
| 22 | interrupt-parent = <&gic>; | |
| 23 | ||
| 24 | chosen { | |
| 25 | bootargs = "console=ttyS0,115200n8"; | |
| 26 | }; | |
| 27 | ||
| 28 | gic: interrupt-controller@3ff00100 { | |
| 29 | compatible = "arm,cortex-a9-gic"; | |
| 30 | #interrupt-cells = <3>; | |
| 31 | #address-cells = <0>; | |
| 32 | interrupt-controller; | |
| 33 | reg = <0x3ff01000 0x1000>, | |
| 34 | <0x3ff00100 0x100>; | |
| 35 | }; | |
| 36 | ||
| 37 | smc@0x3404e000 { | |
| 38 | compatible = "brcm,bcm21664-smc", "brcm,kona-smc"; | |
| 39 | reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */ | |
| 40 | }; | |
| 41 | ||
| 42 | uart@3e000000 { | |
| 43 | compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart"; | |
| 44 | status = "disabled"; | |
| 45 | reg = <0x3e000000 0x118>; | |
| 46 | clocks = <&uartb_clk>; | |
| 47 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; | |
| 48 | reg-shift = <2>; | |
| 49 | reg-io-width = <4>; | |
| 50 | }; | |
| 51 | ||
| 52 | uart@3e001000 { | |
| 53 | compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart"; | |
| 54 | status = "disabled"; | |
| 55 | reg = <0x3e001000 0x118>; | |
| 56 | clocks = <&uartb2_clk>; | |
| 57 | interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; | |
| 58 | reg-shift = <2>; | |
| 59 | reg-io-width = <4>; | |
| 60 | }; | |
| 61 | ||
| 62 | uart@3e002000 { | |
| 63 | compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart"; | |
| 64 | status = "disabled"; | |
| 65 | reg = <0x3e002000 0x118>; | |
| 66 | clocks = <&uartb3_clk>; | |
| 67 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; | |
| 68 | reg-shift = <2>; | |
| 69 | reg-io-width = <4>; | |
| 70 | }; | |
| 71 | ||
| 72 | L2: l2-cache { | |
| 73 | compatible = "arm,pl310-cache"; | |
| 74 | reg = <0x3ff20000 0x1000>; | |
| 75 | cache-unified; | |
| 76 | cache-level = <2>; | |
| 77 | }; | |
| 78 | ||
| 79 | brcm,resetmgr@35001f00 { | |
| 80 | compatible = "brcm,bcm21664-resetmgr"; | |
| 81 | reg = <0x35001f00 0x24>; | |
| 82 | }; | |
| 83 | ||
| 84 | timer@35006000 { | |
| 85 | compatible = "brcm,kona-timer"; | |
| 86 | reg = <0x35006000 0x1c>; | |
| 87 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 88 | clocks = <&hub_timer_clk>; | |
| 89 | }; | |
| 90 | ||
| 91 | gpio: gpio@35003000 { | |
| 92 | compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio"; | |
| 93 | reg = <0x35003000 0x524>; | |
| 94 | interrupts = | |
| 95 | <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH | |
| 96 | GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH | |
| 97 | GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH | |
| 98 | GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; | |
| 99 | #gpio-cells = <2>; | |
| 100 | #interrupt-cells = <2>; | |
| 101 | gpio-controller; | |
| 102 | interrupt-controller; | |
| 103 | }; | |
| 104 | ||
| 105 | sdio1: sdio@3f180000 { | |
| 106 | compatible = "brcm,kona-sdhci"; | |
| 107 | reg = <0x3f180000 0x801c>; | |
| 108 | interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; | |
| 109 | clocks = <&sdio1_clk>; | |
| 110 | status = "disabled"; | |
| 111 | }; | |
| 112 | ||
| 113 | sdio2: sdio@3f190000 { | |
| 114 | compatible = "brcm,kona-sdhci"; | |
| 115 | reg = <0x3f190000 0x801c>; | |
| 116 | interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; | |
| 117 | clocks = <&sdio2_clk>; | |
| 118 | status = "disabled"; | |
| 119 | }; | |
| 120 | ||
| 121 | sdio3: sdio@3f1a0000 { | |
| 122 | compatible = "brcm,kona-sdhci"; | |
| 123 | reg = <0x3f1a0000 0x801c>; | |
| 124 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | |
| 125 | clocks = <&sdio3_clk>; | |
| 126 | status = "disabled"; | |
| 127 | }; | |
| 128 | ||
| 129 | sdio4: sdio@3f1b0000 { | |
| 130 | compatible = "brcm,kona-sdhci"; | |
| 131 | reg = <0x3f1b0000 0x801c>; | |
| 132 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | |
| 133 | clocks = <&sdio4_clk>; | |
| 134 | status = "disabled"; | |
| 135 | }; | |
| 136 | ||
| 137 | i2c@3e016000 { | |
| 138 | compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; | |
| 139 | reg = <0x3e016000 0x70>; | |
| 140 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | |
| 141 | #address-cells = <1>; | |
| 142 | #size-cells = <0>; | |
| 143 | clocks = <&bsc1_clk>; | |
| 144 | status = "disabled"; | |
| 145 | }; | |
| 146 | ||
| 147 | i2c@3e017000 { | |
| 148 | compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; | |
| 149 | reg = <0x3e017000 0x70>; | |
| 150 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; | |
| 151 | #address-cells = <1>; | |
| 152 | #size-cells = <0>; | |
| 153 | clocks = <&bsc2_clk>; | |
| 154 | status = "disabled"; | |
| 155 | }; | |
| 156 | ||
| 157 | i2c@3e018000 { | |
| 158 | compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; | |
| 159 | reg = <0x3e018000 0x70>; | |
| 160 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; | |
| 161 | #address-cells = <1>; | |
| 162 | #size-cells = <0>; | |
| 163 | clocks = <&bsc3_clk>; | |
| 164 | status = "disabled"; | |
| 165 | }; | |
| 166 | ||
| 167 | i2c@3e01c000 { | |
| 168 | compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c"; | |
| 169 | reg = <0x3e01c000 0x70>; | |
| 170 | interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; | |
| 171 | #address-cells = <1>; | |
| 172 | #size-cells = <0>; | |
| 173 | clocks = <&bsc4_clk>; | |
| 174 | status = "disabled"; | |
| 175 | }; | |
| 176 | ||
| 177 | clocks { | |
| 178 | bsc1_clk: bsc1 { | |
| 179 | compatible = "fixed-clock"; | |
| 180 | clock-frequency = <13000000>; | |
| 181 | #clock-cells = <0>; | |
| 182 | }; | |
| 183 | ||
| 184 | bsc2_clk: bsc2 { | |
| 185 | compatible = "fixed-clock"; | |
| 186 | clock-frequency = <13000000>; | |
| 187 | #clock-cells = <0>; | |
| 188 | }; | |
| 189 | ||
| 190 | bsc3_clk: bsc3 { | |
| 191 | compatible = "fixed-clock"; | |
| 192 | clock-frequency = <13000000>; | |
| 193 | #clock-cells = <0>; | |
| 194 | }; | |
| 195 | ||
| 196 | bsc4_clk: bsc4 { | |
| 197 | compatible = "fixed-clock"; | |
| 198 | clock-frequency = <13000000>; | |
| 199 | #clock-cells = <0>; | |
| 200 | }; | |
| 201 | ||
| 202 | pmu_bsc_clk: pmu_bsc { | |
| 203 | compatible = "fixed-clock"; | |
| 204 | clock-frequency = <13000000>; | |
| 205 | #clock-cells = <0>; | |
| 206 | }; | |
| 207 | ||
| 208 | hub_timer_clk: hub_timer { | |
| 209 | compatible = "fixed-clock"; | |
| 210 | clock-frequency = <32768>; | |
| 211 | #clock-cells = <0>; | |
| 212 | }; | |
| 213 | ||
| 214 | pwm_clk: pwm { | |
| 215 | compatible = "fixed-clock"; | |
| 216 | clock-frequency = <26000000>; | |
| 217 | #clock-cells = <0>; | |
| 218 | }; | |
| 219 | ||
| 220 | sdio1_clk: sdio1 { | |
| 221 | compatible = "fixed-clock"; | |
| 222 | clock-frequency = <48000000>; | |
| 223 | #clock-cells = <0>; | |
| 224 | }; | |
| 225 | ||
| 226 | sdio2_clk: sdio2 { | |
| 227 | compatible = "fixed-clock"; | |
| 228 | clock-frequency = <48000000>; | |
| 229 | #clock-cells = <0>; | |
| 230 | }; | |
| 231 | ||
| 232 | sdio3_clk: sdio3 { | |
| 233 | compatible = "fixed-clock"; | |
| 234 | clock-frequency = <48000000>; | |
| 235 | #clock-cells = <0>; | |
| 236 | }; | |
| 237 | ||
| 238 | sdio4_clk: sdio4 { | |
| 239 | compatible = "fixed-clock"; | |
| 240 | clock-frequency = <48000000>; | |
| 241 | #clock-cells = <0>; | |
| 242 | }; | |
| 243 | ||
| 244 | tmon_1m_clk: tmon_1m { | |
| 245 | compatible = "fixed-clock"; | |
| 246 | clock-frequency = <1000000>; | |
| 247 | #clock-cells = <0>; | |
| 248 | }; | |
| 249 | ||
| 250 | uartb_clk: uartb { | |
| 251 | compatible = "fixed-clock"; | |
| 252 | clock-frequency = <13000000>; | |
| 253 | #clock-cells = <0>; | |
| 254 | }; | |
| 255 | ||
| 256 | uartb2_clk: uartb2 { | |
| 257 | compatible = "fixed-clock"; | |
| 258 | clock-frequency = <13000000>; | |
| 259 | #clock-cells = <0>; | |
| 260 | }; | |
| 261 | ||
| 262 | uartb3_clk: uartb3 { | |
| 263 | compatible = "fixed-clock"; | |
| 264 | clock-frequency = <13000000>; | |
| 265 | #clock-cells = <0>; | |
| 266 | }; | |
| 267 | ||
| 268 | usb_otg_ahb_clk: usb_otg_ahb { | |
| 269 | compatible = "fixed-clock"; | |
| 270 | clock-frequency = <52000000>; | |
| 271 | #clock-cells = <0>; | |
| 272 | }; | |
| 273 | }; | |
| 274 | ||
| 275 | usbotg: usb@3f120000 { | |
| 276 | compatible = "snps,dwc2"; | |
| 277 | reg = <0x3f120000 0x10000>; | |
| 278 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; | |
| 279 | clocks = <&usb_otg_ahb_clk>; | |
| 280 | clock-names = "otg"; | |
| 281 | phys = <&usbphy>; | |
| 282 | phy-names = "usb2-phy"; | |
| 283 | status = "disabled"; | |
| 284 | }; | |
| 285 | ||
| 286 | usbphy: usb-phy@3f130000 { | |
| 287 | compatible = "brcm,kona-usb2-phy"; | |
| 288 | reg = <0x3f130000 0x28>; | |
| 289 | #phy-cells = <0>; | |
| 290 | status = "disabled"; | |
| 291 | }; | |
| 292 | }; |