[deliverable/linux.git] / arch / arm / boot / dts / dm816x.dtsi

/*
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/omap.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,dm816";
	interrupt-parent = <&intc>;

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		ethernet0 = &eth0;
		ethernet1 = &eth1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	/*
	 * XXX: Use a flat representation of the dm816x interconnect.
	 * The real dm816x interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		reg = <0x44000000 0x10000>;
		interrupts = <9 10>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		prcm: prcm@48180000 {
			compatible = "ti,dm816-prcm";
			reg = <0x48180000 0x4000>;

			prcm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			prcm_clockdomains: clockdomains {
			};
		};

		scrm: scrm@48140000 {
			compatible = "ti,dm816-scrm", "simple-bus";
			reg = <0x48140000 0x21000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48140000 0x21000>;

			dm816x_pinmux: pinmux@800 {
				compatible = "pinctrl-single";
				reg = <0x800 0x50a>;
				#address-cells = <1>;
				#size-cells = <0>;
				pinctrl-single,register-width = <16>;
				pinctrl-single,function-mask = <0xf>;
			};

			/* Device Configuration Registers */
			scm_conf: syscon@600 {
				compatible = "syscon", "simple-bus";
				reg = <0x600 0x110>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x600 0x110>;

				usb_phy0: usb-phy@20 {
					compatible = "ti,dm8168-usb-phy";
					reg = <0x20 0x8>;
					reg-names = "phy";
					clocks = <&main_fapll 6>;
					clock-names = "refclk";
					#phy-cells = <0>;
					syscon = <&scm_conf>;
				};

				usb_phy1: usb-phy@28 {
					compatible = "ti,dm8168-usb-phy";
					reg = <0x28 0x8>;
					reg-names = "phy";
					clocks = <&main_fapll 6>;
					clock-names = "refclk";
					#phy-cells = <0>;
					syscon = <&scm_conf>;
				};
			};

			scrm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			scrm_clockdomains: clockdomains {
			};
		};

		edma: edma@49000000 {
			compatible = "ti,edma3";
			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
			reg =   <0x49000000 0x10000>,
			        <0x44e10f90 0x40>;
			interrupts = <12 13 14>;
			#dma-cells = <1>;
		};

		elm: elm@48080000 {
			compatible = "ti,816-elm";
			ti,hwmods = "elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
		};

		gpio1: gpio@48032000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			ti,gpio-always-on;
			reg = <0x48032000 0x1000>;
			interrupts = <96>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			ti,gpio-always-on;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x2000>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupts = <100>;
			dmas = <&edma 52>;
			dma-names = "rxtx";
			gpmc,num-cs = <6>;
			gpmc,num-waitpins = <2>;
		};

		i2c1: i2c@48028000 {
			compatible = "ti,omap4-i2c";
			ti,hwmods = "i2c1";
			reg = <0x48028000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <70>;
			dmas = <&edma 58 &edma 59>;
			dma-names = "tx", "rx";
		};

		i2c2: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <71>;
			dmas = <&edma 60 &edma 61>;
			dma-names = "tx", "rx";
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,dm816-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		mailbox: mailbox@480c8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480c8000 0x2000>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			mbox_dsp: mbox_dsp {
				ti,mbox-tx = <3 0 0>;
				ti,mbox-rx = <0 0 0>;
			};
		};

		spinbox: spinbox@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x2000>;
			ti,hwmods = "spinbox";
			#hwlock-cells = <1>;
		};

		mdio: mdio@4a100800 {
			compatible = "ti,davinci_mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4a100800 0x100>;
			ti,hwmods = "davinci_mdio";
			bus_freq = <1000000>;
			phy0: ethernet-phy@0 {
				reg = <1>;
			};
			phy1: ethernet-phy@1 {
				reg = <2>;
			};
		};

		eth0: ethernet@4a100000 {
			compatible = "ti,dm816-emac";
			ti,hwmods = "emac0";
			reg = <0x4a100000 0x800
			       0x4a100900 0x3700>;
			clocks = <&sysclk24_ck>;
			syscon = <&scm_conf>;
			ti,davinci-ctrl-reg-offset = <0>;
			ti,davinci-ctrl-mod-reg-offset = <0x900>;
			ti,davinci-ctrl-ram-offset = <0x2000>;
			ti,davinci-ctrl-ram-size = <0x2000>;
			interrupts = <40 41 42 43>;
			phy-handle = <&phy0>;
		};

		eth1: ethernet@4a120000 {
			compatible = "ti,dm816-emac";
			ti,hwmods = "emac1";
			reg = <0x4a120000 0x4000>;
			clocks = <&sysclk24_ck>;
			syscon = <&scm_conf>;
			ti,davinci-ctrl-reg-offset = <0>;
			ti,davinci-ctrl-mod-reg-offset = <0x900>;
			ti,davinci-ctrl-ram-offset = <0x2000>;
			ti,davinci-ctrl-ram-size = <0x2000>;
			interrupts = <44 45 46 47>;
			phy-handle = <&phy1>;
		};

		mcspi1: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x48030000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <65>;
			ti,spi-num-cs = <4>;
			ti,hwmods = "mcspi1";
			dmas = <&edma 16 &edma 17
				&edma 18 &edma 19
				&edma 20 &edma 21
				&edma 22 &edma 23>;
			dma-names = "tx0", "rx0", "tx1", "rx1",
				    "tx2", "rx2", "tx3", "rx3";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			reg = <0x48060000 0x11000>;
			ti,hwmods = "mmc1";
			interrupts = <64>;
			dmas = <&edma 24 &edma 25>;
			dma-names = "tx", "rx";
		};

		timer1: timer@4802e000 {
			compatible = "ti,dm816-timer";
			reg = <0x4802e000 0x2000>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,dm816-timer";
			reg = <0x48040000 0x2000>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,dm816-timer";
			reg = <0x48042000 0x2000>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,dm816-timer";
			reg = <0x48044000 0x2000>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,dm816-timer";
			reg = <0x48046000 0x2000>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,dm816-timer";
			reg = <0x48048000 0x2000>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,dm816-timer";
			reg = <0x4804a000 0x2000>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		uart1: uart@48020000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			reg = <0x48020000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <72>;
			dmas = <&edma 26 &edma 27>;
			dma-names = "tx", "rx";
		};

		uart2: uart@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			reg = <0x48022000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <73>;
			dmas = <&edma 28 &edma 29>;
			dma-names = "tx", "rx";
		};

		uart3: uart@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			reg = <0x48024000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <74>;
			dmas = <&edma 30 &edma 31>;
			dma-names = "tx", "rx";
		};

		/* NOTE: USB needs a transceiver driver for phys to work */
		usb: usb_otg_hs@47401000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47401000 0x400000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";

			usb0: usb@47401000 {
				compatible = "ti,musb-dm816";
				reg = <0x47401400 0x400
				       0x47401000 0x200>;
				reg-names = "mc", "control";
				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "host";
				interface-type = <0>;
				phys = <&usb_phy0>;
				phy-names = "usb2-phy";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-dm816";
				reg = <0x47401c00 0x400
				       0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "host";
				interface-type = <0>;
				phys = <&usb_phy1>;
				phy-names = "usb2-phy";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
			};
		};

		wd_timer2: wd_timer@480c2000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer";
			reg = <0x480c2000 0x1000>;
			interrupts = <0>;
		};
	};
};

#include "dm816x-clocks.dtsi"
Commit	Line	Data
7800064b TL	1	/*
	2	* This file is licensed under the terms of the GNU General Public License
	3	* version 2. This program is licensed "as is" without any warranty of any
	4	* kind, whether express or implied.
	5	*/
	6
	7	#include <dt-bindings/gpio/gpio.h>
	8	#include <dt-bindings/pinctrl/omap.h>
	9
	10	#include "skeleton.dtsi"
	11
	12	/ {
	13	compatible = "ti,dm816";
	14	interrupt-parent = <&intc>;
	15
	16	aliases {
	17	i2c0 = &i2c1;
	18	i2c1 = &i2c2;
	19	serial0 = &uart1;
	20	serial1 = &uart2;
	21	serial2 = &uart3;
	22	ethernet0 = &eth0;
	23	ethernet1 = &eth1;
	24	};
	25
	26	cpus {
	27	#address-cells = <1>;
	28	#size-cells = <0>;
	29	cpu@0 {
	30	compatible = "arm,cortex-a8";
	31	device_type = "cpu";
	32	reg = <0>;
	33	};
	34	};
	35
	36	pmu {
	37	compatible = "arm,cortex-a8-pmu";
	38	interrupts = <3>;
	39	};
	40
	41	/*
	42	* The soc node represents the soc top level view. It is used for IPs
	43	* that are not memory mapped in the MPU view or for the MPU itself.
	44	*/
	45	soc {
	46	compatible = "ti,omap-infra";
	47	mpu {
	48	compatible = "ti,omap3-mpu";
	49	ti,hwmods = "mpu";
	50	};
	51	};
	52
7800064b TL	53	/*
	54	* XXX: Use a flat representation of the dm816x interconnect.
	55	* The real dm816x interconnect network is quite complex. Since
	56	* it will not bring real advantage to represent that in DT
	57	* for the moment, just use a fake OCP bus entry to represent
	58	* the whole bus hierarchy.
	59	*/
	60	ocp {
71bed41c	61	compatible = "simple-bus";
7800064b TL	62	reg = <0x44000000 0x10000>;
	63	interrupts = <9 10>;
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66	ranges;
7800064b TL	67
	68	prcm: prcm@48180000 {
	69	compatible = "ti,dm816-prcm";
	70	reg = <0x48180000 0x4000>;
	71
	72	prcm_clocks: clocks {
	73	#address-cells = <1>;
	74	#size-cells = <0>;
	75	};
	76
	77	prcm_clockdomains: clockdomains {
	78	};
	79	};
	80
	81	scrm: scrm@48140000 {
72d03226	82	compatible = "ti,dm816-scrm", "simple-bus";
7800064b TL	83	reg = <0x48140000 0x21000>;
	84	#address-cells = <1>;
	85	#size-cells = <1>;
	86	ranges = <0 0x48140000 0x21000>;
	87
72d03226 TL	88	dm816x_pinmux: pinmux@800 {
	89	compatible = "pinctrl-single";
	90	reg = <0x800 0x50a>;
	91	#address-cells = <1>;
	92	#size-cells = <0>;
	93	pinctrl-single,register-width = <16>;
	94	pinctrl-single,function-mask = <0xf>;
	95	};
	96
	97	/* Device Configuration Registers */
	98	scm_conf: syscon@600 {
a54879a0	99	compatible = "syscon", "simple-bus";
72d03226 TL	100	reg = <0x600 0x110>;
	101	#address-cells = <1>;
	102	#size-cells = <1>;
a54879a0 TL	103	ranges = <0 0x600 0x110>;
	104
	105	usb_phy0: usb-phy@20 {
	106	compatible = "ti,dm8168-usb-phy";
	107	reg = <0x20 0x8>;
	108	reg-names = "phy";
	109	clocks = <&main_fapll 6>;
	110	clock-names = "refclk";
	111	#phy-cells = <0>;
	112	syscon = <&scm_conf>;
	113	};
	114
	115	usb_phy1: usb-phy@28 {
	116	compatible = "ti,dm8168-usb-phy";
	117	reg = <0x28 0x8>;
	118	reg-names = "phy";
	119	clocks = <&main_fapll 6>;
	120	clock-names = "refclk";
	121	#phy-cells = <0>;
	122	syscon = <&scm_conf>;
	123	};
72d03226 TL	124	};
72d03226 TL	125
7800064b TL	126	scrm_clocks: clocks {
	127	#address-cells = <1>;
	128	#size-cells = <0>;
	129	};
	130
	131	scrm_clockdomains: clockdomains {
	132	};
	133	};
	134
7800064b TL	135	edma: edma@49000000 {
	136	compatible = "ti,edma3";
	137	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
	138	reg = <0x49000000 0x10000>,
	139	<0x44e10f90 0x40>;
	140	interrupts = <12 13 14>;
	141	#dma-cells = <1>;
	142	};
	143
	144	elm: elm@48080000 {
	145	compatible = "ti,816-elm";
	146	ti,hwmods = "elm";
	147	reg = <0x48080000 0x2000>;
	148	interrupts = <4>;
	149	};
	150
	151	gpio1: gpio@48032000 {
599c376c	152	compatible = "ti,omap4-gpio";
7800064b	153	ti,hwmods = "gpio1";
599c376c	154	ti,gpio-always-on;
7800064b	155	reg = <0x48032000 0x1000>;
599c376c TL	156	interrupts = <96>;
	157	gpio-controller;
	158	#gpio-cells = <2>;
	159	interrupt-controller;
	160	#interrupt-cells = <2>;
7800064b TL	161	};
	162
	163	gpio2: gpio@4804c000 {
599c376c	164	compatible = "ti,omap4-gpio";
7800064b	165	ti,hwmods = "gpio2";
599c376c	166	ti,gpio-always-on;
7800064b	167	reg = <0x4804c000 0x1000>;
599c376c TL	168	interrupts = <98>;
	169	gpio-controller;
	170	#gpio-cells = <2>;
	171	interrupt-controller;
	172	#interrupt-cells = <2>;
7800064b TL	173	};
	174
	175	gpmc: gpmc@50000000 {
	176	compatible = "ti,am3352-gpmc";
	177	ti,hwmods = "gpmc";
	178	reg = <0x50000000 0x2000>;
	179	#address-cells = <2>;
	180	#size-cells = <1>;
	181	interrupts = <100>;
201c7e33 FCJ	182	dmas = <&edma 52>;
201c7e33 FCJ	183	dma-names = "rxtx";
7800064b TL	184	gpmc,num-cs = <6>;
	185	gpmc,num-waitpins = <2>;
	186	};
	187
	188	i2c1: i2c@48028000 {
	189	compatible = "ti,omap4-i2c";
	190	ti,hwmods = "i2c1";
	191	reg = <0x48028000 0x1000>;
	192	#address-cells = <1>;
	193	#size-cells = <0>;
	194	interrupts = <70>;
	195	dmas = <&edma 58 &edma 59>;
	196	dma-names = "tx", "rx";
	197	};
	198
	199	i2c2: i2c@4802a000 {
	200	compatible = "ti,omap4-i2c";
	201	ti,hwmods = "i2c2";
	202	reg = <0x4802a000 0x1000>;
	203	#address-cells = <1>;
	204	#size-cells = <0>;
	205	interrupts = <71>;
	206	dmas = <&edma 60 &edma 61>;
	207	dma-names = "tx", "rx";
	208	};
	209
	210	intc: interrupt-controller@48200000 {
	211	compatible = "ti,dm816-intc";
	212	interrupt-controller;
	213	#interrupt-cells = <1>;
	214	reg = <0x48200000 0x1000>;
	215	};
	216
	217	mailbox: mailbox@480c8000 {
	218	compatible = "ti,omap4-mailbox";
	219	reg = <0x480c8000 0x2000>;
	220	interrupts = <77>;
	221	ti,hwmods = "mailbox";
d3e41a9f	222	#mbox-cells = <1>;
7800064b TL	223	ti,mbox-num-users = <4>;
	224	ti,mbox-num-fifos = <12>;
	225	mbox_dsp: mbox_dsp {
	226	ti,mbox-tx = <3 0 0>;
	227	ti,mbox-rx = <0 0 0>;
	228	};
	229	};
	230
24f09822 NA	231	spinbox: spinbox@480ca000 {
	232	compatible = "ti,omap4-hwspinlock";
	233	reg = <0x480ca000 0x2000>;
	234	ti,hwmods = "spinbox";
	235	#hwlock-cells = <1>;
	236	};
	237
7800064b TL	238	mdio: mdio@4a100800 {
	239	compatible = "ti,davinci_mdio";
	240	#address-cells = <1>;
	241	#size-cells = <0>;
	242	reg = <0x4a100800 0x100>;
	243	ti,hwmods = "davinci_mdio";
	244	bus_freq = <1000000>;
	245	phy0: ethernet-phy@0 {
	246	reg = <1>;
	247	};
	248	phy1: ethernet-phy@1 {
	249	reg = <2>;
	250	};
	251	};
	252
	253	eth0: ethernet@4a100000 {
	254	compatible = "ti,dm816-emac";
	255	ti,hwmods = "emac0";
	256	reg = <0x4a100000 0x800
	257	0x4a100900 0x3700>;
	258	clocks = <&sysclk24_ck>;
72d03226	259	syscon = <&scm_conf>;
7800064b TL	260	ti,davinci-ctrl-reg-offset = <0>;
	261	ti,davinci-ctrl-mod-reg-offset = <0x900>;
	262	ti,davinci-ctrl-ram-offset = <0x2000>;
	263	ti,davinci-ctrl-ram-size = <0x2000>;
	264	interrupts = <40 41 42 43>;
	265	phy-handle = <&phy0>;
	266	};
	267
	268	eth1: ethernet@4a120000 {
	269	compatible = "ti,dm816-emac";
	270	ti,hwmods = "emac1";
	271	reg = <0x4a120000 0x4000>;
	272	clocks = <&sysclk24_ck>;
72d03226	273	syscon = <&scm_conf>;
7800064b TL	274	ti,davinci-ctrl-reg-offset = <0>;
	275	ti,davinci-ctrl-mod-reg-offset = <0x900>;
	276	ti,davinci-ctrl-ram-offset = <0x2000>;
	277	ti,davinci-ctrl-ram-size = <0x2000>;
	278	interrupts = <44 45 46 47>;
	279	phy-handle = <&phy1>;
	280	};
	281
	282	mcspi1: spi@48030000 {
	283	compatible = "ti,omap4-mcspi";
	284	reg = <0x48030000 0x1000>;
	285	#address-cells = <1>;
	286	#size-cells = <0>;
	287	interrupts = <65>;
	288	ti,spi-num-cs = <4>;
	289	ti,hwmods = "mcspi1";
	290	dmas = <&edma 16 &edma 17
f1b2e7c2 NA	291	&edma 18 &edma 19
	292	&edma 20 &edma 21
	293	&edma 22 &edma 23>;
	294	dma-names = "tx0", "rx0", "tx1", "rx1",
	295	"tx2", "rx2", "tx3", "rx3";
7800064b TL	296	};
	297
	298	mmc1: mmc@48060000 {
	299	compatible = "ti,omap4-hsmmc";
	300	reg = <0x48060000 0x11000>;
	301	ti,hwmods = "mmc1";
	302	interrupts = <64>;
	303	dmas = <&edma 24 &edma 25>;
	304	dma-names = "tx", "rx";
	305	};
	306
	307	timer1: timer@4802e000 {
	308	compatible = "ti,dm816-timer";
	309	reg = <0x4802e000 0x2000>;
	310	interrupts = <67>;
	311	ti,hwmods = "timer1";
	312	ti,timer-alwon;
	313	};
	314
	315	timer2: timer@48040000 {
	316	compatible = "ti,dm816-timer";
	317	reg = <0x48040000 0x2000>;
	318	interrupts = <68>;
	319	ti,hwmods = "timer2";
	320	};
	321
	322	timer3: timer@48042000 {
	323	compatible = "ti,dm816-timer";
	324	reg = <0x48042000 0x2000>;
	325	interrupts = <69>;
	326	ti,hwmods = "timer3";
	327	};
	328
	329	timer4: timer@48044000 {
	330	compatible = "ti,dm816-timer";
	331	reg = <0x48044000 0x2000>;
	332	interrupts = <92>;
	333	ti,hwmods = "timer4";
8ca31dbf	334	ti,timer-pwm;
7800064b TL	335	};
	336
	337	timer5: timer@48046000 {
	338	compatible = "ti,dm816-timer";
	339	reg = <0x48046000 0x2000>;
	340	interrupts = <93>;
	341	ti,hwmods = "timer5";
8ca31dbf	342	ti,timer-pwm;
7800064b TL	343	};
	344
	345	timer6: timer@48048000 {
	346	compatible = "ti,dm816-timer";
	347	reg = <0x48048000 0x2000>;
	348	interrupts = <94>;
	349	ti,hwmods = "timer6";
8ca31dbf	350	ti,timer-pwm;
7800064b TL	351	};
	352
	353	timer7: timer@4804a000 {
	354	compatible = "ti,dm816-timer";
	355	reg = <0x4804a000 0x2000>;
	356	interrupts = <95>;
	357	ti,hwmods = "timer7";
8ca31dbf	358	ti,timer-pwm;
7800064b TL	359	};
	360
	361	uart1: uart@48020000 {
	362	compatible = "ti,omap3-uart";
	363	ti,hwmods = "uart1";
	364	reg = <0x48020000 0x2000>;
	365	clock-frequency = <48000000>;
	366	interrupts = <72>;
	367	dmas = <&edma 26 &edma 27>;
	368	dma-names = "tx", "rx";
	369	};
	370
	371	uart2: uart@48022000 {
	372	compatible = "ti,omap3-uart";
	373	ti,hwmods = "uart2";
	374	reg = <0x48022000 0x2000>;
	375	clock-frequency = <48000000>;
	376	interrupts = <73>;
	377	dmas = <&edma 28 &edma 29>;
	378	dma-names = "tx", "rx";
	379	};
	380
	381	uart3: uart@48024000 {
	382	compatible = "ti,omap3-uart";
	383	ti,hwmods = "uart3";
	384	reg = <0x48024000 0x2000>;
	385	clock-frequency = <48000000>;
	386	interrupts = <74>;
	387	dmas = <&edma 30 &edma 31>;
	388	dma-names = "tx", "rx";
	389	};
	390
	391	/* NOTE: USB needs a transceiver driver for phys to work */
	392	usb: usb_otg_hs@47401000 {
	393	compatible = "ti,am33xx-usb";
	394	reg = <0x47401000 0x400000>;
	395	ranges;
	396	#address-cells = <1>;
	397	#size-cells = <1>;
	398	ti,hwmods = "usb_otg_hs";
	399
	400	usb0: usb@47401000 {
1b205c53	401	compatible = "ti,musb-dm816";
7800064b TL	402	reg = <0x47401400 0x400
	403	0x47401000 0x200>;
	404	reg-names = "mc", "control";
	405	interrupts = <18>;
	406	interrupt-names = "mc";
a54879a0 TL	407	dr_mode = "host";
	408	interface-type = <0>;
	409	phys = <&usb_phy0>;
	410	phy-names = "usb2-phy";
7800064b TL	411	mentor,multipoint = <1>;
	412	mentor,num-eps = <16>;
	413	mentor,ram-bits = <12>;
	414	mentor,power = <500>;
de1a1221 TL	415
	416	dmas = <&cppi41dma 0 0 &cppi41dma 1 0
	417	&cppi41dma 2 0 &cppi41dma 3 0
	418	&cppi41dma 4 0 &cppi41dma 5 0
	419	&cppi41dma 6 0 &cppi41dma 7 0
	420	&cppi41dma 8 0 &cppi41dma 9 0
	421	&cppi41dma 10 0 &cppi41dma 11 0
	422	&cppi41dma 12 0 &cppi41dma 13 0
	423	&cppi41dma 14 0 &cppi41dma 0 1
	424	&cppi41dma 1 1 &cppi41dma 2 1
	425	&cppi41dma 3 1 &cppi41dma 4 1
	426	&cppi41dma 5 1 &cppi41dma 6 1
	427	&cppi41dma 7 1 &cppi41dma 8 1
	428	&cppi41dma 9 1 &cppi41dma 10 1
	429	&cppi41dma 11 1 &cppi41dma 12 1
	430	&cppi41dma 13 1 &cppi41dma 14 1>;
	431	dma-names =
	432	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	433	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	434	"rx14", "rx15",
	435	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	436	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	437	"tx14", "tx15";
7800064b TL	438	};
	439
	440	usb1: usb@47401800 {
1b205c53	441	compatible = "ti,musb-dm816";
7800064b TL	442	reg = <0x47401c00 0x400
	443	0x47401800 0x200>;
	444	reg-names = "mc", "control";
	445	interrupts = <19>;
	446	interrupt-names = "mc";
a54879a0 TL	447	dr_mode = "host";
	448	interface-type = <0>;
	449	phys = <&usb_phy1>;
	450	phy-names = "usb2-phy";
7800064b TL	451	mentor,multipoint = <1>;
	452	mentor,num-eps = <16>;
	453	mentor,ram-bits = <12>;
	454	mentor,power = <500>;
de1a1221 TL	455
	456	dmas = <&cppi41dma 15 0 &cppi41dma 16 0
	457	&cppi41dma 17 0 &cppi41dma 18 0
	458	&cppi41dma 19 0 &cppi41dma 20 0
	459	&cppi41dma 21 0 &cppi41dma 22 0
	460	&cppi41dma 23 0 &cppi41dma 24 0
	461	&cppi41dma 25 0 &cppi41dma 26 0
	462	&cppi41dma 27 0 &cppi41dma 28 0
	463	&cppi41dma 29 0 &cppi41dma 15 1
	464	&cppi41dma 16 1 &cppi41dma 17 1
	465	&cppi41dma 18 1 &cppi41dma 19 1
	466	&cppi41dma 20 1 &cppi41dma 21 1
	467	&cppi41dma 22 1 &cppi41dma 23 1
	468	&cppi41dma 24 1 &cppi41dma 25 1
	469	&cppi41dma 26 1 &cppi41dma 27 1
	470	&cppi41dma 28 1 &cppi41dma 29 1>;
	471	dma-names =
	472	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	473	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	474	"rx14", "rx15",
	475	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	476	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	477	"tx14", "tx15";
	478	};
	479
	480	cppi41dma: dma-controller@47402000 {
	481	compatible = "ti,am3359-cppi41";
	482	reg = <0x47400000 0x1000
	483	0x47402000 0x1000
	484	0x47403000 0x1000
	485	0x47404000 0x4000>;
	486	reg-names = "glue", "controller", "scheduler", "queuemgr";
	487	interrupts = <17>;
	488	interrupt-names = "glue";
	489	#dma-cells = <2>;
	490	#dma-channels = <30>;
	491	#dma-requests = <256>;
7800064b TL	492	};
	493	};
	494
	495	wd_timer2: wd_timer@480c2000 {
	496	compatible = "ti,omap3-wdt";
	497	ti,hwmods = "wd_timer";
	498	reg = <0x480c2000 0x1000>;
	499	interrupts = <0>;
	500	};
	501	};
	502	};
	503
7383ca92	504	#include "dm816x-clocks.dtsi"