[deliverable/linux.git] / arch / arm / boot / dts / dm816x.dtsi

/*
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/omap.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,dm816";
	interrupt-parent = <&intc>;

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		ethernet0 = &eth0;
		ethernet1 = &eth1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	/*
	 * XXX: Use a flat representation of the dm816x interconnect.
	 * The real dm816x interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		reg = <0x44000000 0x10000>;
		interrupts = <9 10>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		prcm: prcm@48180000 {
			compatible = "ti,dm816-prcm";
			reg = <0x48180000 0x4000>;

			prcm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			prcm_clockdomains: clockdomains {
			};
		};

		scrm: scrm@48140000 {
			compatible = "ti,dm816-scrm", "simple-bus";
			reg = <0x48140000 0x21000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48140000 0x21000>;

			dm816x_pinmux: pinmux@800 {
				compatible = "pinctrl-single";
				reg = <0x800 0x50a>;
				#address-cells = <1>;
				#size-cells = <0>;
				pinctrl-single,register-width = <16>;
				pinctrl-single,function-mask = <0xf>;
			};

			/* Device Configuration Registers */
			scm_conf: syscon@600 {
				compatible = "syscon", "simple-bus";
				reg = <0x600 0x110>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x600 0x110>;

				usb_phy0: usb-phy@20 {
					compatible = "ti,dm8168-usb-phy";
					reg = <0x20 0x8>;
					reg-names = "phy";
					clocks = <&main_fapll 6>;
					clock-names = "refclk";
					#phy-cells = <0>;
					syscon = <&scm_conf>;
				};

				usb_phy1: usb-phy@28 {
					compatible = "ti,dm8168-usb-phy";
					reg = <0x28 0x8>;
					reg-names = "phy";
					clocks = <&main_fapll 6>;
					clock-names = "refclk";
					#phy-cells = <0>;
					syscon = <&scm_conf>;
				};
			};

			scrm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			scrm_clockdomains: clockdomains {
			};
		};

		edma: edma@49000000 {
			compatible = "ti,edma3";
			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
			reg =   <0x49000000 0x10000>,
			        <0x44e10f90 0x40>;
			interrupts = <12 13 14>;
			#dma-cells = <1>;
		};

		elm: elm@48080000 {
			compatible = "ti,816-elm";
			ti,hwmods = "elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
		};

		gpio1: gpio@48032000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			ti,gpio-always-on;
			reg = <0x48032000 0x1000>;
			interrupts = <96>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			ti,gpio-always-on;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x2000>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupts = <100>;
			dmas = <&edma 52>;
			dma-names = "rxtx";
			gpmc,num-cs = <6>;
			gpmc,num-waitpins = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		i2c1: i2c@48028000 {
			compatible = "ti,omap4-i2c";
			ti,hwmods = "i2c1";
			reg = <0x48028000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <70>;
			dmas = <&edma 58 &edma 59>;
			dma-names = "tx", "rx";
		};

		i2c2: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <71>;
			dmas = <&edma 60 &edma 61>;
			dma-names = "tx", "rx";
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,dm816-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		rtc: rtc@480c0000 {
			compatible = "ti,am3352-rtc", "ti,da830-rtc";
			reg = <0x480c0000 0x1000>;
			interrupts = <75 76>;
			ti,hwmods = "rtc";
		};

		mailbox: mailbox@480c8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480c8000 0x2000>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			mbox_dsp: mbox_dsp {
				ti,mbox-tx = <3 0 0>;
				ti,mbox-rx = <0 0 0>;
			};
		};

		spinbox: spinbox@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x2000>;
			ti,hwmods = "spinbox";
			#hwlock-cells = <1>;
		};

		mdio: mdio@4a100800 {
			compatible = "ti,davinci_mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4a100800 0x100>;
			ti,hwmods = "davinci_mdio";
			bus_freq = <1000000>;
			phy0: ethernet-phy@0 {
				reg = <1>;
			};
			phy1: ethernet-phy@1 {
				reg = <2>;
			};
		};

		eth0: ethernet@4a100000 {
			compatible = "ti,dm816-emac";
			ti,hwmods = "emac0";
			reg = <0x4a100000 0x800
			       0x4a100900 0x3700>;
			clocks = <&sysclk24_ck>;
			syscon = <&scm_conf>;
			ti,davinci-ctrl-reg-offset = <0>;
			ti,davinci-ctrl-mod-reg-offset = <0x900>;
			ti,davinci-ctrl-ram-offset = <0x2000>;
			ti,davinci-ctrl-ram-size = <0x2000>;
			interrupts = <40 41 42 43>;
			phy-handle = <&phy0>;
		};

		eth1: ethernet@4a120000 {
			compatible = "ti,dm816-emac";
			ti,hwmods = "emac1";
			reg = <0x4a120000 0x4000>;
			clocks = <&sysclk24_ck>;
			syscon = <&scm_conf>;
			ti,davinci-ctrl-reg-offset = <0>;
			ti,davinci-ctrl-mod-reg-offset = <0x900>;
			ti,davinci-ctrl-ram-offset = <0x2000>;
			ti,davinci-ctrl-ram-size = <0x2000>;
			interrupts = <44 45 46 47>;
			phy-handle = <&phy1>;
		};

		mcspi1: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x48030000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <65>;
			ti,spi-num-cs = <4>;
			ti,hwmods = "mcspi1";
			dmas = <&edma 16 &edma 17
				&edma 18 &edma 19
				&edma 20 &edma 21
				&edma 22 &edma 23>;
			dma-names = "tx0", "rx0", "tx1", "rx1",
				    "tx2", "rx2", "tx3", "rx3";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			reg = <0x48060000 0x11000>;
			ti,hwmods = "mmc1";
			interrupts = <64>;
			dmas = <&edma 24 &edma 25>;
			dma-names = "tx", "rx";
		};

		timer1: timer@4802e000 {
			compatible = "ti,dm816-timer";
			reg = <0x4802e000 0x2000>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,dm816-timer";
			reg = <0x48040000 0x2000>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,dm816-timer";
			reg = <0x48042000 0x2000>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,dm816-timer";
			reg = <0x48044000 0x2000>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,dm816-timer";
			reg = <0x48046000 0x2000>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,dm816-timer";
			reg = <0x48048000 0x2000>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,dm816-timer";
			reg = <0x4804a000 0x2000>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		uart1: uart@48020000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			reg = <0x48020000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <72>;
			dmas = <&edma 26 &edma 27>;
			dma-names = "tx", "rx";
		};

		uart2: uart@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			reg = <0x48022000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <73>;
			dmas = <&edma 28 &edma 29>;
			dma-names = "tx", "rx";
		};

		uart3: uart@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			reg = <0x48024000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <74>;
			dmas = <&edma 30 &edma 31>;
			dma-names = "tx", "rx";
		};

		/* NOTE: USB needs a transceiver driver for phys to work */
		usb: usb_otg_hs@47401000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47401000 0x400000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";

			usb0: usb@47401000 {
				compatible = "ti,musb-dm816";
				reg = <0x47401400 0x400
				       0x47401000 0x200>;
				reg-names = "mc", "control";
				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "host";
				interface-type = <0>;
				phys = <&usb_phy0>;
				phy-names = "usb2-phy";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-dm816";
				reg = <0x47401c00 0x400
				       0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "host";
				interface-type = <0>;
				phys = <&usb_phy1>;
				phy-names = "usb2-phy";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
			};
		};

		wd_timer2: wd_timer@480c2000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer";
			reg = <0x480c2000 0x1000>;
			interrupts = <0>;
		};
	};
};

#include "dm816x-clocks.dtsi"
Commit	Line	Data
7800064b TL	1	/*
	2	* This file is licensed under the terms of the GNU General Public License
	3	* version 2. This program is licensed "as is" without any warranty of any
	4	* kind, whether express or implied.
	5	*/
	6
	7	#include <dt-bindings/gpio/gpio.h>
	8	#include <dt-bindings/pinctrl/omap.h>
	9
	10	#include "skeleton.dtsi"
	11
	12	/ {
	13	compatible = "ti,dm816";
	14	interrupt-parent = <&intc>;
	15
	16	aliases {
	17	i2c0 = &i2c1;
	18	i2c1 = &i2c2;
	19	serial0 = &uart1;
	20	serial1 = &uart2;
	21	serial2 = &uart3;
	22	ethernet0 = &eth0;
	23	ethernet1 = &eth1;
	24	};
	25
	26	cpus {
	27	#address-cells = <1>;
	28	#size-cells = <0>;
	29	cpu@0 {
	30	compatible = "arm,cortex-a8";
	31	device_type = "cpu";
	32	reg = <0>;
	33	};
	34	};
	35
	36	pmu {
	37	compatible = "arm,cortex-a8-pmu";
	38	interrupts = <3>;
	39	};
	40
	41	/*
	42	* The soc node represents the soc top level view. It is used for IPs
	43	* that are not memory mapped in the MPU view or for the MPU itself.
	44	*/
	45	soc {
	46	compatible = "ti,omap-infra";
	47	mpu {
	48	compatible = "ti,omap3-mpu";
	49	ti,hwmods = "mpu";
	50	};
	51	};
	52
7800064b TL	53	/*
	54	* XXX: Use a flat representation of the dm816x interconnect.
	55	* The real dm816x interconnect network is quite complex. Since
	56	* it will not bring real advantage to represent that in DT
	57	* for the moment, just use a fake OCP bus entry to represent
	58	* the whole bus hierarchy.
	59	*/
	60	ocp {
71bed41c	61	compatible = "simple-bus";
7800064b TL	62	reg = <0x44000000 0x10000>;
	63	interrupts = <9 10>;
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66	ranges;
7800064b TL	67
	68	prcm: prcm@48180000 {
	69	compatible = "ti,dm816-prcm";
	70	reg = <0x48180000 0x4000>;
	71
	72	prcm_clocks: clocks {
	73	#address-cells = <1>;
	74	#size-cells = <0>;
	75	};
	76
	77	prcm_clockdomains: clockdomains {
	78	};
	79	};
	80
	81	scrm: scrm@48140000 {
72d03226	82	compatible = "ti,dm816-scrm", "simple-bus";
7800064b TL	83	reg = <0x48140000 0x21000>;
	84	#address-cells = <1>;
	85	#size-cells = <1>;
	86	ranges = <0 0x48140000 0x21000>;
	87
72d03226 TL	88	dm816x_pinmux: pinmux@800 {
	89	compatible = "pinctrl-single";
	90	reg = <0x800 0x50a>;
	91	#address-cells = <1>;
	92	#size-cells = <0>;
	93	pinctrl-single,register-width = <16>;
	94	pinctrl-single,function-mask = <0xf>;
	95	};
	96
	97	/* Device Configuration Registers */
	98	scm_conf: syscon@600 {
a54879a0	99	compatible = "syscon", "simple-bus";
72d03226 TL	100	reg = <0x600 0x110>;
	101	#address-cells = <1>;
	102	#size-cells = <1>;
a54879a0 TL	103	ranges = <0 0x600 0x110>;
	104
	105	usb_phy0: usb-phy@20 {
	106	compatible = "ti,dm8168-usb-phy";
	107	reg = <0x20 0x8>;
	108	reg-names = "phy";
	109	clocks = <&main_fapll 6>;
	110	clock-names = "refclk";
	111	#phy-cells = <0>;
	112	syscon = <&scm_conf>;
	113	};
	114
	115	usb_phy1: usb-phy@28 {
	116	compatible = "ti,dm8168-usb-phy";
	117	reg = <0x28 0x8>;
	118	reg-names = "phy";
	119	clocks = <&main_fapll 6>;
	120	clock-names = "refclk";
	121	#phy-cells = <0>;
	122	syscon = <&scm_conf>;
	123	};
72d03226 TL	124	};
72d03226 TL	125
7800064b TL	126	scrm_clocks: clocks {
	127	#address-cells = <1>;
	128	#size-cells = <0>;
	129	};
	130
	131	scrm_clockdomains: clockdomains {
	132	};
	133	};
	134
7800064b TL	135	edma: edma@49000000 {
	136	compatible = "ti,edma3";
	137	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
	138	reg = <0x49000000 0x10000>,
	139	<0x44e10f90 0x40>;
	140	interrupts = <12 13 14>;
	141	#dma-cells = <1>;
	142	};
	143
	144	elm: elm@48080000 {
	145	compatible = "ti,816-elm";
	146	ti,hwmods = "elm";
	147	reg = <0x48080000 0x2000>;
	148	interrupts = <4>;
	149	};
	150
	151	gpio1: gpio@48032000 {
599c376c	152	compatible = "ti,omap4-gpio";
7800064b	153	ti,hwmods = "gpio1";
599c376c	154	ti,gpio-always-on;
7800064b	155	reg = <0x48032000 0x1000>;
599c376c TL	156	interrupts = <96>;
	157	gpio-controller;
	158	#gpio-cells = <2>;
	159	interrupt-controller;
	160	#interrupt-cells = <2>;
7800064b TL	161	};
	162
	163	gpio2: gpio@4804c000 {
599c376c	164	compatible = "ti,omap4-gpio";
7800064b	165	ti,hwmods = "gpio2";
599c376c	166	ti,gpio-always-on;
7800064b	167	reg = <0x4804c000 0x1000>;
599c376c TL	168	interrupts = <98>;
	169	gpio-controller;
	170	#gpio-cells = <2>;
	171	interrupt-controller;
	172	#interrupt-cells = <2>;
7800064b TL	173	};
	174
	175	gpmc: gpmc@50000000 {
	176	compatible = "ti,am3352-gpmc";
	177	ti,hwmods = "gpmc";
	178	reg = <0x50000000 0x2000>;
	179	#address-cells = <2>;
	180	#size-cells = <1>;
	181	interrupts = <100>;
201c7e33 FCJ	182	dmas = <&edma 52>;
201c7e33 FCJ	183	dma-names = "rxtx";
7800064b TL	184	gpmc,num-cs = <6>;
7800064b TL	185	gpmc,num-waitpins = <2>;
6d840d85 RQ	186	interrupt-controller;
6d840d85 RQ	187	#interrupt-cells = <2>;
7800064b TL	188	};
	189
	190	i2c1: i2c@48028000 {
	191	compatible = "ti,omap4-i2c";
	192	ti,hwmods = "i2c1";
	193	reg = <0x48028000 0x1000>;
	194	#address-cells = <1>;
	195	#size-cells = <0>;
	196	interrupts = <70>;
	197	dmas = <&edma 58 &edma 59>;
	198	dma-names = "tx", "rx";
	199	};
	200
	201	i2c2: i2c@4802a000 {
	202	compatible = "ti,omap4-i2c";
	203	ti,hwmods = "i2c2";
	204	reg = <0x4802a000 0x1000>;
	205	#address-cells = <1>;
	206	#size-cells = <0>;
	207	interrupts = <71>;
	208	dmas = <&edma 60 &edma 61>;
	209	dma-names = "tx", "rx";
	210	};
	211
	212	intc: interrupt-controller@48200000 {
	213	compatible = "ti,dm816-intc";
	214	interrupt-controller;
	215	#interrupt-cells = <1>;
	216	reg = <0x48200000 0x1000>;
	217	};
	218
5a28f433 TL	219	rtc: rtc@480c0000 {
	220	compatible = "ti,am3352-rtc", "ti,da830-rtc";
	221	reg = <0x480c0000 0x1000>;
	222	interrupts = <75 76>;
	223	ti,hwmods = "rtc";
	224	};
	225
7800064b TL	226	mailbox: mailbox@480c8000 {
	227	compatible = "ti,omap4-mailbox";
	228	reg = <0x480c8000 0x2000>;
	229	interrupts = <77>;
	230	ti,hwmods = "mailbox";
d3e41a9f	231	#mbox-cells = <1>;
7800064b TL	232	ti,mbox-num-users = <4>;
	233	ti,mbox-num-fifos = <12>;
	234	mbox_dsp: mbox_dsp {
	235	ti,mbox-tx = <3 0 0>;
	236	ti,mbox-rx = <0 0 0>;
	237	};
	238	};
	239
24f09822 NA	240	spinbox: spinbox@480ca000 {
	241	compatible = "ti,omap4-hwspinlock";
	242	reg = <0x480ca000 0x2000>;
	243	ti,hwmods = "spinbox";
	244	#hwlock-cells = <1>;
	245	};
	246
7800064b TL	247	mdio: mdio@4a100800 {
	248	compatible = "ti,davinci_mdio";
	249	#address-cells = <1>;
	250	#size-cells = <0>;
	251	reg = <0x4a100800 0x100>;
	252	ti,hwmods = "davinci_mdio";
	253	bus_freq = <1000000>;
	254	phy0: ethernet-phy@0 {
	255	reg = <1>;
	256	};
	257	phy1: ethernet-phy@1 {
	258	reg = <2>;
	259	};
	260	};
	261
	262	eth0: ethernet@4a100000 {
	263	compatible = "ti,dm816-emac";
	264	ti,hwmods = "emac0";
	265	reg = <0x4a100000 0x800
	266	0x4a100900 0x3700>;
	267	clocks = <&sysclk24_ck>;
72d03226	268	syscon = <&scm_conf>;
7800064b TL	269	ti,davinci-ctrl-reg-offset = <0>;
	270	ti,davinci-ctrl-mod-reg-offset = <0x900>;
	271	ti,davinci-ctrl-ram-offset = <0x2000>;
	272	ti,davinci-ctrl-ram-size = <0x2000>;
	273	interrupts = <40 41 42 43>;
	274	phy-handle = <&phy0>;
	275	};
	276
	277	eth1: ethernet@4a120000 {
	278	compatible = "ti,dm816-emac";
	279	ti,hwmods = "emac1";
	280	reg = <0x4a120000 0x4000>;
	281	clocks = <&sysclk24_ck>;
72d03226	282	syscon = <&scm_conf>;
7800064b TL	283	ti,davinci-ctrl-reg-offset = <0>;
	284	ti,davinci-ctrl-mod-reg-offset = <0x900>;
	285	ti,davinci-ctrl-ram-offset = <0x2000>;
	286	ti,davinci-ctrl-ram-size = <0x2000>;
	287	interrupts = <44 45 46 47>;
	288	phy-handle = <&phy1>;
	289	};
	290
	291	mcspi1: spi@48030000 {
	292	compatible = "ti,omap4-mcspi";
	293	reg = <0x48030000 0x1000>;
	294	#address-cells = <1>;
	295	#size-cells = <0>;
	296	interrupts = <65>;
	297	ti,spi-num-cs = <4>;
	298	ti,hwmods = "mcspi1";
	299	dmas = <&edma 16 &edma 17
f1b2e7c2 NA	300	&edma 18 &edma 19
	301	&edma 20 &edma 21
	302	&edma 22 &edma 23>;
	303	dma-names = "tx0", "rx0", "tx1", "rx1",
	304	"tx2", "rx2", "tx3", "rx3";
7800064b TL	305	};
	306
	307	mmc1: mmc@48060000 {
	308	compatible = "ti,omap4-hsmmc";
	309	reg = <0x48060000 0x11000>;
	310	ti,hwmods = "mmc1";
	311	interrupts = <64>;
	312	dmas = <&edma 24 &edma 25>;
	313	dma-names = "tx", "rx";
	314	};
	315
	316	timer1: timer@4802e000 {
	317	compatible = "ti,dm816-timer";
	318	reg = <0x4802e000 0x2000>;
	319	interrupts = <67>;
	320	ti,hwmods = "timer1";
	321	ti,timer-alwon;
	322	};
	323
	324	timer2: timer@48040000 {
	325	compatible = "ti,dm816-timer";
	326	reg = <0x48040000 0x2000>;
	327	interrupts = <68>;
	328	ti,hwmods = "timer2";
	329	};
	330
	331	timer3: timer@48042000 {
	332	compatible = "ti,dm816-timer";
	333	reg = <0x48042000 0x2000>;
	334	interrupts = <69>;
	335	ti,hwmods = "timer3";
	336	};
	337
	338	timer4: timer@48044000 {
	339	compatible = "ti,dm816-timer";
	340	reg = <0x48044000 0x2000>;
	341	interrupts = <92>;
	342	ti,hwmods = "timer4";
8ca31dbf	343	ti,timer-pwm;
7800064b TL	344	};
	345
	346	timer5: timer@48046000 {
	347	compatible = "ti,dm816-timer";
	348	reg = <0x48046000 0x2000>;
	349	interrupts = <93>;
	350	ti,hwmods = "timer5";
8ca31dbf	351	ti,timer-pwm;
7800064b TL	352	};
	353
	354	timer6: timer@48048000 {
	355	compatible = "ti,dm816-timer";
	356	reg = <0x48048000 0x2000>;
	357	interrupts = <94>;
	358	ti,hwmods = "timer6";
8ca31dbf	359	ti,timer-pwm;
7800064b TL	360	};
	361
	362	timer7: timer@4804a000 {
	363	compatible = "ti,dm816-timer";
	364	reg = <0x4804a000 0x2000>;
	365	interrupts = <95>;
	366	ti,hwmods = "timer7";
8ca31dbf	367	ti,timer-pwm;
7800064b TL	368	};
	369
	370	uart1: uart@48020000 {
	371	compatible = "ti,omap3-uart";
	372	ti,hwmods = "uart1";
	373	reg = <0x48020000 0x2000>;
	374	clock-frequency = <48000000>;
	375	interrupts = <72>;
	376	dmas = <&edma 26 &edma 27>;
	377	dma-names = "tx", "rx";
	378	};
	379
	380	uart2: uart@48022000 {
	381	compatible = "ti,omap3-uart";
	382	ti,hwmods = "uart2";
	383	reg = <0x48022000 0x2000>;
	384	clock-frequency = <48000000>;
	385	interrupts = <73>;
	386	dmas = <&edma 28 &edma 29>;
	387	dma-names = "tx", "rx";
	388	};
	389
	390	uart3: uart@48024000 {
	391	compatible = "ti,omap3-uart";
	392	ti,hwmods = "uart3";
	393	reg = <0x48024000 0x2000>;
	394	clock-frequency = <48000000>;
	395	interrupts = <74>;
	396	dmas = <&edma 30 &edma 31>;
	397	dma-names = "tx", "rx";
	398	};
	399
	400	/* NOTE: USB needs a transceiver driver for phys to work */
	401	usb: usb_otg_hs@47401000 {
	402	compatible = "ti,am33xx-usb";
	403	reg = <0x47401000 0x400000>;
	404	ranges;
	405	#address-cells = <1>;
	406	#size-cells = <1>;
	407	ti,hwmods = "usb_otg_hs";
	408
	409	usb0: usb@47401000 {
1b205c53	410	compatible = "ti,musb-dm816";
7800064b TL	411	reg = <0x47401400 0x400
	412	0x47401000 0x200>;
	413	reg-names = "mc", "control";
	414	interrupts = <18>;
	415	interrupt-names = "mc";
a54879a0 TL	416	dr_mode = "host";
	417	interface-type = <0>;
	418	phys = <&usb_phy0>;
	419	phy-names = "usb2-phy";
7800064b TL	420	mentor,multipoint = <1>;
	421	mentor,num-eps = <16>;
	422	mentor,ram-bits = <12>;
	423	mentor,power = <500>;
de1a1221 TL	424
	425	dmas = <&cppi41dma 0 0 &cppi41dma 1 0
	426	&cppi41dma 2 0 &cppi41dma 3 0
	427	&cppi41dma 4 0 &cppi41dma 5 0
	428	&cppi41dma 6 0 &cppi41dma 7 0
	429	&cppi41dma 8 0 &cppi41dma 9 0
	430	&cppi41dma 10 0 &cppi41dma 11 0
	431	&cppi41dma 12 0 &cppi41dma 13 0
	432	&cppi41dma 14 0 &cppi41dma 0 1
	433	&cppi41dma 1 1 &cppi41dma 2 1
	434	&cppi41dma 3 1 &cppi41dma 4 1
	435	&cppi41dma 5 1 &cppi41dma 6 1
	436	&cppi41dma 7 1 &cppi41dma 8 1
	437	&cppi41dma 9 1 &cppi41dma 10 1
	438	&cppi41dma 11 1 &cppi41dma 12 1
	439	&cppi41dma 13 1 &cppi41dma 14 1>;
	440	dma-names =
	441	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	442	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	443	"rx14", "rx15",
	444	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	445	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	446	"tx14", "tx15";
7800064b TL	447	};
	448
	449	usb1: usb@47401800 {
1b205c53	450	compatible = "ti,musb-dm816";
7800064b TL	451	reg = <0x47401c00 0x400
	452	0x47401800 0x200>;
	453	reg-names = "mc", "control";
	454	interrupts = <19>;
	455	interrupt-names = "mc";
a54879a0 TL	456	dr_mode = "host";
	457	interface-type = <0>;
	458	phys = <&usb_phy1>;
	459	phy-names = "usb2-phy";
7800064b TL	460	mentor,multipoint = <1>;
	461	mentor,num-eps = <16>;
	462	mentor,ram-bits = <12>;
	463	mentor,power = <500>;
de1a1221 TL	464
	465	dmas = <&cppi41dma 15 0 &cppi41dma 16 0
	466	&cppi41dma 17 0 &cppi41dma 18 0
	467	&cppi41dma 19 0 &cppi41dma 20 0
	468	&cppi41dma 21 0 &cppi41dma 22 0
	469	&cppi41dma 23 0 &cppi41dma 24 0
	470	&cppi41dma 25 0 &cppi41dma 26 0
	471	&cppi41dma 27 0 &cppi41dma 28 0
	472	&cppi41dma 29 0 &cppi41dma 15 1
	473	&cppi41dma 16 1 &cppi41dma 17 1
	474	&cppi41dma 18 1 &cppi41dma 19 1
	475	&cppi41dma 20 1 &cppi41dma 21 1
	476	&cppi41dma 22 1 &cppi41dma 23 1
	477	&cppi41dma 24 1 &cppi41dma 25 1
	478	&cppi41dma 26 1 &cppi41dma 27 1
	479	&cppi41dma 28 1 &cppi41dma 29 1>;
	480	dma-names =
	481	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	482	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	483	"rx14", "rx15",
	484	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	485	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	486	"tx14", "tx15";
	487	};
	488
	489	cppi41dma: dma-controller@47402000 {
	490	compatible = "ti,am3359-cppi41";
	491	reg = <0x47400000 0x1000
	492	0x47402000 0x1000
	493	0x47403000 0x1000
	494	0x47404000 0x4000>;
	495	reg-names = "glue", "controller", "scheduler", "queuemgr";
	496	interrupts = <17>;
	497	interrupt-names = "glue";
	498	#dma-cells = <2>;
	499	#dma-channels = <30>;
	500	#dma-requests = <256>;
7800064b TL	501	};
	502	};
	503
	504	wd_timer2: wd_timer@480c2000 {
	505	compatible = "ti,omap3-wdt";
	506	ti,hwmods = "wd_timer";
	507	reg = <0x480c2000 0x1000>;
	508	interrupts = <0>;
	509	};
	510	};
	511	};
	512
7383ca92	513	#include "dm816x-clocks.dtsi"