[deliverable/linux.git] / arch / arm / boot / dts / dm816x.dtsi

/*
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/omap.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,dm816";
	interrupt-parent = <&intc>;

	aliases {
		i2c0 = &i2c1;
		i2c1 = &i2c2;
		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		ethernet0 = &eth0;
		ethernet1 = &eth1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			device_type = "cpu";
			reg = <0>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	/*
	 * XXX: Use a flat representation of the dm816x interconnect.
	 * The real dm816x interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		reg = <0x44000000 0x10000>;
		interrupts = <9 10>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		prcm: prcm@48180000 {
			compatible = "ti,dm816-prcm";
			reg = <0x48180000 0x4000>;

			prcm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			prcm_clockdomains: clockdomains {
			};
		};

		scrm: scrm@48140000 {
			compatible = "ti,dm816-scrm", "simple-bus";
			reg = <0x48140000 0x21000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x48140000 0x21000>;

			dm816x_pinmux: pinmux@800 {
				compatible = "pinctrl-single";
				reg = <0x800 0x50a>;
				#address-cells = <1>;
				#size-cells = <0>;
				pinctrl-single,register-width = <16>;
				pinctrl-single,function-mask = <0xf>;
			};

			/* Device Configuration Registers */
			scm_conf: syscon@600 {
				compatible = "syscon", "simple-bus";
				reg = <0x600 0x110>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x600 0x110>;

				usb_phy0: usb-phy@20 {
					compatible = "ti,dm8168-usb-phy";
					reg = <0x20 0x8>;
					reg-names = "phy";
					clocks = <&main_fapll 6>;
					clock-names = "refclk";
					#phy-cells = <0>;
					syscon = <&scm_conf>;
				};

				usb_phy1: usb-phy@28 {
					compatible = "ti,dm8168-usb-phy";
					reg = <0x28 0x8>;
					reg-names = "phy";
					clocks = <&main_fapll 6>;
					clock-names = "refclk";
					#phy-cells = <0>;
					syscon = <&scm_conf>;
				};
			};

			scrm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			scrm_clockdomains: clockdomains {
			};
		};

		edma: edma@49000000 {
			compatible = "ti,edma3";
			ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
			reg =   <0x49000000 0x10000>,
			        <0x44e10f90 0x40>;
			interrupts = <12 13 14>;
			#dma-cells = <1>;
		};

		elm: elm@48080000 {
			compatible = "ti,816-elm";
			ti,hwmods = "elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
		};

		gpio1: gpio@48032000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			ti,gpio-always-on;
			reg = <0x48032000 0x1000>;
			interrupts = <96>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio2: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			ti,gpio-always-on;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x2000>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupts = <100>;
			gpmc,num-cs = <6>;
			gpmc,num-waitpins = <2>;
		};

		i2c1: i2c@48028000 {
			compatible = "ti,omap4-i2c";
			ti,hwmods = "i2c1";
			reg = <0x48028000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <70>;
			dmas = <&edma 58 &edma 59>;
			dma-names = "tx", "rx";
		};

		i2c2: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <71>;
			dmas = <&edma 60 &edma 61>;
			dma-names = "tx", "rx";
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,dm816-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		mailbox: mailbox@480c8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480c8000 0x2000>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <12>;
			mbox_dsp: mbox_dsp {
				ti,mbox-tx = <3 0 0>;
				ti,mbox-rx = <0 0 0>;
			};
		};

		mdio: mdio@4a100800 {
			compatible = "ti,davinci_mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4a100800 0x100>;
			ti,hwmods = "davinci_mdio";
			bus_freq = <1000000>;
			phy0: ethernet-phy@0 {
				reg = <1>;
			};
			phy1: ethernet-phy@1 {
				reg = <2>;
			};
		};

		eth0: ethernet@4a100000 {
			compatible = "ti,dm816-emac";
			ti,hwmods = "emac0";
			reg = <0x4a100000 0x800
			       0x4a100900 0x3700>;
			clocks = <&sysclk24_ck>;
			syscon = <&scm_conf>;
			ti,davinci-ctrl-reg-offset = <0>;
			ti,davinci-ctrl-mod-reg-offset = <0x900>;
			ti,davinci-ctrl-ram-offset = <0x2000>;
			ti,davinci-ctrl-ram-size = <0x2000>;
			interrupts = <40 41 42 43>;
			phy-handle = <&phy0>;
		};

		eth1: ethernet@4a120000 {
			compatible = "ti,dm816-emac";
			ti,hwmods = "emac1";
			reg = <0x4a120000 0x4000>;
			clocks = <&sysclk24_ck>;
			syscon = <&scm_conf>;
			ti,davinci-ctrl-reg-offset = <0>;
			ti,davinci-ctrl-mod-reg-offset = <0x900>;
			ti,davinci-ctrl-ram-offset = <0x2000>;
			ti,davinci-ctrl-ram-size = <0x2000>;
			interrupts = <44 45 46 47>;
			phy-handle = <&phy1>;
		};

		mcspi1: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			reg = <0x48030000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <65>;
			ti,spi-num-cs = <4>;
			ti,hwmods = "mcspi1";
			dmas = <&edma 16 &edma 17
				&edma 18 &edma 19
				&edma 20 &edma 21
				&edma 22 &edma 23>;
			dma-names = "tx0", "rx0", "tx1", "rx1",
				    "tx2", "rx2", "tx3", "rx3";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			reg = <0x48060000 0x11000>;
			ti,hwmods = "mmc1";
			interrupts = <64>;
			dmas = <&edma 24 &edma 25>;
			dma-names = "tx", "rx";
		};

		timer1: timer@4802e000 {
			compatible = "ti,dm816-timer";
			reg = <0x4802e000 0x2000>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,dm816-timer";
			reg = <0x48040000 0x2000>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,dm816-timer";
			reg = <0x48042000 0x2000>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,dm816-timer";
			reg = <0x48044000 0x2000>;
			interrupts = <92>;
			ti,hwmods = "timer4";
		};

		timer5: timer@48046000 {
			compatible = "ti,dm816-timer";
			reg = <0x48046000 0x2000>;
			interrupts = <93>;
			ti,hwmods = "timer5";
		};

		timer6: timer@48048000 {
			compatible = "ti,dm816-timer";
			reg = <0x48048000 0x2000>;
			interrupts = <94>;
			ti,hwmods = "timer6";
		};

		timer7: timer@4804a000 {
			compatible = "ti,dm816-timer";
			reg = <0x4804a000 0x2000>;
			interrupts = <95>;
			ti,hwmods = "timer7";
		};

		uart1: uart@48020000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			reg = <0x48020000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <72>;
			dmas = <&edma 26 &edma 27>;
			dma-names = "tx", "rx";
		};

		uart2: uart@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			reg = <0x48022000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <73>;
			dmas = <&edma 28 &edma 29>;
			dma-names = "tx", "rx";
		};

		uart3: uart@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			reg = <0x48024000 0x2000>;
			clock-frequency = <48000000>;
			interrupts = <74>;
			dmas = <&edma 30 &edma 31>;
			dma-names = "tx", "rx";
		};

		/* NOTE: USB needs a transceiver driver for phys to work */
		usb: usb_otg_hs@47401000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47401000 0x400000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";

			usb0: usb@47401000 {
				compatible = "ti,musb-dm816";
				reg = <0x47401400 0x400
				       0x47401000 0x200>;
				reg-names = "mc", "control";
				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "host";
				interface-type = <0>;
				phys = <&usb_phy0>;
				phy-names = "usb2-phy";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-dm816";
				reg = <0x47401c00 0x400
				       0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "host";
				interface-type = <0>;
				phys = <&usb_phy1>;
				phy-names = "usb2-phy";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
			};
		};

		wd_timer2: wd_timer@480c2000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer";
			reg = <0x480c2000 0x1000>;
			interrupts = <0>;
		};
	};
};

#include "dm816x-clocks.dtsi"
Commit	Line	Data
7800064b TL	1	/*
	2	* This file is licensed under the terms of the GNU General Public License
	3	* version 2. This program is licensed "as is" without any warranty of any
	4	* kind, whether express or implied.
	5	*/
	6
	7	#include <dt-bindings/gpio/gpio.h>
	8	#include <dt-bindings/pinctrl/omap.h>
	9
	10	#include "skeleton.dtsi"
	11
	12	/ {
	13	compatible = "ti,dm816";
	14	interrupt-parent = <&intc>;
	15
	16	aliases {
	17	i2c0 = &i2c1;
	18	i2c1 = &i2c2;
	19	serial0 = &uart1;
	20	serial1 = &uart2;
	21	serial2 = &uart3;
	22	ethernet0 = &eth0;
	23	ethernet1 = &eth1;
	24	};
	25
	26	cpus {
	27	#address-cells = <1>;
	28	#size-cells = <0>;
	29	cpu@0 {
	30	compatible = "arm,cortex-a8";
	31	device_type = "cpu";
	32	reg = <0>;
	33	};
	34	};
	35
	36	pmu {
	37	compatible = "arm,cortex-a8-pmu";
	38	interrupts = <3>;
	39	};
	40
	41	/*
	42	* The soc node represents the soc top level view. It is used for IPs
	43	* that are not memory mapped in the MPU view or for the MPU itself.
	44	*/
	45	soc {
	46	compatible = "ti,omap-infra";
	47	mpu {
	48	compatible = "ti,omap3-mpu";
	49	ti,hwmods = "mpu";
	50	};
	51	};
	52
7800064b TL	53	/*
	54	* XXX: Use a flat representation of the dm816x interconnect.
	55	* The real dm816x interconnect network is quite complex. Since
	56	* it will not bring real advantage to represent that in DT
	57	* for the moment, just use a fake OCP bus entry to represent
	58	* the whole bus hierarchy.
	59	*/
	60	ocp {
71bed41c	61	compatible = "simple-bus";
7800064b TL	62	reg = <0x44000000 0x10000>;
	63	interrupts = <9 10>;
	64	#address-cells = <1>;
	65	#size-cells = <1>;
	66	ranges;
	67	ti,hwmods = "l3_main";
	68
	69	prcm: prcm@48180000 {
	70	compatible = "ti,dm816-prcm";
	71	reg = <0x48180000 0x4000>;
	72
	73	prcm_clocks: clocks {
	74	#address-cells = <1>;
	75	#size-cells = <0>;
	76	};
	77
	78	prcm_clockdomains: clockdomains {
	79	};
	80	};
	81
	82	scrm: scrm@48140000 {
72d03226	83	compatible = "ti,dm816-scrm", "simple-bus";
7800064b TL	84	reg = <0x48140000 0x21000>;
	85	#address-cells = <1>;
	86	#size-cells = <1>;
	87	ranges = <0 0x48140000 0x21000>;
	88
72d03226 TL	89	dm816x_pinmux: pinmux@800 {
	90	compatible = "pinctrl-single";
	91	reg = <0x800 0x50a>;
	92	#address-cells = <1>;
	93	#size-cells = <0>;
	94	pinctrl-single,register-width = <16>;
	95	pinctrl-single,function-mask = <0xf>;
	96	};
	97
	98	/* Device Configuration Registers */
	99	scm_conf: syscon@600 {
a54879a0	100	compatible = "syscon", "simple-bus";
72d03226 TL	101	reg = <0x600 0x110>;
	102	#address-cells = <1>;
	103	#size-cells = <1>;
a54879a0 TL	104	ranges = <0 0x600 0x110>;
	105
	106	usb_phy0: usb-phy@20 {
	107	compatible = "ti,dm8168-usb-phy";
	108	reg = <0x20 0x8>;
	109	reg-names = "phy";
	110	clocks = <&main_fapll 6>;
	111	clock-names = "refclk";
	112	#phy-cells = <0>;
	113	syscon = <&scm_conf>;
	114	};
	115
	116	usb_phy1: usb-phy@28 {
	117	compatible = "ti,dm8168-usb-phy";
	118	reg = <0x28 0x8>;
	119	reg-names = "phy";
	120	clocks = <&main_fapll 6>;
	121	clock-names = "refclk";
	122	#phy-cells = <0>;
	123	syscon = <&scm_conf>;
	124	};
72d03226 TL	125	};
72d03226 TL	126
7800064b TL	127	scrm_clocks: clocks {
	128	#address-cells = <1>;
	129	#size-cells = <0>;
	130	};
	131
	132	scrm_clockdomains: clockdomains {
	133	};
	134	};
	135
7800064b TL	136	edma: edma@49000000 {
	137	compatible = "ti,edma3";
	138	ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
	139	reg = <0x49000000 0x10000>,
	140	<0x44e10f90 0x40>;
	141	interrupts = <12 13 14>;
	142	#dma-cells = <1>;
	143	};
	144
	145	elm: elm@48080000 {
	146	compatible = "ti,816-elm";
	147	ti,hwmods = "elm";
	148	reg = <0x48080000 0x2000>;
	149	interrupts = <4>;
	150	};
	151
	152	gpio1: gpio@48032000 {
599c376c	153	compatible = "ti,omap4-gpio";
7800064b	154	ti,hwmods = "gpio1";
599c376c	155	ti,gpio-always-on;
7800064b	156	reg = <0x48032000 0x1000>;
599c376c TL	157	interrupts = <96>;
	158	gpio-controller;
	159	#gpio-cells = <2>;
	160	interrupt-controller;
	161	#interrupt-cells = <2>;
7800064b TL	162	};
	163
	164	gpio2: gpio@4804c000 {
599c376c	165	compatible = "ti,omap4-gpio";
7800064b	166	ti,hwmods = "gpio2";
599c376c	167	ti,gpio-always-on;
7800064b	168	reg = <0x4804c000 0x1000>;
599c376c TL	169	interrupts = <98>;
	170	gpio-controller;
	171	#gpio-cells = <2>;
	172	interrupt-controller;
	173	#interrupt-cells = <2>;
7800064b TL	174	};
	175
	176	gpmc: gpmc@50000000 {
	177	compatible = "ti,am3352-gpmc";
	178	ti,hwmods = "gpmc";
	179	reg = <0x50000000 0x2000>;
	180	#address-cells = <2>;
	181	#size-cells = <1>;
	182	interrupts = <100>;
	183	gpmc,num-cs = <6>;
	184	gpmc,num-waitpins = <2>;
	185	};
	186
	187	i2c1: i2c@48028000 {
	188	compatible = "ti,omap4-i2c";
	189	ti,hwmods = "i2c1";
	190	reg = <0x48028000 0x1000>;
	191	#address-cells = <1>;
	192	#size-cells = <0>;
	193	interrupts = <70>;
	194	dmas = <&edma 58 &edma 59>;
	195	dma-names = "tx", "rx";
	196	};
	197
	198	i2c2: i2c@4802a000 {
	199	compatible = "ti,omap4-i2c";
	200	ti,hwmods = "i2c2";
	201	reg = <0x4802a000 0x1000>;
	202	#address-cells = <1>;
	203	#size-cells = <0>;
	204	interrupts = <71>;
	205	dmas = <&edma 60 &edma 61>;
	206	dma-names = "tx", "rx";
	207	};
	208
	209	intc: interrupt-controller@48200000 {
	210	compatible = "ti,dm816-intc";
	211	interrupt-controller;
	212	#interrupt-cells = <1>;
	213	reg = <0x48200000 0x1000>;
	214	};
	215
	216	mailbox: mailbox@480c8000 {
	217	compatible = "ti,omap4-mailbox";
	218	reg = <0x480c8000 0x2000>;
	219	interrupts = <77>;
	220	ti,hwmods = "mailbox";
d3e41a9f	221	#mbox-cells = <1>;
7800064b TL	222	ti,mbox-num-users = <4>;
	223	ti,mbox-num-fifos = <12>;
	224	mbox_dsp: mbox_dsp {
	225	ti,mbox-tx = <3 0 0>;
	226	ti,mbox-rx = <0 0 0>;
	227	};
	228	};
	229
	230	mdio: mdio@4a100800 {
	231	compatible = "ti,davinci_mdio";
	232	#address-cells = <1>;
	233	#size-cells = <0>;
	234	reg = <0x4a100800 0x100>;
	235	ti,hwmods = "davinci_mdio";
	236	bus_freq = <1000000>;
	237	phy0: ethernet-phy@0 {
	238	reg = <1>;
	239	};
	240	phy1: ethernet-phy@1 {
	241	reg = <2>;
	242	};
	243	};
	244
	245	eth0: ethernet@4a100000 {
	246	compatible = "ti,dm816-emac";
	247	ti,hwmods = "emac0";
	248	reg = <0x4a100000 0x800
	249	0x4a100900 0x3700>;
	250	clocks = <&sysclk24_ck>;
72d03226	251	syscon = <&scm_conf>;
7800064b TL	252	ti,davinci-ctrl-reg-offset = <0>;
	253	ti,davinci-ctrl-mod-reg-offset = <0x900>;
	254	ti,davinci-ctrl-ram-offset = <0x2000>;
	255	ti,davinci-ctrl-ram-size = <0x2000>;
	256	interrupts = <40 41 42 43>;
	257	phy-handle = <&phy0>;
	258	};
	259
	260	eth1: ethernet@4a120000 {
	261	compatible = "ti,dm816-emac";
	262	ti,hwmods = "emac1";
	263	reg = <0x4a120000 0x4000>;
	264	clocks = <&sysclk24_ck>;
72d03226	265	syscon = <&scm_conf>;
7800064b TL	266	ti,davinci-ctrl-reg-offset = <0>;
	267	ti,davinci-ctrl-mod-reg-offset = <0x900>;
	268	ti,davinci-ctrl-ram-offset = <0x2000>;
	269	ti,davinci-ctrl-ram-size = <0x2000>;
	270	interrupts = <44 45 46 47>;
	271	phy-handle = <&phy1>;
	272	};
	273
	274	mcspi1: spi@48030000 {
	275	compatible = "ti,omap4-mcspi";
	276	reg = <0x48030000 0x1000>;
	277	#address-cells = <1>;
	278	#size-cells = <0>;
	279	interrupts = <65>;
	280	ti,spi-num-cs = <4>;
	281	ti,hwmods = "mcspi1";
	282	dmas = <&edma 16 &edma 17
f1b2e7c2 NA	283	&edma 18 &edma 19
	284	&edma 20 &edma 21
	285	&edma 22 &edma 23>;
	286	dma-names = "tx0", "rx0", "tx1", "rx1",
	287	"tx2", "rx2", "tx3", "rx3";
7800064b TL	288	};
	289
	290	mmc1: mmc@48060000 {
	291	compatible = "ti,omap4-hsmmc";
	292	reg = <0x48060000 0x11000>;
	293	ti,hwmods = "mmc1";
	294	interrupts = <64>;
	295	dmas = <&edma 24 &edma 25>;
	296	dma-names = "tx", "rx";
	297	};
	298
	299	timer1: timer@4802e000 {
	300	compatible = "ti,dm816-timer";
	301	reg = <0x4802e000 0x2000>;
	302	interrupts = <67>;
	303	ti,hwmods = "timer1";
	304	ti,timer-alwon;
	305	};
	306
	307	timer2: timer@48040000 {
	308	compatible = "ti,dm816-timer";
	309	reg = <0x48040000 0x2000>;
	310	interrupts = <68>;
	311	ti,hwmods = "timer2";
	312	};
	313
	314	timer3: timer@48042000 {
	315	compatible = "ti,dm816-timer";
	316	reg = <0x48042000 0x2000>;
	317	interrupts = <69>;
	318	ti,hwmods = "timer3";
	319	};
	320
	321	timer4: timer@48044000 {
	322	compatible = "ti,dm816-timer";
	323	reg = <0x48044000 0x2000>;
	324	interrupts = <92>;
	325	ti,hwmods = "timer4";
	326	};
	327
	328	timer5: timer@48046000 {
	329	compatible = "ti,dm816-timer";
	330	reg = <0x48046000 0x2000>;
	331	interrupts = <93>;
	332	ti,hwmods = "timer5";
	333	};
	334
	335	timer6: timer@48048000 {
	336	compatible = "ti,dm816-timer";
	337	reg = <0x48048000 0x2000>;
	338	interrupts = <94>;
	339	ti,hwmods = "timer6";
	340	};
	341
	342	timer7: timer@4804a000 {
	343	compatible = "ti,dm816-timer";
	344	reg = <0x4804a000 0x2000>;
	345	interrupts = <95>;
	346	ti,hwmods = "timer7";
	347	};
	348
	349	uart1: uart@48020000 {
	350	compatible = "ti,omap3-uart";
	351	ti,hwmods = "uart1";
352	reg = <0x48020000 0x2000>;
353	clock-frequency = <48000000>;
354	interrupts = <72>;
355	dmas = <&edma 26 &edma 27>;
356	dma-names = "tx", "rx";
357	};
358
359	uart2: uart@48022000 {
360	compatible = "ti,omap3-uart";
361	ti,hwmods = "uart2";
362	reg = <0x48022000 0x2000>;
363	clock-frequency = <48000000>;
364	interrupts = <73>;
365	dmas = <&edma 28 &edma 29>;
366	dma-names = "tx", "rx";
367	};
368
369	uart3: uart@48024000 {
370	compatible = "ti,omap3-uart";
371	ti,hwmods = "uart3";
372	reg = <0x48024000 0x2000>;
373	clock-frequency = <48000000>;
374	interrupts = <74>;
375	dmas = <&edma 30 &edma 31>;
376	dma-names = "tx", "rx";
377	};
378
379	/* NOTE: USB needs a transceiver driver for phys to work */
380	usb: usb_otg_hs@47401000 {
381	compatible = "ti,am33xx-usb";
382	reg = <0x47401000 0x400000>;
383	ranges;
384	#address-cells = <1>;
385	#size-cells = <1>;
386	ti,hwmods = "usb_otg_hs";
387
388	usb0: usb@47401000 {
1b205c53	389	compatible = "ti,musb-dm816";
7800064b TL	390	reg = <0x47401400 0x400
	391	0x47401000 0x200>;
	392	reg-names = "mc", "control";
	393	interrupts = <18>;
	394	interrupt-names = "mc";
a54879a0 TL	395	dr_mode = "host";
	396	interface-type = <0>;
	397	phys = <&usb_phy0>;
	398	phy-names = "usb2-phy";
7800064b TL	399	mentor,multipoint = <1>;
	400	mentor,num-eps = <16>;
	401	mentor,ram-bits = <12>;
	402	mentor,power = <500>;
de1a1221 TL	403
	404	dmas = <&cppi41dma 0 0 &cppi41dma 1 0
	405	&cppi41dma 2 0 &cppi41dma 3 0
	406	&cppi41dma 4 0 &cppi41dma 5 0
	407	&cppi41dma 6 0 &cppi41dma 7 0
	408	&cppi41dma 8 0 &cppi41dma 9 0
	409	&cppi41dma 10 0 &cppi41dma 11 0
	410	&cppi41dma 12 0 &cppi41dma 13 0
	411	&cppi41dma 14 0 &cppi41dma 0 1
	412	&cppi41dma 1 1 &cppi41dma 2 1
	413	&cppi41dma 3 1 &cppi41dma 4 1
	414	&cppi41dma 5 1 &cppi41dma 6 1
	415	&cppi41dma 7 1 &cppi41dma 8 1
	416	&cppi41dma 9 1 &cppi41dma 10 1
	417	&cppi41dma 11 1 &cppi41dma 12 1
	418	&cppi41dma 13 1 &cppi41dma 14 1>;
	419	dma-names =
	420	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	421	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	422	"rx14", "rx15",
	423	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	424	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	425	"tx14", "tx15";
7800064b TL	426	};
	427
	428	usb1: usb@47401800 {
1b205c53	429	compatible = "ti,musb-dm816";
7800064b TL	430	reg = <0x47401c00 0x400
	431	0x47401800 0x200>;
	432	reg-names = "mc", "control";
	433	interrupts = <19>;
	434	interrupt-names = "mc";
a54879a0 TL	435	dr_mode = "host";
	436	interface-type = <0>;
	437	phys = <&usb_phy1>;
	438	phy-names = "usb2-phy";
7800064b TL	439	mentor,multipoint = <1>;
	440	mentor,num-eps = <16>;
	441	mentor,ram-bits = <12>;
	442	mentor,power = <500>;
de1a1221 TL	443
	444	dmas = <&cppi41dma 15 0 &cppi41dma 16 0
	445	&cppi41dma 17 0 &cppi41dma 18 0
	446	&cppi41dma 19 0 &cppi41dma 20 0
	447	&cppi41dma 21 0 &cppi41dma 22 0
	448	&cppi41dma 23 0 &cppi41dma 24 0
	449	&cppi41dma 25 0 &cppi41dma 26 0
	450	&cppi41dma 27 0 &cppi41dma 28 0
	451	&cppi41dma 29 0 &cppi41dma 15 1
	452	&cppi41dma 16 1 &cppi41dma 17 1
	453	&cppi41dma 18 1 &cppi41dma 19 1
	454	&cppi41dma 20 1 &cppi41dma 21 1
	455	&cppi41dma 22 1 &cppi41dma 23 1
	456	&cppi41dma 24 1 &cppi41dma 25 1
	457	&cppi41dma 26 1 &cppi41dma 27 1
	458	&cppi41dma 28 1 &cppi41dma 29 1>;
	459	dma-names =
	460	"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
	461	"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
	462	"rx14", "rx15",
	463	"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
	464	"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
	465	"tx14", "tx15";
	466	};
	467
	468	cppi41dma: dma-controller@47402000 {
	469	compatible = "ti,am3359-cppi41";
	470	reg = <0x47400000 0x1000
	471	0x47402000 0x1000
	472	0x47403000 0x1000
	473	0x47404000 0x4000>;
	474	reg-names = "glue", "controller", "scheduler", "queuemgr";
	475	interrupts = <17>;
	476	interrupt-names = "glue";
	477	#dma-cells = <2>;
	478	#dma-channels = <30>;
	479	#dma-requests = <256>;
7800064b TL	480	};
	481	};
	482
	483	wd_timer2: wd_timer@480c2000 {
	484	compatible = "ti,omap3-wdt";
	485	ti,hwmods = "wd_timer";
	486	reg = <0x480c2000 0x1000>;
	487	interrupts = <0>;
	488	};
	489	};
	490	};
	491
7383ca92	492	#include "dm816x-clocks.dtsi"