projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 38b248db RN |
1 | /* |
| 2 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 as | |
| 6 | * published by the Free Software Foundation. | |
| 7 | * Based on "omap4.dtsi" | |
| 8 | */ | |
| 9 | ||
| 10 | #include "dra7.dtsi" | |
| 11 | ||
| 12 | / { | |
| 13 | compatible = "ti,dra742", "ti,dra74", "ti,dra7"; | |
| 14 | ||
| 15 | cpus { | |
| 16 | #address-cells = <1>; | |
| 17 | #size-cells = <0>; | |
| 18 | ||
| 19 | cpu0: cpu@0 { | |
| 20 | device_type = "cpu"; | |
| 21 | compatible = "arm,cortex-a15"; | |
| 22 | reg = <0>; | |
| 23 | ||
| 24 | operating-points = < | |
| 25 | /* kHz uV */ | |
| 26 | 1000000 1060000 | |
| 27 | 1176000 1160000 | |
| 28 | >; | |
| 29 | ||
| 30 | clocks = <&dpll_mpu_ck>; | |
| 31 | clock-names = "cpu"; | |
| 32 | ||
| 33 | clock-latency = <300000>; /* From omap-cpufreq driver */ | |
| f7397edf K |
34 | |
| 35 | /* cooling options */ | |
| 36 | cooling-min-level = <0>; | |
| 37 | cooling-max-level = <2>; | |
| 38 | #cooling-cells = <2>; /* min followed by max */ | |
| 38b248db RN |
39 | }; |
| 40 | cpu@1 { | |
| 41 | device_type = "cpu"; | |
| 42 | compatible = "arm,cortex-a15"; | |
| 43 | reg = <1>; | |
| 44 | }; | |
| 45 | }; | |
| f53e3c53 LW |
46 | |
| 47 | pmu { | |
| 48 | compatible = "arm,cortex-a15-pmu"; | |
| 7136d457 | 49 | interrupt-parent = <&wakeupgen>; |
| 783d3186 MZ |
50 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, |
| 51 | <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; | |
| f53e3c53 | 52 | }; |
| 6b14eb47 RQ |
53 | |
| 54 | ocp { | |
| bddbe6db SA |
55 | dsp2_system: dsp_system@41500000 { |
| 56 | compatible = "syscon"; | |
| 57 | reg = <0x41500000 0x100>; | |
| 58 | }; | |
| 59 | ||
| 4f6dec70 | 60 | omap_dwc3_4: omap_dwc3_4@48940000 { |
| 6b14eb47 RQ |
61 | compatible = "ti,dwc3"; |
| 62 | ti,hwmods = "usb_otg_ss4"; | |
| 63 | reg = <0x48940000 0x10000>; | |
| 64 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; | |
| 65 | #address-cells = <1>; | |
| 66 | #size-cells = <1>; | |
| 67 | utmi-mode = <2>; | |
| 68 | ranges; | |
| 69 | status = "disabled"; | |
| 70 | usb4: usb@48950000 { | |
| 71 | compatible = "snps,dwc3"; | |
| 72 | reg = <0x48950000 0x17000>; | |
| 964927f3 RQ |
73 | interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, |
| 74 | <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, | |
| 75 | <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>; | |
| 76 | interrupt-names = "peripheral", | |
| 77 | "host", | |
| 78 | "otg"; | |
| 6b14eb47 RQ |
79 | tx-fifo-resize; |
| 80 | maximum-speed = "high-speed"; | |
| 81 | dr_mode = "otg"; | |
| 82 | }; | |
| 83 | }; | |
| 84 | }; | |
| 38b248db | 85 | }; |
| 95c1cd13 TV |
86 | |
| 87 | &dss { | |
| 88 | reg = <0x58000000 0x80>, | |
| 89 | <0x58004054 0x4>, | |
| 90 | <0x58004300 0x20>, | |
| 91 | <0x58005054 0x4>, | |
| 92 | <0x58005300 0x20>; | |
| 93 | reg-names = "dss", "pll1_clkctrl", "pll1", | |
| 94 | "pll2_clkctrl", "pll2"; | |
| 95 | ||
| 96 | clocks = <&dss_dss_clk>, | |
| 97 | <&dss_video1_clk>, | |
| 98 | <&dss_video2_clk>; | |
| 99 | clock-names = "fck", "video1_clk", "video2_clk"; | |
| 100 | }; | |
| a9c8f117 SA |
101 | |
| 102 | &mailbox5 { | |
| 103 | mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { | |
| 104 | ti,mbox-tx = <6 2 2>; | |
| 105 | ti,mbox-rx = <4 2 2>; | |
| 106 | status = "disabled"; | |
| 107 | }; | |
| 108 | mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { | |
| 109 | ti,mbox-tx = <5 2 2>; | |
| 110 | ti,mbox-rx = <1 2 2>; | |
| 111 | status = "disabled"; | |
| 112 | }; | |
| 113 | }; | |
| 114 | ||
| 115 | &mailbox6 { | |
| 116 | mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { | |
| 117 | ti,mbox-tx = <6 2 2>; | |
| 118 | ti,mbox-rx = <4 2 2>; | |
| 119 | status = "disabled"; | |
| 120 | }; | |
| 121 | mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { | |
| 122 | ti,mbox-tx = <5 2 2>; | |
| 123 | ti,mbox-rx = <1 2 2>; | |
| 124 | status = "disabled"; | |
| 125 | }; | |
| 126 | }; |