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ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series
[deliverable/linux.git] / arch / arm / boot / dts / exynos4.dtsi
CommitLineData
b571abb3
TF		 1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22/include/ "skeleton.dtsi"
23
24/ {
25 interrupt-parent = <&gic>;
26
27 aliases {
28 spi0 = &spi_0;
29 spi1 = &spi_1;
30 spi2 = &spi_2;
34db4990
DA		 31 i2c0 = &i2c_0;
32 i2c1 = &i2c_1;
33 i2c2 = &i2c_2;
34 i2c3 = &i2c_3;
35 i2c4 = &i2c_4;
36 i2c5 = &i2c_5;
37 i2c6 = &i2c_6;
38 i2c7 = &i2c_7;
b571abb3
TF		 39 };
40
91d88f03
TF		 41 pd_mfc: mfc-power-domain@10023C40 {
42 compatible = "samsung,exynos4210-pd";
43 reg = <0x10023C40 0x20>;
44 };
45
46 pd_g3d: g3d-power-domain@10023C60 {
47 compatible = "samsung,exynos4210-pd";
48 reg = <0x10023C60 0x20>;
49 };
50
51 pd_lcd0: lcd0-power-domain@10023C80 {
52 compatible = "samsung,exynos4210-pd";
53 reg = <0x10023C80 0x20>;
54 };
55
56 pd_tv: tv-power-domain@10023C20 {
57 compatible = "samsung,exynos4210-pd";
58 reg = <0x10023C20 0x20>;
59 };
60
61 pd_cam: cam-power-domain@10023C00 {
62 compatible = "samsung,exynos4210-pd";
63 reg = <0x10023C00 0x20>;
64 };
65
66 pd_gps: gps-power-domain@10023CE0 {
67 compatible = "samsung,exynos4210-pd";
68 reg = <0x10023CE0 0x20>;
b571abb3
TF		 69 };
70
71 gic:interrupt-controller@10490000 {
72 compatible = "arm,cortex-a9-gic";
73 #interrupt-cells = <3>;
74 interrupt-controller;
75 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
76 };
77
78 combiner:interrupt-controller@10440000 {
79 compatible = "samsung,exynos4210-combiner";
80 #interrupt-cells = <2>;
81 interrupt-controller;
82 reg = <0x10440000 0x1000>;
83 };
84
a64b1b22
SN		 85 sys_reg: sysreg {
86 compatible = "samsung,exynos4-sysreg", "syscon";
87 reg = <0x10010000 0x400>;
88 };
89
b571abb3
TF		 90 watchdog@10060000 {
91 compatible = "samsung,s3c2410-wdt";
92 reg = <0x10060000 0x100>;
93 interrupts = <0 43 0>;
7ad34337
TA		 94 clocks = <&clock 345>;
95 clock-names = "watchdog";
c9e23f00 96 status = "disabled";
b571abb3
TF		 97 };
98
99 rtc@10070000 {
100 compatible = "samsung,s3c6410-rtc";
101 reg = <0x10070000 0x100>;
102 interrupts = <0 44 0>, <0 45 0>;
7ad34337
TA		 103 clocks = <&clock 346>;
104 clock-names = "rtc";
c9e23f00 105 status = "disabled";
b571abb3
TF		 106 };
107
108 keypad@100A0000 {
109 compatible = "samsung,s5pv210-keypad";
110 reg = <0x100A0000 0x100>;
111 interrupts = <0 109 0>;
7ad34337
TA		 112 clocks = <&clock 347>;
113 clock-names = "keypad";
c9e23f00 114 status = "disabled";
b571abb3
TF		 115 };
116
117 sdhci@12510000 {
118 compatible = "samsung,exynos4210-sdhci";
119 reg = <0x12510000 0x100>;
120 interrupts = <0 73 0>;
7ad34337
TA		 121 clocks = <&clock 297>, <&clock 145>;
122 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 123 status = "disabled";
b571abb3
TF		 124 };
125
126 sdhci@12520000 {
127 compatible = "samsung,exynos4210-sdhci";
128 reg = <0x12520000 0x100>;
129 interrupts = <0 74 0>;
7ad34337
TA		 130 clocks = <&clock 298>, <&clock 146>;
131 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 132 status = "disabled";
b571abb3
TF		 133 };
134
135 sdhci@12530000 {
136 compatible = "samsung,exynos4210-sdhci";
137 reg = <0x12530000 0x100>;
138 interrupts = <0 75 0>;
7ad34337
TA		 139 clocks = <&clock 299>, <&clock 147>;
140 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 141 status = "disabled";
b571abb3
TF		 142 };
143
144 sdhci@12540000 {
145 compatible = "samsung,exynos4210-sdhci";
146 reg = <0x12540000 0x100>;
147 interrupts = <0 76 0>;
7ad34337
TA		 148 clocks = <&clock 300>, <&clock 148>;
149 clock-names = "hsmmc", "mmc_busclk.2";
c9e23f00 150 status = "disabled";
b571abb3
TF		 151 };
152
20901f74
SK		 153 mfc: codec@13400000 {
154 compatible = "samsung,mfc-v5";
155 reg = <0x13400000 0x10000>;
156 interrupts = <0 94 0>;
157 samsung,power-domain = <&pd_mfc>;
158 status = "disabled";
159 };
160
b571abb3
TF		 161 serial@13800000 {
162 compatible = "samsung,exynos4210-uart";
163 reg = <0x13800000 0x100>;
164 interrupts = <0 52 0>;
7ad34337
TA		 165 clocks = <&clock 312>, <&clock 151>;
166 clock-names = "uart", "clk_uart_baud0";
c9e23f00 167 status = "disabled";
b571abb3
TF		 168 };
169
170 serial@13810000 {
171 compatible = "samsung,exynos4210-uart";
172 reg = <0x13810000 0x100>;
173 interrupts = <0 53 0>;
7ad34337
TA		 174 clocks = <&clock 313>, <&clock 152>;
175 clock-names = "uart", "clk_uart_baud0";
c9e23f00 176 status = "disabled";
b571abb3
TF		 177 };
178
179 serial@13820000 {
180 compatible = "samsung,exynos4210-uart";
181 reg = <0x13820000 0x100>;
182 interrupts = <0 54 0>;
7ad34337
TA		 183 clocks = <&clock 314>, <&clock 153>;
184 clock-names = "uart", "clk_uart_baud0";
c9e23f00 185 status = "disabled";
b571abb3
TF		 186 };
187
188 serial@13830000 {
189 compatible = "samsung,exynos4210-uart";
190 reg = <0x13830000 0x100>;
191 interrupts = <0 55 0>;
7ad34337
TA		 192 clocks = <&clock 315>, <&clock 154>;
193 clock-names = "uart", "clk_uart_baud0";
c9e23f00 194 status = "disabled";
b571abb3
TF		 195 };
196
34db4990 197 i2c_0: i2c@13860000 {
1b198d56
TF		 198 #address-cells = <1>;
199 #size-cells = <0>;
b571abb3
TF		 200 compatible = "samsung,s3c2440-i2c";
201 reg = <0x13860000 0x100>;
202 interrupts = <0 58 0>;
7ad34337
TA		 203 clocks = <&clock 317>;
204 clock-names = "i2c";
045c8f63
TA		 205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c0_bus>;
c9e23f00 207 status = "disabled";
b571abb3
TF		 208 };
209
34db4990 210 i2c_1: i2c@13870000 {
1b198d56
TF		 211 #address-cells = <1>;
212 #size-cells = <0>;
b571abb3
TF		 213 compatible = "samsung,s3c2440-i2c";
214 reg = <0x13870000 0x100>;
215 interrupts = <0 59 0>;
7ad34337
TA		 216 clocks = <&clock 318>;
217 clock-names = "i2c";
045c8f63
TA		 218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c1_bus>;
c9e23f00 220 status = "disabled";
b571abb3
TF		 221 };
222
34db4990 223 i2c_2: i2c@13880000 {
1b198d56
TF		 224 #address-cells = <1>;
225 #size-cells = <0>;
b571abb3
TF		 226 compatible = "samsung,s3c2440-i2c";
227 reg = <0x13880000 0x100>;
228 interrupts = <0 60 0>;
7ad34337
TA		 229 clocks = <&clock 319>;
230 clock-names = "i2c";
c9e23f00 231 status = "disabled";
b571abb3
TF		 232 };
233
34db4990 234 i2c_3: i2c@13890000 {
1b198d56
TF		 235 #address-cells = <1>;
236 #size-cells = <0>;
b571abb3
TF		 237 compatible = "samsung,s3c2440-i2c";
238 reg = <0x13890000 0x100>;
239 interrupts = <0 61 0>;
7ad34337
TA		 240 clocks = <&clock 320>;
241 clock-names = "i2c";
c9e23f00 242 status = "disabled";
b571abb3
TF		 243 };
244
34db4990 245 i2c_4: i2c@138A0000 {
1b198d56
TF		 246 #address-cells = <1>;
247 #size-cells = <0>;
b571abb3
TF		 248 compatible = "samsung,s3c2440-i2c";
249 reg = <0x138A0000 0x100>;
250 interrupts = <0 62 0>;
7ad34337
TA		 251 clocks = <&clock 321>;
252 clock-names = "i2c";
c9e23f00 253 status = "disabled";
b571abb3
TF		 254 };
255
34db4990 256 i2c_5: i2c@138B0000 {
1b198d56
TF		 257 #address-cells = <1>;
258 #size-cells = <0>;
b571abb3
TF		 259 compatible = "samsung,s3c2440-i2c";
260 reg = <0x138B0000 0x100>;
261 interrupts = <0 63 0>;
7ad34337
TA		 262 clocks = <&clock 322>;
263 clock-names = "i2c";
c9e23f00 264 status = "disabled";
b571abb3
TF		 265 };
266
34db4990 267 i2c_6: i2c@138C0000 {
1b198d56
TF		 268 #address-cells = <1>;
269 #size-cells = <0>;
b571abb3
TF		 270 compatible = "samsung,s3c2440-i2c";
271 reg = <0x138C0000 0x100>;
272 interrupts = <0 64 0>;
7ad34337
TA		 273 clocks = <&clock 323>;
274 clock-names = "i2c";
c9e23f00 275 status = "disabled";
b571abb3
TF		 276 };
277
34db4990 278 i2c_7: i2c@138D0000 {
1b198d56
TF		 279 #address-cells = <1>;
280 #size-cells = <0>;
b571abb3
TF		 281 compatible = "samsung,s3c2440-i2c";
282 reg = <0x138D0000 0x100>;
283 interrupts = <0 65 0>;
7ad34337
TA		 284 clocks = <&clock 324>;
285 clock-names = "i2c";
c9e23f00 286 status = "disabled";
b571abb3
TF		 287 };
288
289 spi_0: spi@13920000 {
290 compatible = "samsung,exynos4210-spi";
291 reg = <0x13920000 0x100>;
292 interrupts = <0 66 0>;
293 tx-dma-channel = <&pdma0 7>; /* preliminary */
294 rx-dma-channel = <&pdma0 6>; /* preliminary */
295 #address-cells = <1>;
296 #size-cells = <0>;
7ad34337
TA		 297 clocks = <&clock 327>, <&clock 159>;
298 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 299 pinctrl-names = "default";
300 pinctrl-0 = <&spi0_bus>;
c9e23f00 301 status = "disabled";
b571abb3
TF		 302 };
303
304 spi_1: spi@13930000 {
305 compatible = "samsung,exynos4210-spi";
306 reg = <0x13930000 0x100>;
307 interrupts = <0 67 0>;
308 tx-dma-channel = <&pdma1 7>; /* preliminary */
309 rx-dma-channel = <&pdma1 6>; /* preliminary */
310 #address-cells = <1>;
311 #size-cells = <0>;
7ad34337
TA		 312 clocks = <&clock 328>, <&clock 160>;
313 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 314 pinctrl-names = "default";
315 pinctrl-0 = <&spi1_bus>;
c9e23f00 316 status = "disabled";
b571abb3
TF		 317 };
318
319 spi_2: spi@13940000 {
320 compatible = "samsung,exynos4210-spi";
321 reg = <0x13940000 0x100>;
322 interrupts = <0 68 0>;
323 tx-dma-channel = <&pdma0 9>; /* preliminary */
324 rx-dma-channel = <&pdma0 8>; /* preliminary */
325 #address-cells = <1>;
326 #size-cells = <0>;
7ad34337
TA		 327 clocks = <&clock 329>, <&clock 161>;
328 clock-names = "spi", "spi_busclk0";
045c8f63
TA		 329 pinctrl-names = "default";
330 pinctrl-0 = <&spi2_bus>;
c9e23f00 331 status = "disabled";
b571abb3
TF		 332 };
333
334 amba {
335 #address-cells = <1>;
336 #size-cells = <1>;
337 compatible = "arm,amba-bus";
338 interrupt-parent = <&gic>;
339 ranges;
340
341 pdma0: pdma@12680000 {
342 compatible = "arm,pl330", "arm,primecell";
343 reg = <0x12680000 0x1000>;
344 interrupts = <0 35 0>;
7ad34337
TA		 345 clocks = <&clock 292>;
346 clock-names = "apb_pclk";
0a96d4d3
PV		 347 #dma-cells = <1>;
348 #dma-channels = <8>;
349 #dma-requests = <32>;
b571abb3
TF		 350 };
351
352 pdma1: pdma@12690000 {
353 compatible = "arm,pl330", "arm,primecell";
354 reg = <0x12690000 0x1000>;
355 interrupts = <0 36 0>;
7ad34337
TA		 356 clocks = <&clock 293>;
357 clock-names = "apb_pclk";
0a96d4d3
PV		 358 #dma-cells = <1>;
359 #dma-channels = <8>;
360 #dma-requests = <32>;
b571abb3 361 };
f7e758af
BZ		 362
363 mdma1: mdma@12850000 {
364 compatible = "arm,pl330", "arm,primecell";
365 reg = <0x12850000 0x1000>;
366 interrupts = <0 34 0>;
7ad34337
TA		 367 clocks = <&clock 279>;
368 clock-names = "apb_pclk";
0a96d4d3
PV		 369 #dma-cells = <1>;
370 #dma-channels = <8>;
371 #dma-requests = <1>;
f7e758af 372 };
b571abb3
TF		 373 };
374};
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