projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0561ceab TA |
1 | /* |
| 2 | * Samsung's Exynos4210 SoC device tree source | |
| 3 | * | |
| 4 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
| 5 | * http://www.samsung.com | |
| 6 | * Copyright (c) 2010-2011 Linaro Ltd. | |
| 7 | * www.linaro.org | |
| 8 | * | |
| 9 | * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210 | |
| 10 | * based board files can include this file and provide values for board specfic | |
| 11 | * bindings. | |
| 12 | * | |
| 13 | * Note: This file does not include device nodes for all the controllers in | |
| 14 | * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional | |
| 15 | * nodes can be added to this file. | |
| 16 | * | |
| 17 | * This program is free software; you can redistribute it and/or modify | |
| 18 | * it under the terms of the GNU General Public License version 2 as | |
| 19 | * published by the Free Software Foundation. | |
| 20 | */ | |
| 21 | ||
| b571abb3 | 22 | /include/ "exynos4.dtsi" |
| 87711d8c | 23 | /include/ "exynos4210-pinctrl.dtsi" |
| 0561ceab TA |
24 | |
| 25 | / { | |
| 26 | compatible = "samsung,exynos4210"; | |
| 0561ceab | 27 | |
| 4980c39b | 28 | aliases { |
| 87711d8c TA |
29 | pinctrl0 = &pinctrl_0; |
| 30 | pinctrl1 = &pinctrl_1; | |
| 31 | pinctrl2 = &pinctrl_2; | |
| 4980c39b TA |
32 | }; |
| 33 | ||
| 91d88f03 TF |
34 | pd_lcd1: lcd1-power-domain@10023CA0 { |
| 35 | compatible = "samsung,exynos4210-pd"; | |
| 36 | reg = <0x10023CA0 0x20>; | |
| 37 | }; | |
| 38 | ||
| 0561ceab | 39 | gic:interrupt-controller@10490000 { |
| da911782 | 40 | cpu-offset = <0x8000>; |
| 0561ceab TA |
41 | }; |
| 42 | ||
| 4922972e | 43 | combiner:interrupt-controller@10440000 { |
| 4922972e TA |
44 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, |
| 45 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | |
| 46 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | |
| 47 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; | |
| 48 | }; | |
| 49 | ||
| bbd9700a TA |
50 | mct@10050000 { |
| 51 | compatible = "samsung,exynos4210-mct"; | |
| 52 | reg = <0x10050000 0x800>; | |
| 53 | interrupt-controller; | |
| 54 | #interrups-cells = <2>; | |
| 55 | interrupt-parent = <&mct_map>; | |
| 56 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, | |
| 57 | <4 0>, <5 0>; | |
| 7ad34337 TA |
58 | clocks = <&clock 3>, <&clock 344>; |
| 59 | clock-names = "fin_pll", "mct"; | |
| bbd9700a TA |
60 | |
| 61 | mct_map: mct-map { | |
| 62 | #interrupt-cells = <2>; | |
| 63 | #address-cells = <0>; | |
| 64 | #size-cells = <0>; | |
| 65 | interrupt-map = <0x0 0 &gic 0 57 0>, | |
| 66 | <0x1 0 &gic 0 69 0>, | |
| 67 | <0x2 0 &combiner 12 6>, | |
| 68 | <0x3 0 &combiner 12 7>, | |
| 69 | <0x4 0 &gic 0 42 0>, | |
| 70 | <0x5 0 &gic 0 48 0>; | |
| 71 | }; | |
| 72 | }; | |
| 73 | ||
| d8bafc87 TA |
74 | clock: clock-controller@0x10030000 { |
| 75 | compatible = "samsung,exynos4210-clock"; | |
| 76 | reg = <0x10030000 0x20000>; | |
| 77 | #clock-cells = <1>; | |
| 78 | }; | |
| 79 | ||
| db35234e CP |
80 | pmu { |
| 81 | compatible = "arm,cortex-a9-pmu"; | |
| 82 | interrupt-parent = <&combiner>; | |
| 83 | interrupts = <2 2>, <3 2>; | |
| 84 | }; | |
| 85 | ||
| 87711d8c | 86 | pinctrl_0: pinctrl@11400000 { |
| b533c868 | 87 | compatible = "samsung,exynos4210-pinctrl"; |
| 87711d8c TA |
88 | reg = <0x11400000 0x1000>; |
| 89 | interrupts = <0 47 0>; | |
| 87711d8c TA |
90 | }; |
| 91 | ||
| 92 | pinctrl_1: pinctrl@11000000 { | |
| b533c868 | 93 | compatible = "samsung,exynos4210-pinctrl"; |
| 87711d8c TA |
94 | reg = <0x11000000 0x1000>; |
| 95 | interrupts = <0 46 0>; | |
| 87711d8c TA |
96 | |
| 97 | wakup_eint: wakeup-interrupt-controller { | |
| 98 | compatible = "samsung,exynos4210-wakeup-eint"; | |
| 99 | interrupt-parent = <&gic>; | |
| a04b07c0 | 100 | interrupts = <0 32 0>; |
| 87711d8c TA |
101 | }; |
| 102 | }; | |
| 103 | ||
| 104 | pinctrl_2: pinctrl@03860000 { | |
| b533c868 | 105 | compatible = "samsung,exynos4210-pinctrl"; |
| 87711d8c TA |
106 | reg = <0x03860000 0x1000>; |
| 107 | }; | |
| 108 | ||
| 8d4155db ADK |
109 | tmu@100C0000 { |
| 110 | compatible = "samsung,exynos4210-tmu"; | |
| 111 | interrupt-parent = <&combiner>; | |
| 112 | reg = <0x100C0000 0x100>; | |
| 113 | interrupts = <2 4>; | |
| 114 | }; | |
| 0561ceab | 115 | }; |