projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 0f7238a1 TF |
1 | /* |
| 2 | * Samsung's Exynos4x12 SoCs device tree source | |
| 3 | * | |
| 4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
| 5 | * http://www.samsung.com | |
| 6 | * | |
| 7 | * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12 | |
| 8 | * based board files can include this file and provide values for board specfic | |
| 9 | * bindings. | |
| 10 | * | |
| 11 | * Note: This file does not include device nodes for all the controllers in | |
| 12 | * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional | |
| 13 | * nodes can be added to this file. | |
| 14 | * | |
| 15 | * This program is free software; you can redistribute it and/or modify | |
| 16 | * it under the terms of the GNU General Public License version 2 as | |
| 17 | * published by the Free Software Foundation. | |
| 18 | */ | |
| 19 | ||
| 3799279f PV |
20 | #include "exynos4.dtsi" |
| 21 | #include "exynos4x12-pinctrl.dtsi" | |
| 0f7238a1 TF |
22 | |
| 23 | / { | |
| 64a57434 TF |
24 | aliases { |
| 25 | pinctrl0 = &pinctrl_0; | |
| 26 | pinctrl1 = &pinctrl_1; | |
| 27 | pinctrl2 = &pinctrl_2; | |
| 28 | pinctrl3 = &pinctrl_3; | |
| 29 | }; | |
| 30 | ||
| d8bafc87 TA |
31 | clock: clock-controller@0x10030000 { |
| 32 | compatible = "samsung,exynos4412-clock"; | |
| 33 | reg = <0x10030000 0x20000>; | |
| 34 | #clock-cells = <1>; | |
| 35 | }; | |
| 36 | ||
| 64a57434 | 37 | pinctrl_0: pinctrl@11400000 { |
| b533c868 | 38 | compatible = "samsung,exynos4x12-pinctrl"; |
| 64a57434 TF |
39 | reg = <0x11400000 0x1000>; |
| 40 | interrupts = <0 47 0>; | |
| 41 | }; | |
| 42 | ||
| 43 | pinctrl_1: pinctrl@11000000 { | |
| b533c868 | 44 | compatible = "samsung,exynos4x12-pinctrl"; |
| 64a57434 TF |
45 | reg = <0x11000000 0x1000>; |
| 46 | interrupts = <0 46 0>; | |
| 47 | ||
| 48 | wakup_eint: wakeup-interrupt-controller { | |
| 49 | compatible = "samsung,exynos4210-wakeup-eint"; | |
| 50 | interrupt-parent = <&gic>; | |
| 51 | interrupts = <0 32 0>; | |
| 52 | }; | |
| 53 | }; | |
| 54 | ||
| 55 | pinctrl_2: pinctrl@03860000 { | |
| b533c868 | 56 | compatible = "samsung,exynos4x12-pinctrl"; |
| 64a57434 TF |
57 | reg = <0x03860000 0x1000>; |
| 58 | interrupt-parent = <&combiner>; | |
| 59 | interrupts = <10 0>; | |
| 60 | }; | |
| 61 | ||
| 62 | pinctrl_3: pinctrl@106E0000 { | |
| b533c868 | 63 | compatible = "samsung,exynos4x12-pinctrl"; |
| 64a57434 TF |
64 | reg = <0x106E0000 0x1000>; |
| 65 | interrupts = <0 72 0>; | |
| 66 | }; | |
| 3a0d48f6 SK |
67 | |
| 68 | g2d@10800000 { | |
| 69 | compatible = "samsung,exynos4212-g2d"; | |
| 70 | reg = <0x10800000 0x1000>; | |
| 71 | interrupts = <0 89 0>; | |
| cfc5652d SK |
72 | clocks = <&clock 177>, <&clock 277>; |
| 73 | clock-names = "sclk_fimg2d", "fimg2d"; | |
| 3a0d48f6 SK |
74 | status = "disabled"; |
| 75 | }; | |
| 0f7238a1 | 76 | }; |