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b074abb7 KK |
1 | /* |
2 | * SAMSUNG EXYNOS5250 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file. | |
8 | * EXYNOS5250 based board files can include this file and provide | |
9 | * values for board specfic bindings. | |
10 | * | |
11 | * Note: This file does not include device nodes for all the controllers in | |
12 | * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases, | |
13 | * additional nodes can be added to this file. | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | */ | |
19 | ||
e6c21cba | 20 | #include "exynos5.dtsi" |
3799279f | 21 | #include "exynos5250-pinctrl.dtsi" |
b074abb7 | 22 | |
916ec47e | 23 | #include <dt-bindings/clk/exynos-audss-clk.h> |
b074abb7 KK |
24 | |
25 | / { | |
26 | compatible = "samsung,exynos5250"; | |
b074abb7 | 27 | |
79989ba3 TA |
28 | aliases { |
29 | spi0 = &spi_0; | |
30 | spi1 = &spi_1; | |
31 | spi2 = &spi_2; | |
1128658a SAB |
32 | gsc0 = &gsc_0; |
33 | gsc1 = &gsc_1; | |
34 | gsc2 = &gsc_2; | |
35 | gsc3 = &gsc_3; | |
de0f42be DA |
36 | mshc0 = &dwmmc_0; |
37 | mshc1 = &dwmmc_1; | |
38 | mshc2 = &dwmmc_2; | |
39 | mshc3 = &dwmmc_3; | |
b9fa3e7b AK |
40 | i2c0 = &i2c_0; |
41 | i2c1 = &i2c_1; | |
42 | i2c2 = &i2c_2; | |
43 | i2c3 = &i2c_3; | |
44 | i2c4 = &i2c_4; | |
45 | i2c5 = &i2c_5; | |
46 | i2c6 = &i2c_6; | |
47 | i2c7 = &i2c_7; | |
48 | i2c8 = &i2c_8; | |
f8bfe2b0 TA |
49 | pinctrl0 = &pinctrl_0; |
50 | pinctrl1 = &pinctrl_1; | |
51 | pinctrl2 = &pinctrl_2; | |
52 | pinctrl3 = &pinctrl_3; | |
79989ba3 TA |
53 | }; |
54 | ||
1897d2f3 CK |
55 | cpus { |
56 | #address-cells = <1>; | |
57 | #size-cells = <0>; | |
58 | ||
59 | cpu@0 { | |
60 | device_type = "cpu"; | |
61 | compatible = "arm,cortex-a15"; | |
62 | reg = <0>; | |
63 | }; | |
64 | cpu@1 { | |
65 | device_type = "cpu"; | |
66 | compatible = "arm,cortex-a15"; | |
67 | reg = <1>; | |
68 | }; | |
79989ba3 TA |
69 | }; |
70 | ||
6f9e95e6 PK |
71 | pd_gsc: gsc-power-domain@0x10044000 { |
72 | compatible = "samsung,exynos4210-pd"; | |
73 | reg = <0x10044000 0x20>; | |
74 | }; | |
75 | ||
76 | pd_mfc: mfc-power-domain@0x10044040 { | |
77 | compatible = "samsung,exynos4210-pd"; | |
78 | reg = <0x10044040 0x20>; | |
79 | }; | |
80 | ||
d8bafc87 TA |
81 | clock: clock-controller@0x10010000 { |
82 | compatible = "samsung,exynos5250-clock"; | |
83 | reg = <0x10010000 0x30000>; | |
84 | #clock-cells = <1>; | |
85 | }; | |
86 | ||
bba23d95 PV |
87 | clock_audss: audss-clock-controller@3810000 { |
88 | compatible = "samsung,exynos5250-audss-clock"; | |
89 | reg = <0x03810000 0x0C>; | |
90 | #clock-cells = <1>; | |
91 | }; | |
92 | ||
2b7da988 AG |
93 | timer { |
94 | compatible = "arm,armv7-timer"; | |
95 | interrupts = <1 13 0xf08>, | |
96 | <1 14 0xf08>, | |
97 | <1 11 0xf08>, | |
98 | <1 10 0xf08>; | |
b074abb7 KK |
99 | }; |
100 | ||
bbd9700a TA |
101 | mct@101C0000 { |
102 | compatible = "samsung,exynos4210-mct"; | |
103 | reg = <0x101C0000 0x800>; | |
104 | interrupt-controller; | |
105 | #interrups-cells = <2>; | |
106 | interrupt-parent = <&mct_map>; | |
107 | interrupts = <0 0>, <1 0>, <2 0>, <3 0>, | |
108 | <4 0>, <5 0>; | |
2de6847c TA |
109 | clocks = <&clock 1>, <&clock 335>; |
110 | clock-names = "fin_pll", "mct"; | |
bbd9700a TA |
111 | |
112 | mct_map: mct-map { | |
113 | #interrupt-cells = <2>; | |
114 | #address-cells = <0>; | |
115 | #size-cells = <0>; | |
116 | interrupt-map = <0x0 0 &combiner 23 3>, | |
117 | <0x1 0 &combiner 23 4>, | |
118 | <0x2 0 &combiner 25 2>, | |
119 | <0x3 0 &combiner 25 3>, | |
120 | <0x4 0 &gic 0 120 0>, | |
121 | <0x5 0 &gic 0 121 0>; | |
122 | }; | |
123 | }; | |
124 | ||
4f801e59 CP |
125 | pmu { |
126 | compatible = "arm,cortex-a15-pmu"; | |
127 | interrupt-parent = <&combiner>; | |
128 | interrupts = <1 2>, <22 4>; | |
129 | }; | |
130 | ||
f8bfe2b0 TA |
131 | pinctrl_0: pinctrl@11400000 { |
132 | compatible = "samsung,exynos5250-pinctrl"; | |
133 | reg = <0x11400000 0x1000>; | |
134 | interrupts = <0 46 0>; | |
135 | ||
136 | wakup_eint: wakeup-interrupt-controller { | |
137 | compatible = "samsung,exynos4210-wakeup-eint"; | |
138 | interrupt-parent = <&gic>; | |
139 | interrupts = <0 32 0>; | |
140 | }; | |
141 | }; | |
142 | ||
143 | pinctrl_1: pinctrl@13400000 { | |
144 | compatible = "samsung,exynos5250-pinctrl"; | |
145 | reg = <0x13400000 0x1000>; | |
146 | interrupts = <0 45 0>; | |
147 | }; | |
148 | ||
149 | pinctrl_2: pinctrl@10d10000 { | |
150 | compatible = "samsung,exynos5250-pinctrl"; | |
151 | reg = <0x10d10000 0x1000>; | |
152 | interrupts = <0 50 0>; | |
153 | }; | |
154 | ||
0abb6aea | 155 | pinctrl_3: pinctrl@03860000 { |
f8bfe2b0 | 156 | compatible = "samsung,exynos5250-pinctrl"; |
0abb6aea | 157 | reg = <0x03860000 0x1000>; |
f8bfe2b0 TA |
158 | interrupts = <0 47 0>; |
159 | }; | |
160 | ||
b074abb7 | 161 | watchdog { |
2de6847c TA |
162 | clocks = <&clock 336>; |
163 | clock-names = "watchdog"; | |
b074abb7 KK |
164 | }; |
165 | ||
2eae613b AK |
166 | codec@11000000 { |
167 | compatible = "samsung,mfc-v6"; | |
168 | reg = <0x11000000 0x10000>; | |
169 | interrupts = <0 96 0>; | |
6f9e95e6 | 170 | samsung,power-domain = <&pd_mfc>; |
2eae613b AK |
171 | }; |
172 | ||
b074abb7 | 173 | rtc { |
2de6847c TA |
174 | clocks = <&clock 337>; |
175 | clock-names = "rtc"; | |
b074abb7 KK |
176 | }; |
177 | ||
ef405e04 ADK |
178 | tmu@10060000 { |
179 | compatible = "samsung,exynos5250-tmu"; | |
180 | reg = <0x10060000 0x100>; | |
181 | interrupts = <0 65 0>; | |
2de6847c TA |
182 | clocks = <&clock 338>; |
183 | clock-names = "tmu_apbif"; | |
ef405e04 ADK |
184 | }; |
185 | ||
b074abb7 | 186 | serial@12C00000 { |
2de6847c TA |
187 | clocks = <&clock 289>, <&clock 146>; |
188 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
189 | }; |
190 | ||
191 | serial@12C10000 { | |
2de6847c TA |
192 | clocks = <&clock 290>, <&clock 147>; |
193 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
194 | }; |
195 | ||
196 | serial@12C20000 { | |
2de6847c TA |
197 | clocks = <&clock 291>, <&clock 148>; |
198 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
199 | }; |
200 | ||
201 | serial@12C30000 { | |
2de6847c TA |
202 | clocks = <&clock 292>, <&clock 149>; |
203 | clock-names = "uart", "clk_uart_baud0"; | |
b074abb7 KK |
204 | }; |
205 | ||
c47d244a VA |
206 | sata@122F0000 { |
207 | compatible = "samsung,exynos5-sata-ahci"; | |
208 | reg = <0x122F0000 0x1ff>; | |
209 | interrupts = <0 115 0>; | |
2de6847c TA |
210 | clocks = <&clock 277>, <&clock 143>; |
211 | clock-names = "sata", "sclk_sata"; | |
c47d244a VA |
212 | }; |
213 | ||
214 | sata-phy@12170000 { | |
215 | compatible = "samsung,exynos5-sata-phy"; | |
216 | reg = <0x12170000 0x1ff>; | |
217 | }; | |
218 | ||
b9fa3e7b | 219 | i2c_0: i2c@12C60000 { |
b074abb7 KK |
220 | compatible = "samsung,s3c2440-i2c"; |
221 | reg = <0x12C60000 0x100>; | |
222 | interrupts = <0 56 0>; | |
009f7c9f TA |
223 | #address-cells = <1>; |
224 | #size-cells = <0>; | |
2de6847c TA |
225 | clocks = <&clock 294>; |
226 | clock-names = "i2c"; | |
f8bfe2b0 TA |
227 | pinctrl-names = "default"; |
228 | pinctrl-0 = <&i2c0_bus>; | |
b074abb7 KK |
229 | }; |
230 | ||
b9fa3e7b | 231 | i2c_1: i2c@12C70000 { |
b074abb7 KK |
232 | compatible = "samsung,s3c2440-i2c"; |
233 | reg = <0x12C70000 0x100>; | |
234 | interrupts = <0 57 0>; | |
009f7c9f TA |
235 | #address-cells = <1>; |
236 | #size-cells = <0>; | |
2de6847c TA |
237 | clocks = <&clock 295>; |
238 | clock-names = "i2c"; | |
f8bfe2b0 TA |
239 | pinctrl-names = "default"; |
240 | pinctrl-0 = <&i2c1_bus>; | |
b074abb7 KK |
241 | }; |
242 | ||
b9fa3e7b | 243 | i2c_2: i2c@12C80000 { |
b074abb7 KK |
244 | compatible = "samsung,s3c2440-i2c"; |
245 | reg = <0x12C80000 0x100>; | |
246 | interrupts = <0 58 0>; | |
009f7c9f TA |
247 | #address-cells = <1>; |
248 | #size-cells = <0>; | |
2de6847c TA |
249 | clocks = <&clock 296>; |
250 | clock-names = "i2c"; | |
f8bfe2b0 TA |
251 | pinctrl-names = "default"; |
252 | pinctrl-0 = <&i2c2_bus>; | |
b074abb7 KK |
253 | }; |
254 | ||
b9fa3e7b | 255 | i2c_3: i2c@12C90000 { |
b074abb7 KK |
256 | compatible = "samsung,s3c2440-i2c"; |
257 | reg = <0x12C90000 0x100>; | |
258 | interrupts = <0 59 0>; | |
009f7c9f TA |
259 | #address-cells = <1>; |
260 | #size-cells = <0>; | |
2de6847c TA |
261 | clocks = <&clock 297>; |
262 | clock-names = "i2c"; | |
f8bfe2b0 TA |
263 | pinctrl-names = "default"; |
264 | pinctrl-0 = <&i2c3_bus>; | |
b074abb7 KK |
265 | }; |
266 | ||
b9fa3e7b | 267 | i2c_4: i2c@12CA0000 { |
b074abb7 KK |
268 | compatible = "samsung,s3c2440-i2c"; |
269 | reg = <0x12CA0000 0x100>; | |
270 | interrupts = <0 60 0>; | |
009f7c9f TA |
271 | #address-cells = <1>; |
272 | #size-cells = <0>; | |
2de6847c TA |
273 | clocks = <&clock 298>; |
274 | clock-names = "i2c"; | |
f8bfe2b0 TA |
275 | pinctrl-names = "default"; |
276 | pinctrl-0 = <&i2c4_bus>; | |
b074abb7 KK |
277 | }; |
278 | ||
b9fa3e7b | 279 | i2c_5: i2c@12CB0000 { |
b074abb7 KK |
280 | compatible = "samsung,s3c2440-i2c"; |
281 | reg = <0x12CB0000 0x100>; | |
282 | interrupts = <0 61 0>; | |
009f7c9f TA |
283 | #address-cells = <1>; |
284 | #size-cells = <0>; | |
2de6847c TA |
285 | clocks = <&clock 299>; |
286 | clock-names = "i2c"; | |
f8bfe2b0 TA |
287 | pinctrl-names = "default"; |
288 | pinctrl-0 = <&i2c5_bus>; | |
b074abb7 KK |
289 | }; |
290 | ||
b9fa3e7b | 291 | i2c_6: i2c@12CC0000 { |
b074abb7 KK |
292 | compatible = "samsung,s3c2440-i2c"; |
293 | reg = <0x12CC0000 0x100>; | |
294 | interrupts = <0 62 0>; | |
009f7c9f TA |
295 | #address-cells = <1>; |
296 | #size-cells = <0>; | |
2de6847c TA |
297 | clocks = <&clock 300>; |
298 | clock-names = "i2c"; | |
f8bfe2b0 TA |
299 | pinctrl-names = "default"; |
300 | pinctrl-0 = <&i2c6_bus>; | |
b074abb7 KK |
301 | }; |
302 | ||
b9fa3e7b | 303 | i2c_7: i2c@12CD0000 { |
b074abb7 KK |
304 | compatible = "samsung,s3c2440-i2c"; |
305 | reg = <0x12CD0000 0x100>; | |
306 | interrupts = <0 63 0>; | |
009f7c9f TA |
307 | #address-cells = <1>; |
308 | #size-cells = <0>; | |
2de6847c TA |
309 | clocks = <&clock 301>; |
310 | clock-names = "i2c"; | |
f8bfe2b0 TA |
311 | pinctrl-names = "default"; |
312 | pinctrl-0 = <&i2c7_bus>; | |
3e3e9ce4 RS |
313 | }; |
314 | ||
b9fa3e7b | 315 | i2c_8: i2c@12CE0000 { |
3e3e9ce4 RS |
316 | compatible = "samsung,s3c2440-hdmiphy-i2c"; |
317 | reg = <0x12CE0000 0x1000>; | |
318 | interrupts = <0 64 0>; | |
319 | #address-cells = <1>; | |
320 | #size-cells = <0>; | |
2de6847c TA |
321 | clocks = <&clock 302>; |
322 | clock-names = "i2c"; | |
24025f6f OJ |
323 | }; |
324 | ||
c47d244a VA |
325 | i2c@121D0000 { |
326 | compatible = "samsung,exynos5-sata-phy-i2c"; | |
327 | reg = <0x121D0000 0x100>; | |
328 | #address-cells = <1>; | |
329 | #size-cells = <0>; | |
2de6847c TA |
330 | clocks = <&clock 288>; |
331 | clock-names = "i2c"; | |
b074abb7 KK |
332 | }; |
333 | ||
79989ba3 TA |
334 | spi_0: spi@12d20000 { |
335 | compatible = "samsung,exynos4210-spi"; | |
336 | reg = <0x12d20000 0x100>; | |
337 | interrupts = <0 66 0>; | |
a4a8a9d3 PV |
338 | dmas = <&pdma0 5 |
339 | &pdma0 4>; | |
340 | dma-names = "tx", "rx"; | |
79989ba3 TA |
341 | #address-cells = <1>; |
342 | #size-cells = <0>; | |
2de6847c TA |
343 | clocks = <&clock 304>, <&clock 154>; |
344 | clock-names = "spi", "spi_busclk0"; | |
f8bfe2b0 TA |
345 | pinctrl-names = "default"; |
346 | pinctrl-0 = <&spi0_bus>; | |
79989ba3 TA |
347 | }; |
348 | ||
349 | spi_1: spi@12d30000 { | |
350 | compatible = "samsung,exynos4210-spi"; | |
351 | reg = <0x12d30000 0x100>; | |
352 | interrupts = <0 67 0>; | |
a4a8a9d3 PV |
353 | dmas = <&pdma1 5 |
354 | &pdma1 4>; | |
355 | dma-names = "tx", "rx"; | |
79989ba3 TA |
356 | #address-cells = <1>; |
357 | #size-cells = <0>; | |
2de6847c TA |
358 | clocks = <&clock 305>, <&clock 155>; |
359 | clock-names = "spi", "spi_busclk0"; | |
f8bfe2b0 TA |
360 | pinctrl-names = "default"; |
361 | pinctrl-0 = <&spi1_bus>; | |
79989ba3 TA |
362 | }; |
363 | ||
364 | spi_2: spi@12d40000 { | |
365 | compatible = "samsung,exynos4210-spi"; | |
366 | reg = <0x12d40000 0x100>; | |
367 | interrupts = <0 68 0>; | |
a4a8a9d3 PV |
368 | dmas = <&pdma0 7 |
369 | &pdma0 6>; | |
370 | dma-names = "tx", "rx"; | |
79989ba3 TA |
371 | #address-cells = <1>; |
372 | #size-cells = <0>; | |
2de6847c TA |
373 | clocks = <&clock 306>, <&clock 156>; |
374 | clock-names = "spi", "spi_busclk0"; | |
f8bfe2b0 TA |
375 | pinctrl-names = "default"; |
376 | pinctrl-0 = <&spi2_bus>; | |
79989ba3 TA |
377 | }; |
378 | ||
de0f42be | 379 | dwmmc_0: dwmmc0@12200000 { |
84bd48a0 | 380 | reg = <0x12200000 0x1000>; |
2de6847c TA |
381 | clocks = <&clock 280>, <&clock 139>; |
382 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
383 | }; |
384 | ||
de0f42be | 385 | dwmmc_1: dwmmc1@12210000 { |
84bd48a0 | 386 | reg = <0x12210000 0x1000>; |
2de6847c TA |
387 | clocks = <&clock 281>, <&clock 140>; |
388 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
389 | }; |
390 | ||
de0f42be | 391 | dwmmc_2: dwmmc2@12220000 { |
84bd48a0 | 392 | reg = <0x12220000 0x1000>; |
2de6847c TA |
393 | clocks = <&clock 282>, <&clock 141>; |
394 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
395 | }; |
396 | ||
de0f42be | 397 | dwmmc_3: dwmmc3@12230000 { |
84bd48a0 TA |
398 | compatible = "samsung,exynos5250-dw-mshc"; |
399 | reg = <0x12230000 0x1000>; | |
400 | interrupts = <0 78 0>; | |
401 | #address-cells = <1>; | |
402 | #size-cells = <0>; | |
2de6847c TA |
403 | clocks = <&clock 283>, <&clock 142>; |
404 | clock-names = "biu", "ciu"; | |
84bd48a0 TA |
405 | }; |
406 | ||
28a48058 | 407 | i2s0: i2s@03830000 { |
4c4c7463 PV |
408 | compatible = "samsung,i2s-v5"; |
409 | reg = <0x03830000 0x100>; | |
410 | dmas = <&pdma0 10 | |
411 | &pdma0 9 | |
412 | &pdma0 8>; | |
413 | dma-names = "tx", "rx", "tx-sec"; | |
916ec47e PV |
414 | clocks = <&clock_audss EXYNOS_I2S_BUS>, |
415 | <&clock_audss EXYNOS_I2S_BUS>, | |
416 | <&clock_audss EXYNOS_SCLK_I2S>; | |
417 | clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; | |
4c4c7463 PV |
418 | samsung,supports-6ch; |
419 | samsung,supports-rstclr; | |
420 | samsung,supports-secdai; | |
421 | samsung,idma-addr = <0x03000000>; | |
f8bfe2b0 TA |
422 | pinctrl-names = "default"; |
423 | pinctrl-0 = <&i2s0_bus>; | |
4c4c7463 PV |
424 | }; |
425 | ||
28a48058 | 426 | i2s1: i2s@12D60000 { |
4c4c7463 PV |
427 | compatible = "samsung,i2s-v5"; |
428 | reg = <0x12D60000 0x100>; | |
429 | dmas = <&pdma1 12 | |
430 | &pdma1 11>; | |
431 | dma-names = "tx", "rx"; | |
916ec47e PV |
432 | clocks = <&clock 307>, <&clock 157>; |
433 | clock-names = "iis", "i2s_opclk0"; | |
f8bfe2b0 TA |
434 | pinctrl-names = "default"; |
435 | pinctrl-0 = <&i2s1_bus>; | |
4c4c7463 PV |
436 | }; |
437 | ||
28a48058 | 438 | i2s2: i2s@12D70000 { |
4c4c7463 PV |
439 | compatible = "samsung,i2s-v5"; |
440 | reg = <0x12D70000 0x100>; | |
441 | dmas = <&pdma0 12 | |
442 | &pdma0 11>; | |
443 | dma-names = "tx", "rx"; | |
916ec47e PV |
444 | clocks = <&clock 308>, <&clock 158>; |
445 | clock-names = "iis", "i2s_opclk0"; | |
f8bfe2b0 TA |
446 | pinctrl-names = "default"; |
447 | pinctrl-0 = <&i2s2_bus>; | |
4c4c7463 PV |
448 | }; |
449 | ||
0b3dc97e VG |
450 | usb@12000000 { |
451 | compatible = "samsung,exynos5250-dwusb3"; | |
452 | clocks = <&clock 286>; | |
453 | clock-names = "usbdrd30"; | |
454 | #address-cells = <1>; | |
455 | #size-cells = <1>; | |
456 | ranges; | |
457 | ||
458 | dwc3 { | |
459 | compatible = "synopsys,dwc3"; | |
460 | reg = <0x12000000 0x10000>; | |
461 | interrupts = <0 72 0>; | |
462 | usb-phy = <&usb2_phy &usb3_phy>; | |
463 | }; | |
464 | }; | |
465 | ||
466 | usb3_phy: usbphy@12100000 { | |
896db3b3 VG |
467 | compatible = "samsung,exynos5250-usb3phy"; |
468 | reg = <0x12100000 0x100>; | |
469 | clocks = <&clock 1>, <&clock 286>; | |
470 | clock-names = "ext_xtal", "usbdrd30"; | |
471 | #address-cells = <1>; | |
472 | #size-cells = <1>; | |
473 | ranges; | |
474 | ||
475 | usbphy-sys { | |
476 | reg = <0x10040704 0x8>; | |
477 | }; | |
478 | }; | |
479 | ||
13cbd1e3 VG |
480 | usb@12110000 { |
481 | compatible = "samsung,exynos4210-ehci"; | |
482 | reg = <0x12110000 0x100>; | |
483 | interrupts = <0 71 0>; | |
b3cd7d87 DA |
484 | |
485 | clocks = <&clock 285>; | |
486 | clock-names = "usbhost"; | |
13cbd1e3 VG |
487 | }; |
488 | ||
7d40d867 VG |
489 | usb@12120000 { |
490 | compatible = "samsung,exynos4210-ohci"; | |
491 | reg = <0x12120000 0x100>; | |
492 | interrupts = <0 71 0>; | |
b3cd7d87 DA |
493 | |
494 | clocks = <&clock 285>; | |
495 | clock-names = "usbhost"; | |
7d40d867 VG |
496 | }; |
497 | ||
0b3dc97e | 498 | usb2_phy: usbphy@12130000 { |
7ec892ef VG |
499 | compatible = "samsung,exynos5250-usb2phy"; |
500 | reg = <0x12130000 0x100>; | |
501 | clocks = <&clock 1>, <&clock 285>; | |
502 | clock-names = "ext_xtal", "usbhost"; | |
503 | #address-cells = <1>; | |
504 | #size-cells = <1>; | |
505 | ranges; | |
506 | ||
507 | usbphy-sys { | |
508 | reg = <0x10040704 0x8>, | |
509 | <0x10050230 0x4>; | |
510 | }; | |
511 | }; | |
512 | ||
b074abb7 KK |
513 | amba { |
514 | #address-cells = <1>; | |
515 | #size-cells = <1>; | |
516 | compatible = "arm,amba-bus"; | |
517 | interrupt-parent = <&gic>; | |
518 | ranges; | |
519 | ||
520 | pdma0: pdma@121A0000 { | |
521 | compatible = "arm,pl330", "arm,primecell"; | |
522 | reg = <0x121A0000 0x1000>; | |
523 | interrupts = <0 34 0>; | |
2de6847c TA |
524 | clocks = <&clock 275>; |
525 | clock-names = "apb_pclk"; | |
42cf2098 PV |
526 | #dma-cells = <1>; |
527 | #dma-channels = <8>; | |
528 | #dma-requests = <32>; | |
b074abb7 KK |
529 | }; |
530 | ||
531 | pdma1: pdma@121B0000 { | |
532 | compatible = "arm,pl330", "arm,primecell"; | |
533 | reg = <0x121B0000 0x1000>; | |
534 | interrupts = <0 35 0>; | |
2de6847c TA |
535 | clocks = <&clock 276>; |
536 | clock-names = "apb_pclk"; | |
42cf2098 PV |
537 | #dma-cells = <1>; |
538 | #dma-channels = <8>; | |
539 | #dma-requests = <32>; | |
b074abb7 KK |
540 | }; |
541 | ||
009f7c9f | 542 | mdma0: mdma@10800000 { |
b074abb7 KK |
543 | compatible = "arm,pl330", "arm,primecell"; |
544 | reg = <0x10800000 0x1000>; | |
545 | interrupts = <0 33 0>; | |
2de6847c TA |
546 | clocks = <&clock 271>; |
547 | clock-names = "apb_pclk"; | |
42cf2098 PV |
548 | #dma-cells = <1>; |
549 | #dma-channels = <8>; | |
550 | #dma-requests = <1>; | |
b074abb7 KK |
551 | }; |
552 | ||
009f7c9f | 553 | mdma1: mdma@11C10000 { |
b074abb7 KK |
554 | compatible = "arm,pl330", "arm,primecell"; |
555 | reg = <0x11C10000 0x1000>; | |
556 | interrupts = <0 124 0>; | |
2de6847c TA |
557 | clocks = <&clock 271>; |
558 | clock-names = "apb_pclk"; | |
42cf2098 PV |
559 | #dma-cells = <1>; |
560 | #dma-channels = <8>; | |
561 | #dma-requests = <1>; | |
b074abb7 KK |
562 | }; |
563 | }; | |
564 | ||
1128658a SAB |
565 | gsc_0: gsc@0x13e00000 { |
566 | compatible = "samsung,exynos5-gsc"; | |
567 | reg = <0x13e00000 0x1000>; | |
568 | interrupts = <0 85 0>; | |
6f9e95e6 | 569 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
570 | clocks = <&clock 256>; |
571 | clock-names = "gscl"; | |
1128658a SAB |
572 | }; |
573 | ||
574 | gsc_1: gsc@0x13e10000 { | |
575 | compatible = "samsung,exynos5-gsc"; | |
576 | reg = <0x13e10000 0x1000>; | |
577 | interrupts = <0 86 0>; | |
6f9e95e6 | 578 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
579 | clocks = <&clock 257>; |
580 | clock-names = "gscl"; | |
1128658a SAB |
581 | }; |
582 | ||
583 | gsc_2: gsc@0x13e20000 { | |
584 | compatible = "samsung,exynos5-gsc"; | |
585 | reg = <0x13e20000 0x1000>; | |
586 | interrupts = <0 87 0>; | |
6f9e95e6 | 587 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
588 | clocks = <&clock 258>; |
589 | clock-names = "gscl"; | |
1128658a SAB |
590 | }; |
591 | ||
592 | gsc_3: gsc@0x13e30000 { | |
593 | compatible = "samsung,exynos5-gsc"; | |
594 | reg = <0x13e30000 0x1000>; | |
595 | interrupts = <0 88 0>; | |
6f9e95e6 | 596 | samsung,power-domain = <&pd_gsc>; |
2de6847c TA |
597 | clocks = <&clock 259>; |
598 | clock-names = "gscl"; | |
1128658a | 599 | }; |
566cf8ee RS |
600 | |
601 | hdmi { | |
0d1fc829 | 602 | compatible = "samsung,exynos4212-hdmi"; |
101250ce | 603 | reg = <0x14530000 0x70000>; |
566cf8ee | 604 | interrupts = <0 95 0>; |
2de6847c TA |
605 | clocks = <&clock 333>, <&clock 136>, <&clock 137>, |
606 | <&clock 333>, <&clock 333>; | |
607 | clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", | |
608 | "sclk_hdmiphy", "hdmiphy"; | |
566cf8ee | 609 | }; |
5af0d8a3 RS |
610 | |
611 | mixer { | |
0d1fc829 | 612 | compatible = "samsung,exynos5250-mixer"; |
5af0d8a3 RS |
613 | reg = <0x14450000 0x10000>; |
614 | interrupts = <0 94 0>; | |
615 | }; | |
ad4aebe1 JH |
616 | |
617 | dp-controller { | |
618 | compatible = "samsung,exynos5-dp"; | |
619 | reg = <0x145b0000 0x1000>; | |
620 | interrupts = <10 3>; | |
621 | interrupt-parent = <&combiner>; | |
0f72a9ec VS |
622 | clocks = <&clock 342>; |
623 | clock-names = "dp"; | |
ad4aebe1 JH |
624 | #address-cells = <1>; |
625 | #size-cells = <0>; | |
626 | ||
627 | dptx-phy { | |
628 | reg = <0x10040720>; | |
629 | samsung,enable-mask = <1>; | |
630 | }; | |
631 | }; | |
a7389cb1 LKA |
632 | |
633 | fimd { | |
634 | compatible = "samsung,exynos5250-fimd"; | |
635 | interrupt-parent = <&combiner>; | |
636 | reg = <0x14400000 0x40000>; | |
637 | interrupt-names = "fifo", "vsync", "lcd_sys"; | |
638 | interrupts = <18 4>, <18 5>, <18 6>; | |
639 | clocks = <&clock 133>, <&clock 339>; | |
640 | clock-names = "sclk_fimd", "fimd"; | |
641 | }; | |
b074abb7 | 642 | }; |