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Merge tag 'pstore-v4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/kees...
[deliverable/linux.git] / arch / arm / boot / dts / exynos5422-odroidxu3-common.dtsi
CommitLineData
3a7c01d7
KK		 1/*
2 * Hardkernel Odroid XU3 board device tree source
3 *
3a7c01d7
KK		 4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
f4715dc7
KK		 6 * Copyright (c) 2014 Collabora Ltd.
7 * Copyright (c) 2015 Lukasz Majewski <l.majewski@samsung.com>
8 * Anand Moon <linux.amoon@gmail.com>
3a7c01d7
KK		 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <dt-bindings/clock/samsung,s2mps11.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/sound/samsung-i2s.h>
19#include "exynos5800.dtsi"
df09df6f 20#include "exynos5422-cpus.dtsi"
8b9ac7e3 21#include "exynos-mfc-reserved-memory.dtsi"
3a7c01d7
KK		 22
23/ {
24 memory {
25 reg = <0x40000000 0x7EA00000>;
26 };
27
28 chosen {
29 linux,stdout-path = &serial_2;
30 };
31
32 firmware@02073000 {
33 compatible = "samsung,secure-firmware";
34 reg = <0x02073000 0x1000>;
35 };
36
37 fixed-rate-clocks {
38 oscclk {
39 compatible = "samsung,exynos5420-oscclk";
40 clock-frequency = <24000000>;
41 };
42 };
43
44 emmc_pwrseq: pwrseq {
45 pinctrl-0 = <&emmc_nrst_pin>;
46 pinctrl-names = "default";
47 compatible = "mmc-pwrseq-emmc";
31b9903c 48 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>;
3a7c01d7
KK		 49 };
50
b685d540
AM		 51 fan0: pwm-fan {
52 compatible = "pwm-fan";
53 pwms = <&pwm 0 20972 0>;
54 cooling-min-state = <0>;
55 cooling-max-state = <3>;
56 #cooling-cells = <2>;
57 cooling-levels = <0 130 170 230>;
58 };
f4715dc7
KK		 59
60 thermal-zones {
61 cpu0_thermal: cpu0-thermal {
62 thermal-sensors = <&tmu_cpu0 0>;
63 polling-delay-passive = <250>;
64 polling-delay = <0>;
65 trips {
66 cpu_alert0: cpu-alert-0 {
67 temperature = <50000>; /* millicelsius */
68 hysteresis = <5000>; /* millicelsius */
69 type = "active";
70 };
71 cpu_alert1: cpu-alert-1 {
72 temperature = <60000>; /* millicelsius */
73 hysteresis = <5000>; /* millicelsius */
74 type = "active";
75 };
76 cpu_alert2: cpu-alert-2 {
77 temperature = <70000>; /* millicelsius */
78 hysteresis = <5000>; /* millicelsius */
79 type = "active";
80 };
81 cpu_crit0: cpu-crit-0 {
82 temperature = <120000>; /* millicelsius */
83 hysteresis = <0>; /* millicelsius */
84 type = "critical";
85 };
86 /*
87 * Exynos542x supports only 4 trip-points
88 * so for these polling mode is required.
89 * Start polling at temperature level of last
90 * interrupt-driven trip: cpu_alert2
91 */
92 cpu_alert3: cpu-alert-3 {
93 temperature = <70000>; /* millicelsius */
94 hysteresis = <10000>; /* millicelsius */
95 type = "passive";
96 };
97 cpu_alert4: cpu-alert-4 {
98 temperature = <85000>; /* millicelsius */
99 hysteresis = <10000>; /* millicelsius */
100 type = "passive";
101 };
102
103 };
104 cooling-maps {
105 map0 {
106 trip = <&cpu_alert0>;
107 cooling-device = <&fan0 0 1>;
108 };
109 map1 {
110 trip = <&cpu_alert1>;
111 cooling-device = <&fan0 1 2>;
112 };
113 map2 {
114 trip = <&cpu_alert2>;
115 cooling-device = <&fan0 2 3>;
116 };
117 /*
118 * When reaching cpu_alert3, reduce CPU
119 * by 2 steps. On Exynos5422/5800 that would
120 * be: 1600 MHz and 1100 MHz.
121 */
122 map3 {
123 trip = <&cpu_alert3>;
124 cooling-device = <&cpu0 0 2>;
125 };
126 map4 {
127 trip = <&cpu_alert3>;
128 cooling-device = <&cpu4 0 2>;
129 };
130
131 /*
132 * When reaching cpu_alert4, reduce CPU
133 * further, down to 600 MHz (11 steps for big,
134 * 7 steps for LITTLE).
135 */
136 map5 {
137 trip = <&cpu_alert4>;
138 cooling-device = <&cpu0 3 7>;
139 };
140 map6 {
141 trip = <&cpu_alert4>;
142 cooling-device = <&cpu4 3 11>;
143 };
144 };
145 };
146 };
3a7c01d7
KK		 147};
148
3f2129fd
CC		 149&bus_wcore {
150 devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
151 <&nocp_mem1_0>, <&nocp_mem1_1>;
152 vdd-supply = <&buck3_reg>;
153 exynos,saturation-ratio = <100>;
154 status = "okay";
155};
156
157&bus_noc {
158 devfreq = <&bus_wcore>;
159 status = "okay";
160};
161
162&bus_fsys_apb {
163 devfreq = <&bus_wcore>;
164 status = "okay";
165};
166
167&bus_fsys {
168 devfreq = <&bus_wcore>;
169 status = "okay";
170};
171
172&bus_fsys2 {
173 devfreq = <&bus_wcore>;
174 status = "okay";
175};
176
177&bus_mfc {
178 devfreq = <&bus_wcore>;
179 status = "okay";
180};
181
182&bus_gen {
183 devfreq = <&bus_wcore>;
184 status = "okay";
185};
186
187&bus_peri {
188 devfreq = <&bus_wcore>;
189 status = "okay";
190};
191
192&bus_g2d {
193 devfreq = <&bus_wcore>;
194 status = "okay";
195};
196
197&bus_g2d_acp {
198 devfreq = <&bus_wcore>;
199 status = "okay";
200};
201
202&bus_jpeg {
203 devfreq = <&bus_wcore>;
204 status = "okay";
205};
206
207&bus_jpeg_apb {
208 devfreq = <&bus_wcore>;
209 status = "okay";
210};
211
212&bus_disp1_fimd {
213 devfreq = <&bus_wcore>;
214 status = "okay";
215};
216
217&bus_disp1 {
218 devfreq = <&bus_wcore>;
219 status = "okay";
220};
221
222&bus_gscl_scaler {
223 devfreq = <&bus_wcore>;
224 status = "okay";
225};
226
227&bus_mscl {
228 devfreq = <&bus_wcore>;
229 status = "okay";
230};
231
3a7c01d7
KK		 232&clock_audss {
233 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
234 <&clock_audss EXYNOS_MOUT_I2S>,
235 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
236 assigned-clock-parents = <&clock CLK_FIN_PLL>,
237 <&clock_audss EXYNOS_MOUT_AUDSS>;
238 assigned-clock-rates = <0>,
239 <0>,
240 <19200000>;
241};
242
8b51c5e7
BZ		 243&cpu0 {
244 cpu-supply = <&buck6_reg>;
245};
246
247&cpu4 {
248 cpu-supply = <&buck2_reg>;
249};
250
3a7c01d7
KK		 251&hdmi {
252 status = "okay";
31b9903c 253 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
3a7c01d7
KK		 254 pinctrl-names = "default";
255 pinctrl-0 = <&hdmi_hpd_irq>;
256
257 vdd_osc-supply = <&ldo7_reg>;
258 vdd_pll-supply = <&ldo6_reg>;
259 vdd-supply = <&ldo6_reg>;
260};
261
262&hsi2c_4 {
263 status = "okay";
264
265 s2mps11_pmic@66 {
266 compatible = "samsung,s2mps11-pmic";
267 reg = <0x66>;
0fb033bb 268 samsung,s2mps11-acokb-ground;
3a7c01d7
KK		 269
270 interrupt-parent = <&gpx0>;
271 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
272 pinctrl-names = "default";
273 pinctrl-0 = <&s2mps11_irq>;
274
275 s2mps11_osc: clocks {
276 #clock-cells = <1>;
277 clock-output-names = "s2mps11_ap",
278 "s2mps11_cp", "s2mps11_bt";
279 };
280
281 regulators {
282 ldo1_reg: LDO1 {
283 regulator-name = "vdd_ldo1";
284 regulator-min-microvolt = <1000000>;
285 regulator-max-microvolt = <1000000>;
286 regulator-always-on;
287 };
288
289 ldo3_reg: LDO3 {
399fc184 290 regulator-name = "vddq_mmc0";
3a7c01d7
KK		 291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <1800000>;
3a7c01d7
KK		 293 };
294
295 ldo5_reg: LDO5 {
296 regulator-name = "vdd_ldo5";
297 regulator-min-microvolt = <1800000>;
298 regulator-max-microvolt = <1800000>;
299 regulator-always-on;
300 };
301
302 ldo6_reg: LDO6 {
303 regulator-name = "vdd_ldo6";
304 regulator-min-microvolt = <1000000>;
305 regulator-max-microvolt = <1000000>;
306 regulator-always-on;
307 };
308
309 ldo7_reg: LDO7 {
310 regulator-name = "vdd_ldo7";
311 regulator-min-microvolt = <1800000>;
312 regulator-max-microvolt = <1800000>;
313 regulator-always-on;
314 };
315
316 ldo8_reg: LDO8 {
317 regulator-name = "vdd_ldo8";
318 regulator-min-microvolt = <1800000>;
319 regulator-max-microvolt = <1800000>;
320 regulator-always-on;
321 };
322
323 ldo9_reg: LDO9 {
324 regulator-name = "vdd_ldo9";
325 regulator-min-microvolt = <3000000>;
326 regulator-max-microvolt = <3000000>;
327 regulator-always-on;
328 };
329
330 ldo10_reg: LDO10 {
331 regulator-name = "vdd_ldo10";
332 regulator-min-microvolt = <1800000>;
333 regulator-max-microvolt = <1800000>;
334 regulator-always-on;
335 };
336
337 ldo11_reg: LDO11 {
338 regulator-name = "vdd_ldo11";
339 regulator-min-microvolt = <1000000>;
340 regulator-max-microvolt = <1000000>;
341 regulator-always-on;
342 };
343
344 ldo12_reg: LDO12 {
345 regulator-name = "vdd_ldo12";
346 regulator-min-microvolt = <1800000>;
347 regulator-max-microvolt = <1800000>;
348 regulator-always-on;
349 };
350
351 ldo13_reg: LDO13 {
399fc184 352 regulator-name = "vddq_mmc2";
3a7c01d7
KK		 353 regulator-min-microvolt = <2800000>;
354 regulator-max-microvolt = <2800000>;
3a7c01d7
KK		 355 };
356
357 ldo15_reg: LDO15 {
358 regulator-name = "vdd_ldo15";
359 regulator-min-microvolt = <3100000>;
360 regulator-max-microvolt = <3100000>;
361 regulator-always-on;
362 };
363
364 ldo16_reg: LDO16 {
365 regulator-name = "vdd_ldo16";
366 regulator-min-microvolt = <2200000>;
367 regulator-max-microvolt = <2200000>;
368 regulator-always-on;
369 };
370
371 ldo17_reg: LDO17 {
372 regulator-name = "tsp_avdd";
373 regulator-min-microvolt = <3300000>;
374 regulator-max-microvolt = <3300000>;
375 regulator-always-on;
376 };
377
399fc184
MR		 378 ldo18_reg: LDO18 {
379 regulator-name = "vdd_emmc_1V8";
380 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>;
382 };
383
3a7c01d7
KK		 384 ldo19_reg: LDO19 {
385 regulator-name = "vdd_sd";
386 regulator-min-microvolt = <2800000>;
387 regulator-max-microvolt = <2800000>;
3a7c01d7
KK		 388 };
389
390 ldo24_reg: LDO24 {
391 regulator-name = "tsp_io";
392 regulator-min-microvolt = <2800000>;
393 regulator-max-microvolt = <2800000>;
394 regulator-always-on;
395 };
396
397 ldo26_reg: LDO26 {
398 regulator-name = "vdd_ldo26";
399 regulator-min-microvolt = <3000000>;
400 regulator-max-microvolt = <3000000>;
401 regulator-always-on;
402 };
403
404 buck1_reg: BUCK1 {
405 regulator-name = "vdd_mif";
406 regulator-min-microvolt = <800000>;
407 regulator-max-microvolt = <1300000>;
408 regulator-always-on;
409 regulator-boot-on;
410 };
411
412 buck2_reg: BUCK2 {
413 regulator-name = "vdd_arm";
414 regulator-min-microvolt = <800000>;
415 regulator-max-microvolt = <1500000>;
416 regulator-always-on;
417 regulator-boot-on;
418 };
419
420 buck3_reg: BUCK3 {
421 regulator-name = "vdd_int";
422 regulator-min-microvolt = <800000>;
423 regulator-max-microvolt = <1400000>;
424 regulator-always-on;
425 regulator-boot-on;
426 };
427
428 buck4_reg: BUCK4 {
429 regulator-name = "vdd_g3d";
430 regulator-min-microvolt = <800000>;
431 regulator-max-microvolt = <1400000>;
432 regulator-always-on;
433 regulator-boot-on;
434 };
435
436 buck5_reg: BUCK5 {
437 regulator-name = "vdd_mem";
438 regulator-min-microvolt = <800000>;
439 regulator-max-microvolt = <1400000>;
440 regulator-always-on;
441 regulator-boot-on;
442 };
443
444 buck6_reg: BUCK6 {
445 regulator-name = "vdd_kfc";
446 regulator-min-microvolt = <800000>;
447 regulator-max-microvolt = <1500000>;
448 regulator-always-on;
449 regulator-boot-on;
450 };
451
452 buck7_reg: BUCK7 {
453 regulator-name = "vdd_1.0v_ldo";
454 regulator-min-microvolt = <800000>;
455 regulator-max-microvolt = <1500000>;
456 regulator-always-on;
457 regulator-boot-on;
458 };
459
460 buck8_reg: BUCK8 {
461 regulator-name = "vdd_1.8v_ldo";
462 regulator-min-microvolt = <800000>;
463 regulator-max-microvolt = <1500000>;
464 regulator-always-on;
465 regulator-boot-on;
466 };
467
468 buck9_reg: BUCK9 {
469 regulator-name = "vdd_2.8v_ldo";
470 regulator-min-microvolt = <3000000>;
471 regulator-max-microvolt = <3750000>;
472 regulator-always-on;
473 regulator-boot-on;
474 };
475
476 buck10_reg: BUCK10 {
477 regulator-name = "vdd_vmem";
478 regulator-min-microvolt = <2850000>;
479 regulator-max-microvolt = <2850000>;
480 regulator-always-on;
481 regulator-boot-on;
482 };
483 };
484 };
485};
486
3a7c01d7
KK		 487&i2c_2 {
488 samsung,i2c-sda-delay = <100>;
489 samsung,i2c-max-bus-freq = <66000>;
490 status = "okay";
491
492 hdmiddc@50 {
493 compatible = "samsung,exynos4210-hdmiddc";
494 reg = <0x50>;
495 };
496};
497
3a7c01d7
KK		 498&mmc_0 {
499 status = "okay";
500 mmc-pwrseq = <&emmc_pwrseq>;
501 cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>;
502 card-detect-delay = <200>;
503 samsung,dw-mshc-ciu-div = <3>;
504 samsung,dw-mshc-sdr-timing = <0 4>;
505 samsung,dw-mshc-ddr-timing = <0 2>;
506 samsung,dw-mshc-hs400-timing = <0 2>;
507 samsung,read-strobe-delay = <90>;
508 pinctrl-names = "default";
509 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>;
510 bus-width = <8>;
511 cap-mmc-highspeed;
512 mmc-hs200-1_8v;
513 mmc-hs400-1_8v;
399fc184
MR		 514 vmmc-supply = <&ldo18_reg>;
515 vqmmc-supply = <&ldo3_reg>;
3a7c01d7
KK		 516};
517
518&mmc_2 {
519 status = "okay";
520 card-detect-delay = <200>;
521 samsung,dw-mshc-ciu-div = <3>;
522 samsung,dw-mshc-sdr-timing = <0 4>;
523 samsung,dw-mshc-ddr-timing = <0 2>;
524 pinctrl-names = "default";
525 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
526 bus-width = <4>;
527 cap-sd-highspeed;
399fc184
MR		 528 vmmc-supply = <&ldo19_reg>;
529 vqmmc-supply = <&ldo13_reg>;
3a7c01d7
KK		 530};
531
3f2129fd
CC		 532&nocp_mem0_0 {
533 status = "okay";
534};
535
536&nocp_mem0_1 {
537 status = "okay";
538};
539
540&nocp_mem1_0 {
541 status = "okay";
542};
543
544&nocp_mem1_1 {
545 status = "okay";
546};
547
3a7c01d7
KK		 548&pinctrl_0 {
549 hdmi_hpd_irq: hdmi-hpd-irq {
550 samsung,pins = "gpx3-7";
551 samsung,pin-function = <0>;
552 samsung,pin-pud = <1>;
553 samsung,pin-drv = <0>;
554 };
555
556 s2mps11_irq: s2mps11-irq {
557 samsung,pins = "gpx0-4";
558 samsung,pin-function = <0xf>;
559 samsung,pin-pud = <0>;
560 samsung,pin-drv = <0>;
561 };
562};
563
564&pinctrl_1 {
565 emmc_nrst_pin: emmc-nrst {
566 samsung,pins = "gpd1-0";
567 samsung,pin-function = <0>;
568 samsung,pin-pud = <0>;
569 samsung,pin-drv = <0>;
570 };
571};
572
8e946a05
AM		 573&tmu_cpu0 {
574 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 575};
576
577&tmu_cpu1 {
578 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 579};
580
581&tmu_cpu2 {
582 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 583};
584
585&tmu_cpu3 {
586 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 587};
588
589&tmu_gpu {
590 vtmu-supply = <&ldo7_reg>;
8e946a05
AM		 591};
592
3a7c01d7
KK		 593&rtc {
594 status = "okay";
595 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
596 clock-names = "rtc", "rtc_src";
597};
598
599&usbdrd_dwc3_0 {
600 dr_mode = "host";
601};
602
66583560 603/* usbdrd_dwc3_1 mode customized in each board */
dc929d49
AM		 604
605&usbdrd3_0 {
606 vdd33-supply = <&ldo9_reg>;
607 vdd10-supply = <&ldo11_reg>;
608};
609
610&usbdrd3_1 {
611 vdd33-supply = <&ldo9_reg>;
612 vdd10-supply = <&ldo11_reg>;
613};
Linux kernel - Deliverables
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