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1355bbc4 KK |
1 | /* |
2 | * SAMSUNG EXYNOS5440 SoC device tree source | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
86feafeb | 12 | #include <dt-bindings/clock/exynos5440.h> |
1355bbc4 KK |
13 | |
14 | / { | |
8bdb31b4 | 15 | compatible = "samsung,exynos5440", "samsung,exynos5"; |
1355bbc4 KK |
16 | |
17 | interrupt-parent = <&gic>; | |
12676ee1 JMC |
18 | #address-cells = <1>; |
19 | #size-cells = <1>; | |
1355bbc4 | 20 | |
dabd3f9d | 21 | aliases { |
1e64f48e TF |
22 | serial0 = &serial_0; |
23 | serial1 = &serial_1; | |
dabd3f9d | 24 | spi0 = &spi_0; |
5c7311b5 ADK |
25 | tmuctrl0 = &tmuctrl_0; |
26 | tmuctrl1 = &tmuctrl_1; | |
27 | tmuctrl2 = &tmuctrl_2; | |
dabd3f9d G |
28 | }; |
29 | ||
644a79a8 | 30 | clock: clock-controller@160000 { |
d8bafc87 TA |
31 | compatible = "samsung,exynos5440-clock"; |
32 | reg = <0x160000 0x1000>; | |
33 | #clock-cells = <1>; | |
34 | }; | |
35 | ||
0572b725 | 36 | gic: interrupt-controller@2E0000 { |
1355bbc4 KK |
37 | compatible = "arm,cortex-a15-gic"; |
38 | #interrupt-cells = <3>; | |
39 | interrupt-controller; | |
3279dd36 GM |
40 | reg = <0x2E1000 0x1000>, |
41 | <0x2E2000 0x1000>, | |
42 | <0x2E4000 0x2000>, | |
43 | <0x2E6000 0x2000>; | |
44 | interrupts = <1 9 0xf04>; | |
1355bbc4 KK |
45 | }; |
46 | ||
47 | cpus { | |
f5108e1c KK |
48 | #address-cells = <1>; |
49 | #size-cells = <0>; | |
50 | ||
1355bbc4 | 51 | cpu@0 { |
88e41848 | 52 | device_type = "cpu"; |
1355bbc4 | 53 | compatible = "arm,cortex-a15"; |
f5108e1c | 54 | reg = <0>; |
1355bbc4 KK |
55 | }; |
56 | cpu@1 { | |
88e41848 | 57 | device_type = "cpu"; |
1355bbc4 | 58 | compatible = "arm,cortex-a15"; |
f5108e1c | 59 | reg = <1>; |
1355bbc4 KK |
60 | }; |
61 | cpu@2 { | |
88e41848 | 62 | device_type = "cpu"; |
1355bbc4 | 63 | compatible = "arm,cortex-a15"; |
f5108e1c | 64 | reg = <2>; |
1355bbc4 KK |
65 | }; |
66 | cpu@3 { | |
88e41848 | 67 | device_type = "cpu"; |
1355bbc4 | 68 | compatible = "arm,cortex-a15"; |
f5108e1c | 69 | reg = <3>; |
1355bbc4 KK |
70 | }; |
71 | }; | |
72 | ||
4c46f51a SP |
73 | arm-pmu { |
74 | compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu"; | |
75 | interrupts = <0 52 4>, | |
76 | <0 53 4>, | |
77 | <0 54 4>, | |
78 | <0 55 4>; | |
79 | }; | |
80 | ||
f5108e1c KK |
81 | timer { |
82 | compatible = "arm,cortex-a15-timer", | |
83 | "arm,armv7-timer"; | |
84 | interrupts = <1 13 0xf08>, | |
85 | <1 14 0xf08>, | |
86 | <1 11 0xf08>, | |
87 | <1 10 0xf08>; | |
88 | clock-frequency = <50000000>; | |
89 | }; | |
90 | ||
7f7b8ed0 ADK |
91 | cpufreq@160000 { |
92 | compatible = "samsung,exynos5440-cpufreq"; | |
93 | reg = <0x160000 0x1000>; | |
94 | interrupts = <0 57 0>; | |
95 | operating-points = < | |
96 | /* KHz uV */ | |
afbbf927 ADK |
97 | 1500000 1100000 |
98 | 1400000 1075000 | |
99 | 1300000 1050000 | |
7f7b8ed0 | 100 | 1200000 1025000 |
afbbf927 | 101 | 1100000 1000000 |
7f7b8ed0 | 102 | 1000000 975000 |
afbbf927 | 103 | 900000 950000 |
7f7b8ed0 ADK |
104 | 800000 925000 |
105 | >; | |
106 | }; | |
107 | ||
1e64f48e | 108 | serial_0: serial@B0000 { |
1355bbc4 KK |
109 | compatible = "samsung,exynos4210-uart"; |
110 | reg = <0xB0000 0x1000>; | |
111 | interrupts = <0 2 0>; | |
86feafeb | 112 | clocks = <&clock CLK_B_125>, <&clock CLK_B_125>; |
6a0338c2 | 113 | clock-names = "uart", "clk_uart_baud0"; |
1355bbc4 KK |
114 | }; |
115 | ||
1e64f48e | 116 | serial_1: serial@C0000 { |
1355bbc4 KK |
117 | compatible = "samsung,exynos4210-uart"; |
118 | reg = <0xC0000 0x1000>; | |
119 | interrupts = <0 3 0>; | |
86feafeb | 120 | clocks = <&clock CLK_B_125>, <&clock CLK_B_125>; |
6a0338c2 | 121 | clock-names = "uart", "clk_uart_baud0"; |
1355bbc4 KK |
122 | }; |
123 | ||
dabd3f9d G |
124 | spi_0: spi@D0000 { |
125 | compatible = "samsung,exynos5440-spi"; | |
126 | reg = <0xD0000 0x100>; | |
1355bbc4 | 127 | interrupts = <0 4 0>; |
1355bbc4 KK |
128 | #address-cells = <1>; |
129 | #size-cells = <0>; | |
dabd3f9d G |
130 | samsung,spi-src-clk = <0>; |
131 | num-cs = <1>; | |
86feafeb | 132 | clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>; |
6a0338c2 | 133 | clock-names = "spi", "spi_busclk0"; |
1355bbc4 KK |
134 | }; |
135 | ||
4185c53f | 136 | pin_ctrl: pinctrl@E0000 { |
f6925432 | 137 | compatible = "samsung,exynos5440-pinctrl"; |
1355bbc4 | 138 | reg = <0xE0000 0x1000>; |
71d87da3 TA |
139 | interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, |
140 | <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>; | |
1355bbc4 KK |
141 | interrupt-controller; |
142 | #interrupt-cells = <2>; | |
b1ce101b TA |
143 | #gpio-cells = <2>; |
144 | ||
145 | fan: fan { | |
146 | samsung,exynos5440-pin-function = <1>; | |
147 | }; | |
148 | ||
149 | hdd_led0: hdd_led0 { | |
150 | samsung,exynos5440-pin-function = <2>; | |
151 | }; | |
152 | ||
153 | hdd_led1: hdd_led1 { | |
154 | samsung,exynos5440-pin-function = <3>; | |
155 | }; | |
156 | ||
157 | uart1: uart1 { | |
158 | samsung,exynos5440-pin-function = <4>; | |
159 | }; | |
1355bbc4 KK |
160 | }; |
161 | ||
162 | i2c@F0000 { | |
49498c56 | 163 | compatible = "samsung,exynos5440-i2c"; |
1355bbc4 KK |
164 | reg = <0xF0000 0x1000>; |
165 | interrupts = <0 5 0>; | |
166 | #address-cells = <1>; | |
167 | #size-cells = <0>; | |
86feafeb | 168 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 169 | clock-names = "i2c"; |
1355bbc4 KK |
170 | }; |
171 | ||
172 | i2c@100000 { | |
49498c56 | 173 | compatible = "samsung,exynos5440-i2c"; |
1355bbc4 KK |
174 | reg = <0x100000 0x1000>; |
175 | interrupts = <0 6 0>; | |
176 | #address-cells = <1>; | |
177 | #size-cells = <0>; | |
86feafeb | 178 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 179 | clock-names = "i2c"; |
1355bbc4 KK |
180 | }; |
181 | ||
64f5d1eb | 182 | watchdog@110000 { |
1355bbc4 KK |
183 | compatible = "samsung,s3c2410-wdt"; |
184 | reg = <0x110000 0x1000>; | |
185 | interrupts = <0 1 0>; | |
86feafeb | 186 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 187 | clock-names = "watchdog"; |
1355bbc4 KK |
188 | }; |
189 | ||
c038c4d8 BA |
190 | gmac: ethernet@00230000 { |
191 | compatible = "snps,dwmac-3.70a"; | |
192 | reg = <0x00230000 0x8000>; | |
193 | interrupt-parent = <&gic>; | |
194 | interrupts = <0 31 4>; | |
195 | interrupt-names = "macirq"; | |
196 | phy-mode = "sgmii"; | |
86feafeb | 197 | clocks = <&clock CLK_GMAC0>; |
c038c4d8 BA |
198 | clock-names = "stmmaceth"; |
199 | }; | |
200 | ||
1355bbc4 KK |
201 | amba { |
202 | #address-cells = <1>; | |
203 | #size-cells = <1>; | |
2ef7d5f3 | 204 | compatible = "simple-bus"; |
1355bbc4 KK |
205 | interrupt-parent = <&gic>; |
206 | ranges; | |
1355bbc4 KK |
207 | }; |
208 | ||
4185c53f | 209 | rtc@130000 { |
1355bbc4 KK |
210 | compatible = "samsung,s3c6410-rtc"; |
211 | reg = <0x130000 0x1000>; | |
e877a5aa | 212 | interrupts = <0 17 0>, <0 16 0>; |
86feafeb | 213 | clocks = <&clock CLK_B_125>; |
6a0338c2 | 214 | clock-names = "rtc"; |
1355bbc4 | 215 | }; |
1a12f52e | 216 | |
5c7311b5 ADK |
217 | tmuctrl_0: tmuctrl@160118 { |
218 | compatible = "samsung,exynos5440-tmu"; | |
219 | reg = <0x160118 0x230>, <0x160368 0x10>; | |
220 | interrupts = <0 58 0>; | |
86feafeb | 221 | clocks = <&clock CLK_B_125>; |
5c7311b5 | 222 | clock-names = "tmu_apbif"; |
9843a223 | 223 | #include "exynos5440-tmu-sensor-conf.dtsi" |
5c7311b5 ADK |
224 | }; |
225 | ||
226 | tmuctrl_1: tmuctrl@16011C { | |
227 | compatible = "samsung,exynos5440-tmu"; | |
228 | reg = <0x16011C 0x230>, <0x160368 0x10>; | |
229 | interrupts = <0 58 0>; | |
86feafeb | 230 | clocks = <&clock CLK_B_125>; |
5c7311b5 | 231 | clock-names = "tmu_apbif"; |
9843a223 | 232 | #include "exynos5440-tmu-sensor-conf.dtsi" |
5c7311b5 ADK |
233 | }; |
234 | ||
235 | tmuctrl_2: tmuctrl@160120 { | |
236 | compatible = "samsung,exynos5440-tmu"; | |
237 | reg = <0x160120 0x230>, <0x160368 0x10>; | |
238 | interrupts = <0 58 0>; | |
86feafeb | 239 | clocks = <&clock CLK_B_125>; |
5c7311b5 | 240 | clock-names = "tmu_apbif"; |
9843a223 LM |
241 | #include "exynos5440-tmu-sensor-conf.dtsi" |
242 | }; | |
243 | ||
244 | thermal-zones { | |
245 | cpu0_thermal: cpu0-thermal { | |
246 | thermal-sensors = <&tmuctrl_0>; | |
247 | #include "exynos5440-trip-points.dtsi" | |
248 | }; | |
249 | cpu1_thermal: cpu1-thermal { | |
250 | thermal-sensors = <&tmuctrl_1>; | |
251 | #include "exynos5440-trip-points.dtsi" | |
252 | }; | |
253 | cpu2_thermal: cpu2-thermal { | |
254 | thermal-sensors = <&tmuctrl_2>; | |
255 | #include "exynos5440-trip-points.dtsi" | |
256 | }; | |
5c7311b5 ADK |
257 | }; |
258 | ||
1a12f52e G |
259 | sata@210000 { |
260 | compatible = "snps,exynos5440-ahci"; | |
261 | reg = <0x210000 0x10000>; | |
262 | interrupts = <0 30 0>; | |
86feafeb | 263 | clocks = <&clock CLK_SATA>; |
1a12f52e G |
264 | clock-names = "sata"; |
265 | }; | |
266 | ||
a3808905 TA |
267 | ohci@220000 { |
268 | compatible = "samsung,exynos5440-ohci"; | |
269 | reg = <0x220000 0x1000>; | |
270 | interrupts = <0 29 0>; | |
86feafeb | 271 | clocks = <&clock CLK_USB>; |
a3808905 TA |
272 | clock-names = "usbhost"; |
273 | }; | |
274 | ||
275 | ehci@221000 { | |
276 | compatible = "samsung,exynos5440-ehci"; | |
277 | reg = <0x221000 0x1000>; | |
278 | interrupts = <0 29 0>; | |
86feafeb | 279 | clocks = <&clock CLK_USB>; |
a3808905 | 280 | clock-names = "usbhost"; |
1355bbc4 | 281 | }; |
406a9324 | 282 | |
7c23e7e1 | 283 | pcie_0: pcie@290000 { |
406a9324 JH |
284 | compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; |
285 | reg = <0x290000 0x1000 | |
286 | 0x270000 0x1000 | |
287 | 0x271000 0x40>; | |
288 | interrupts = <0 20 0>, <0 21 0>, <0 22 0>; | |
86feafeb | 289 | clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>; |
406a9324 JH |
290 | clock-names = "pcie", "pcie_bus"; |
291 | #address-cells = <3>; | |
292 | #size-cells = <2>; | |
293 | device_type = "pci"; | |
294 | ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */ | |
295 | 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ | |
296 | 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ | |
297 | #interrupt-cells = <1>; | |
298 | interrupt-map-mask = <0 0 0 0>; | |
299 | interrupt-map = <0x0 0 &gic 53>; | |
4b1ced84 | 300 | num-lanes = <4>; |
331d7d6a | 301 | status = "disabled"; |
406a9324 JH |
302 | }; |
303 | ||
7c23e7e1 | 304 | pcie_1: pcie@2a0000 { |
406a9324 JH |
305 | compatible = "samsung,exynos5440-pcie", "snps,dw-pcie"; |
306 | reg = <0x2a0000 0x1000 | |
307 | 0x272000 0x1000 | |
308 | 0x271040 0x40>; | |
309 | interrupts = <0 23 0>, <0 24 0>, <0 25 0>; | |
86feafeb | 310 | clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>; |
406a9324 JH |
311 | clock-names = "pcie", "pcie_bus"; |
312 | #address-cells = <3>; | |
313 | #size-cells = <2>; | |
314 | device_type = "pci"; | |
315 | ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */ | |
316 | 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ | |
317 | 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ | |
318 | #interrupt-cells = <1>; | |
319 | interrupt-map-mask = <0 0 0 0>; | |
320 | interrupt-map = <0x0 0 &gic 56>; | |
4b1ced84 | 321 | num-lanes = <4>; |
331d7d6a | 322 | status = "disabled"; |
406a9324 | 323 | }; |
1355bbc4 | 324 | }; |