[deliverable/linux.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

#include "skeleton.dtsi"
#include "imx23-pinfunc.h"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
		spi0 = &ssp0;
		spi1 = &ssp1;
		usbphy0 = &usbphy0;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <0 14 20 0
					      13 13 13 13>;
				interrupt-names = "empty", "ssp0", "ssp1", "empty",
						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
				#dma-cells = <1>;
				dma-channels = <8>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <56>;
				interrupt-names = "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM0__DUART_RX
						MX23_PAD_PWM1__DUART_TX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_AUART1_RX__AUART1_RX
						MX23_PAD_AUART1_TX__AUART1_TX
						MX23_PAD_AUART1_CTS__AUART1_CTS
						MX23_PAD_AUART1_RTS__AUART1_RTS
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_I2C_SCL__AUART1_TX
						MX23_PAD_I2C_SDA__AUART1_RX
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_D00__GPMI_D00
						MX23_PAD_GPMI_D01__GPMI_D01
						MX23_PAD_GPMI_D02__GPMI_D02
						MX23_PAD_GPMI_D03__GPMI_D03
						MX23_PAD_GPMI_D04__GPMI_D04
						MX23_PAD_GPMI_D05__GPMI_D05
						MX23_PAD_GPMI_D06__GPMI_D06
						MX23_PAD_GPMI_D07__GPMI_D07
						MX23_PAD_GPMI_CLE__GPMI_CLE
						MX23_PAD_GPMI_ALE__GPMI_ALE
						MX23_PAD_GPMI_RDY0__GPMI_RDY0
						MX23_PAD_GPMI_RDY1__GPMI_RDY1
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
						MX23_PAD_GPMI_CE1N__GPMI_CE1N
						MX23_PAD_GPMI_CE0N__GPMI_CE0N
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WPN__GPMI_WPN
						MX23_PAD_GPMI_WRN__GPMI_WRN
						MX23_PAD_GPMI_RDN__GPMI_RDN
					>;
					fsl,drive-strength = <MXS_DRIVE_12mA>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DATA0__SSP1_DATA0
						MX23_PAD_SSP1_DATA1__SSP1_DATA1
						MX23_PAD_SSP1_DATA2__SSP1_DATA2
						MX23_PAD_SSP1_DATA3__SSP1_DATA3
						MX23_PAD_GPMI_D08__SSP1_DATA4
						MX23_PAD_GPMI_D09__SSP1_DATA5
						MX23_PAD_GPMI_D10__SSP1_DATA6
						MX23_PAD_GPMI_D11__SSP1_DATA7
						MX23_PAD_SSP1_CMD__SSP1_CMD
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						MX23_PAD_SSP1_DETECT__SSP1_DETECT
						MX23_PAD_SSP1_SCK__SSP1_SCK
					>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_PWM2__PWM2
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_LCD_D00__LCD_D00
						MX23_PAD_LCD_D01__LCD_D01
						MX23_PAD_LCD_D02__LCD_D02
						MX23_PAD_LCD_D03__LCD_D03
						MX23_PAD_LCD_D04__LCD_D04
						MX23_PAD_LCD_D05__LCD_D05
						MX23_PAD_LCD_D06__LCD_D06
						MX23_PAD_LCD_D07__LCD_D07
						MX23_PAD_LCD_D08__LCD_D08
						MX23_PAD_LCD_D09__LCD_D09
						MX23_PAD_LCD_D10__LCD_D10
						MX23_PAD_LCD_D11__LCD_D11
						MX23_PAD_LCD_D12__LCD_D12
						MX23_PAD_LCD_D13__LCD_D13
						MX23_PAD_LCD_D14__LCD_D14
						MX23_PAD_LCD_D15__LCD_D15
						MX23_PAD_LCD_D16__LCD_D16
						MX23_PAD_LCD_D17__LCD_D17
						MX23_PAD_GPMI_D08__LCD_D18
						MX23_PAD_GPMI_D09__LCD_D19
						MX23_PAD_GPMI_D10__LCD_D20
						MX23_PAD_GPMI_D11__LCD_D21
						MX23_PAD_GPMI_D12__LCD_D22
						MX23_PAD_GPMI_D13__LCD_D23
						MX23_PAD_LCD_DOTCK__LCD_DOTCK
						MX23_PAD_LCD_ENABLE__LCD_ENABLE
						MX23_PAD_LCD_HSYNC__LCD_HSYNC
						MX23_PAD_LCD_VSYNC__LCD_VSYNC
					>;
					fsl,drive-strength = <MXS_DRIVE_4mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_DISABLE>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						MX23_PAD_GPMI_WRN__SSP2_SCK
						MX23_PAD_GPMI_RDY1__SSP2_CMD
						MX23_PAD_GPMI_D00__SSP2_DATA0
						MX23_PAD_GPMI_D03__SSP2_DATA3
					>;
					fsl,drive-strength = <MXS_DRIVE_8mA>;
					fsl,voltage = <MXS_VOLTAGE_HIGH>;
					fsl,pull-up = <MXS_PULL_ENABLE>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <7 5 9 26
					      19 0 25 23
					      60 58 9 0
					      0 0 0 0>;
				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
						  "saif0", "empty", "auart0-rx", "auart0-tx",
						  "auart1-rx", "auart1-tx", "saif1", "empty",
						  "empty", "empty", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				compatible = "fsl,imx23-dcp";
				reg = <0x80028000 0x2000>;
				interrupts = <53 54>;
				status = "okay";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				compatible = "fsl,ocotp";
				reg = <0x8002c000 0x2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				dmas = <&dma_apbx 10>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				dmas = <&dma_apbx 1>;
				dma-names = "tx";
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				dmas = <&dma_apbx 0>;
				dma-names = "rx";
				status = "disabled";
			};

			lradc: lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
				clocks = <&clks 26>;
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			i2c@80058000 {
				reg = <0x80058000 0x2000>;
				dmas = <&dma_apbx 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};

	iio_hwmon {
		compatible = "iio-hwmon";
		io-channels = <&lradc 8>;
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
bc3875f1 LW	12	#include "skeleton.dtsi"
bc3875f1 LW	13	#include "imx23-pinfunc.h"
2954ff39 SG	14
	15	/ {
	16	interrupt-parent = <&icoll>;
	17
ce4c6f9b SG	18	aliases {
	19	gpio0 = &gpio0;
	20	gpio1 = &gpio1;
	21	gpio2 = &gpio2;
a4508394 SG	22	serial0 = &auart0;
a4508394 SG	23	serial1 = &auart1;
6bf6eb09 FE	24	spi0 = &ssp0;
6bf6eb09 FE	25	spi1 = &ssp1;
1f35cc6a	26	usbphy0 = &usbphy0;
ce4c6f9b SG	27	};
ce4c6f9b SG	28
2954ff39	29	cpus {
7925e89f LP	30	#address-cells = <0>;
	31	#size-cells = <0>;
	32
	33	cpu {
	34	compatible = "arm,arm926ej-s";
	35	device_type = "cpu";
2954ff39 SG	36	};
	37	};
	38
	39	apb@80000000 {
	40	compatible = "simple-bus";
	41	#address-cells = <1>;
	42	#size-cells = <1>;
	43	reg = <0x80000000 0x80000>;
	44	ranges;
	45
	46	apbh@80000000 {
	47	compatible = "simple-bus";
	48	#address-cells = <1>;
	49	#size-cells = <1>;
	50	reg = <0x80000000 0x40000>;
	51	ranges;
	52
	53	icoll: interrupt-controller@80000000 {
83a84efc	54	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	55	interrupt-controller;
	56	#interrupt-cells = <1>;
	57	reg = <0x80000000 0x2000>;
	58	};
	59
f30fb03d	60	dma_apbh: dma-apbh@80004000 {
84f3570a	61	compatible = "fsl,imx23-dma-apbh";
640bf060	62	reg = <0x80004000 0x2000>;
f30fb03d SG	63	interrupts = <0 14 20 0
	64	13 13 13 13>;
	65	interrupt-names = "empty", "ssp0", "ssp1", "empty",
	66	"gpmi0", "gpmi1", "gpmi2", "gpmi3";
	67	#dma-cells = <1>;
	68	dma-channels = <8>;
53f9443d	69	clocks = <&clks 15>;
2954ff39 SG	70	};
	71
	72	ecc@80008000 {
640bf060	73	reg = <0x80008000 0x2000>;
2954ff39 SG	74	status = "disabled";
	75	};
	76
a217c46c	77	gpmi-nand@8000c000 {
b9f25f86 HS	78	compatible = "fsl,imx23-gpmi-nand";
	79	#address-cells = <1>;
	80	#size-cells = <1>;
640bf060	81	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86	82	reg-names = "gpmi-nand", "bch";
7f2b9288 SG	83	interrupts = <56>;
7f2b9288 SG	84	interrupt-names = "bch";
53f9443d	85	clocks = <&clks 34>;
b6442559	86	clock-names = "gpmi_io";
f30fb03d SG	87	dmas = <&dma_apbh 4>;
f30fb03d SG	88	dma-names = "rx-tx";
2954ff39 SG	89	status = "disabled";
	90	};
	91
	92	ssp0: ssp@80010000 {
640bf060	93	reg = <0x80010000 0x2000>;
7f2b9288	94	interrupts = <15>;
53f9443d	95	clocks = <&clks 33>;
f30fb03d SG	96	dmas = <&dma_apbh 1>;
f30fb03d SG	97	dma-names = "rx-tx";
2954ff39 SG	98	status = "disabled";
	99	};
	100
	101	etm@80014000 {
640bf060	102	reg = <0x80014000 0x2000>;
2954ff39 SG	103	status = "disabled";
	104	};
	105
	106	pinctrl@80018000 {
	107	#address-cells = <1>;
	108	#size-cells = <0>;
ce4c6f9b	109	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	110	reg = <0x80018000 0x2000>;
2954ff39	111
ce4c6f9b SG	112	gpio0: gpio@0 {
	113	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	114	interrupts = <16>;
	115	gpio-controller;
	116	#gpio-cells = <2>;
	117	interrupt-controller;
	118	#interrupt-cells = <2>;
	119	};
	120
	121	gpio1: gpio@1 {
	122	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	123	interrupts = <17>;
	124	gpio-controller;
	125	#gpio-cells = <2>;
	126	interrupt-controller;
	127	#interrupt-cells = <2>;
	128	};
	129
	130	gpio2: gpio@2 {
	131	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	132	interrupts = <18>;
	133	gpio-controller;
	134	#gpio-cells = <2>;
	135	interrupt-controller;
	136	#interrupt-cells = <2>;
	137	};
	138
2954ff39 SG	139	duart_pins_a: duart@0 {
2954ff39 SG	140	reg = <0>;
f14da767	141	fsl,pinmux-ids = <
bc3875f1 LW	142	MX23_PAD_PWM0__DUART_RX
bc3875f1 LW	143	MX23_PAD_PWM1__DUART_TX
f14da767	144	>;
4191c340 LW	145	fsl,drive-strength = <MXS_DRIVE_4mA>;
	146	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	147	fsl,pull-up = <MXS_PULL_DISABLE>;
2954ff39	148	};
be1ce308	149
a4508394 SG	150	auart0_pins_a: auart0@0 {
	151	reg = <0>;
	152	fsl,pinmux-ids = <
bc3875f1 LW	153	MX23_PAD_AUART1_RX__AUART1_RX
	154	MX23_PAD_AUART1_TX__AUART1_TX
	155	MX23_PAD_AUART1_CTS__AUART1_CTS
	156	MX23_PAD_AUART1_RTS__AUART1_RTS
a4508394	157	>;
4191c340 LW	158	fsl,drive-strength = <MXS_DRIVE_4mA>;
	159	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	160	fsl,pull-up = <MXS_PULL_DISABLE>;
a4508394 SG	161	};
a4508394 SG	162
98916a2f FE	163	auart0_2pins_a: auart0-2pins@0 {
	164	reg = <0>;
	165	fsl,pinmux-ids = <
bc3875f1 LW	166	MX23_PAD_I2C_SCL__AUART1_TX
bc3875f1 LW	167	MX23_PAD_I2C_SDA__AUART1_RX
98916a2f	168	>;
4191c340 LW	169	fsl,drive-strength = <MXS_DRIVE_4mA>;
	170	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	171	fsl,pull-up = <MXS_PULL_DISABLE>;
98916a2f FE	172	};
98916a2f FE	173
b9f25f86 HS	174	gpmi_pins_a: gpmi-nand@0 {
	175	reg = <0>;
	176	fsl,pinmux-ids = <
bc3875f1 LW	177	MX23_PAD_GPMI_D00__GPMI_D00
	178	MX23_PAD_GPMI_D01__GPMI_D01
	179	MX23_PAD_GPMI_D02__GPMI_D02
	180	MX23_PAD_GPMI_D03__GPMI_D03
	181	MX23_PAD_GPMI_D04__GPMI_D04
	182	MX23_PAD_GPMI_D05__GPMI_D05
	183	MX23_PAD_GPMI_D06__GPMI_D06
	184	MX23_PAD_GPMI_D07__GPMI_D07
	185	MX23_PAD_GPMI_CLE__GPMI_CLE
	186	MX23_PAD_GPMI_ALE__GPMI_ALE
	187	MX23_PAD_GPMI_RDY0__GPMI_RDY0
	188	MX23_PAD_GPMI_RDY1__GPMI_RDY1
	189	MX23_PAD_GPMI_WPN__GPMI_WPN
	190	MX23_PAD_GPMI_WRN__GPMI_WRN
	191	MX23_PAD_GPMI_RDN__GPMI_RDN
	192	MX23_PAD_GPMI_CE1N__GPMI_CE1N
	193	MX23_PAD_GPMI_CE0N__GPMI_CE0N
b9f25f86	194	>;
4191c340 LW	195	fsl,drive-strength = <MXS_DRIVE_4mA>;
	196	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	197	fsl,pull-up = <MXS_PULL_DISABLE>;
b9f25f86 HS	198	};
	199
	200	gpmi_pins_fixup: gpmi-pins-fixup {
	201	fsl,pinmux-ids = <
bc3875f1 LW	202	MX23_PAD_GPMI_WPN__GPMI_WPN
	203	MX23_PAD_GPMI_WRN__GPMI_WRN
	204	MX23_PAD_GPMI_RDN__GPMI_RDN
b9f25f86	205	>;
4191c340	206	fsl,drive-strength = <MXS_DRIVE_12mA>;
b9f25f86 HS	207	};
b9f25f86 HS	208
72beabae SG	209	mmc0_4bit_pins_a: mmc0-4bit@0 {
	210	reg = <0>;
	211	fsl,pinmux-ids = <
bc3875f1 LW	212	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	213	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	214	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	215	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	216	MX23_PAD_SSP1_CMD__SSP1_CMD
	217	MX23_PAD_SSP1_SCK__SSP1_SCK
72beabae	218	>;
4191c340 LW	219	fsl,drive-strength = <MXS_DRIVE_8mA>;
	220	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	221	fsl,pull-up = <MXS_PULL_ENABLE>;
72beabae SG	222	};
72beabae SG	223
be1ce308 SG	224	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	225	reg = <0>;
f14da767	226	fsl,pinmux-ids = <
bc3875f1 LW	227	MX23_PAD_SSP1_DATA0__SSP1_DATA0
	228	MX23_PAD_SSP1_DATA1__SSP1_DATA1
	229	MX23_PAD_SSP1_DATA2__SSP1_DATA2
	230	MX23_PAD_SSP1_DATA3__SSP1_DATA3
	231	MX23_PAD_GPMI_D08__SSP1_DATA4
	232	MX23_PAD_GPMI_D09__SSP1_DATA5
	233	MX23_PAD_GPMI_D10__SSP1_DATA6
	234	MX23_PAD_GPMI_D11__SSP1_DATA7
	235	MX23_PAD_SSP1_CMD__SSP1_CMD
	236	MX23_PAD_SSP1_DETECT__SSP1_DETECT
	237	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	238	>;
4191c340 LW	239	fsl,drive-strength = <MXS_DRIVE_8mA>;
	240	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	241	fsl,pull-up = <MXS_PULL_ENABLE>;
be1ce308 SG	242	};
	243
	244	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767	245	fsl,pinmux-ids = <
bc3875f1 LW	246	MX23_PAD_SSP1_DETECT__SSP1_DETECT
bc3875f1 LW	247	MX23_PAD_SSP1_SCK__SSP1_SCK
f14da767	248	>;
4191c340	249	fsl,pull-up = <MXS_PULL_DISABLE>;
be1ce308	250	};
52f7176b SG	251
	252	pwm2_pins_a: pwm2@0 {
	253	reg = <0>;
	254	fsl,pinmux-ids = <
bc3875f1	255	MX23_PAD_PWM2__PWM2
52f7176b	256	>;
4191c340 LW	257	fsl,drive-strength = <MXS_DRIVE_4mA>;
	258	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	259	fsl,pull-up = <MXS_PULL_DISABLE>;
52f7176b	260	};
a915ee42 SG	261
	262	lcdif_24bit_pins_a: lcdif-24bit@0 {
	263	reg = <0>;
	264	fsl,pinmux-ids = <
bc3875f1 LW	265	MX23_PAD_LCD_D00__LCD_D00
	266	MX23_PAD_LCD_D01__LCD_D01
	267	MX23_PAD_LCD_D02__LCD_D02
	268	MX23_PAD_LCD_D03__LCD_D03
	269	MX23_PAD_LCD_D04__LCD_D04
	270	MX23_PAD_LCD_D05__LCD_D05
	271	MX23_PAD_LCD_D06__LCD_D06
	272	MX23_PAD_LCD_D07__LCD_D07
	273	MX23_PAD_LCD_D08__LCD_D08
	274	MX23_PAD_LCD_D09__LCD_D09
	275	MX23_PAD_LCD_D10__LCD_D10
	276	MX23_PAD_LCD_D11__LCD_D11
	277	MX23_PAD_LCD_D12__LCD_D12
	278	MX23_PAD_LCD_D13__LCD_D13
	279	MX23_PAD_LCD_D14__LCD_D14
	280	MX23_PAD_LCD_D15__LCD_D15
	281	MX23_PAD_LCD_D16__LCD_D16
	282	MX23_PAD_LCD_D17__LCD_D17
	283	MX23_PAD_GPMI_D08__LCD_D18
	284	MX23_PAD_GPMI_D09__LCD_D19
	285	MX23_PAD_GPMI_D10__LCD_D20
	286	MX23_PAD_GPMI_D11__LCD_D21
	287	MX23_PAD_GPMI_D12__LCD_D22
	288	MX23_PAD_GPMI_D13__LCD_D23
	289	MX23_PAD_LCD_DOTCK__LCD_DOTCK
	290	MX23_PAD_LCD_ENABLE__LCD_ENABLE
	291	MX23_PAD_LCD_HSYNC__LCD_HSYNC
	292	MX23_PAD_LCD_VSYNC__LCD_VSYNC
a915ee42	293	>;
4191c340 LW	294	fsl,drive-strength = <MXS_DRIVE_4mA>;
	295	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	296	fsl,pull-up = <MXS_PULL_DISABLE>;
a915ee42	297	};
a0487864 FB	298
	299	spi2_pins_a: spi2@0 {
	300	reg = <0>;
	301	fsl,pinmux-ids = <
bc3875f1 LW	302	MX23_PAD_GPMI_WRN__SSP2_SCK
	303	MX23_PAD_GPMI_RDY1__SSP2_CMD
	304	MX23_PAD_GPMI_D00__SSP2_DATA0
	305	MX23_PAD_GPMI_D03__SSP2_DATA3
a0487864	306	>;
4191c340 LW	307	fsl,drive-strength = <MXS_DRIVE_8mA>;
	308	fsl,voltage = <MXS_VOLTAGE_HIGH>;
	309	fsl,pull-up = <MXS_PULL_ENABLE>;
a0487864	310	};
2954ff39 SG	311	};
	312
	313	digctl@8001c000 {
38d6590f	314	compatible = "fsl,imx23-digctl";
2954ff39 SG	315	reg = <0x8001c000 2000>;
	316	status = "disabled";
	317	};
	318
	319	emi@80020000 {
640bf060	320	reg = <0x80020000 0x2000>;
2954ff39 SG	321	status = "disabled";
	322	};
	323
f30fb03d	324	dma_apbx: dma-apbx@80024000 {
84f3570a	325	compatible = "fsl,imx23-dma-apbx";
640bf060	326	reg = <0x80024000 0x2000>;
f30fb03d SG	327	interrupts = <7 5 9 26
	328	19 0 25 23
	329	60 58 9 0
	330	0 0 0 0>;
	331	interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
	332	"saif0", "empty", "auart0-rx", "auart0-tx",
	333	"auart1-rx", "auart1-tx", "saif1", "empty",
	334	"empty", "empty", "empty", "empty";
	335	#dma-cells = <1>;
	336	dma-channels = <16>;
53f9443d	337	clocks = <&clks 16>;
2954ff39 SG	338	};
	339
	340	dcp@80028000 {
7d56a28f	341	compatible = "fsl,imx23-dcp";
640bf060	342	reg = <0x80028000 0x2000>;
7d56a28f MV	343	interrupts = <53 54>;
7d56a28f MV	344	status = "okay";
2954ff39 SG	345	};
	346
	347	pxp@8002a000 {
640bf060	348	reg = <0x8002a000 0x2000>;
2954ff39 SG	349	status = "disabled";
	350	};
	351
	352	ocotp@8002c000 {
69d75a02	353	compatible = "fsl,ocotp";
640bf060	354	reg = <0x8002c000 0x2000>;
2954ff39 SG	355	status = "disabled";
	356	};
	357
	358	axi-ahb@8002e000 {
640bf060	359	reg = <0x8002e000 0x2000>;
2954ff39 SG	360	status = "disabled";
	361	};
	362
	363	lcdif@80030000 {
a915ee42	364	compatible = "fsl,imx23-lcdif";
2954ff39	365	reg = <0x80030000 2000>;
a915ee42	366	interrupts = <46 45>;
53f9443d	367	clocks = <&clks 38>;
2954ff39 SG	368	status = "disabled";
	369	};
	370
	371	ssp1: ssp@80034000 {
640bf060	372	reg = <0x80034000 0x2000>;
7f2b9288	373	interrupts = <2>;
53f9443d	374	clocks = <&clks 33>;
f30fb03d SG	375	dmas = <&dma_apbh 2>;
f30fb03d SG	376	dma-names = "rx-tx";
2954ff39 SG	377	status = "disabled";
	378	};
	379
	380	tvenc@80038000 {
640bf060	381	reg = <0x80038000 0x2000>;
2954ff39 SG	382	status = "disabled";
	383	};
	384	};
	385
	386	apbx@80040000 {
	387	compatible = "simple-bus";
	388	#address-cells = <1>;
	389	#size-cells = <1>;
	390	reg = <0x80040000 0x40000>;
	391	ranges;
	392
53f9443d	393	clks: clkctrl@80040000 {
8f7cf881	394	compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
640bf060	395	reg = <0x80040000 0x2000>;
53f9443d	396	#clock-cells = <1>;
2954ff39 SG	397	};
	398
	399	saif0: saif@80042000 {
640bf060	400	reg = <0x80042000 0x2000>;
f30fb03d SG	401	dmas = <&dma_apbx 4>;
f30fb03d SG	402	dma-names = "rx-tx";
2954ff39 SG	403	status = "disabled";
	404	};
	405
	406	power@80044000 {
640bf060	407	reg = <0x80044000 0x2000>;
2954ff39 SG	408	status = "disabled";
	409	};
	410
	411	saif1: saif@80046000 {
640bf060	412	reg = <0x80046000 0x2000>;
f30fb03d SG	413	dmas = <&dma_apbx 10>;
f30fb03d SG	414	dma-names = "rx-tx";
2954ff39 SG	415	status = "disabled";
	416	};
	417
	418	audio-out@80048000 {
640bf060	419	reg = <0x80048000 0x2000>;
f30fb03d SG	420	dmas = <&dma_apbx 1>;
f30fb03d SG	421	dma-names = "tx";
2954ff39 SG	422	status = "disabled";
	423	};
	424
	425	audio-in@8004c000 {
640bf060	426	reg = <0x8004c000 0x2000>;
f30fb03d SG	427	dmas = <&dma_apbx 0>;
f30fb03d SG	428	dma-names = "rx";
2954ff39 SG	429	status = "disabled";
	430	};
	431
bd798f9c	432	lradc: lradc@80050000 {
1f45188c	433	compatible = "fsl,imx23-lradc";
640bf060	434	reg = <0x80050000 0x2000>;
1f45188c	435	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39	436	status = "disabled";
18da755d	437	clocks = <&clks 26>;
2954ff39 SG	438	};
	439
	440	spdif@80054000 {
	441	reg = <0x80054000 2000>;
f30fb03d SG	442	dmas = <&dma_apbx 2>;
f30fb03d SG	443	dma-names = "tx";
2954ff39 SG	444	status = "disabled";
	445	};
	446
	447	i2c@80058000 {
640bf060	448	reg = <0x80058000 0x2000>;
f30fb03d SG	449	dmas = <&dma_apbx 3>;
f30fb03d SG	450	dma-names = "rx-tx";
2954ff39 SG	451	status = "disabled";
	452	};
	453
	454	rtc@8005c000 {
f98c990c	455	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	456	reg = <0x8005c000 0x2000>;
f98c990c	457	interrupts = <22>;
2954ff39 SG	458	};
2954ff39 SG	459
52f7176b SG	460	pwm: pwm@80064000 {
52f7176b SG	461	compatible = "fsl,imx23-pwm";
640bf060	462	reg = <0x80064000 0x2000>;
53f9443d	463	clocks = <&clks 30>;
52f7176b SG	464	#pwm-cells = <2>;
52f7176b SG	465	fsl,pwm-number = <5>;
2954ff39 SG	466	status = "disabled";
	467	};
	468
	469	timrot@80068000 {
eeca6e60	470	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	471	reg = <0x80068000 0x2000>;
eeca6e60	472	interrupts = <28 29 30 31>;
2efb9504	473	clocks = <&clks 28>;
2954ff39 SG	474	};
	475
	476	auart0: serial@8006c000 {
a4508394	477	compatible = "fsl,imx23-auart";
2954ff39	478	reg = <0x8006c000 0x2000>;
7f2b9288	479	interrupts = <24>;
53f9443d	480	clocks = <&clks 32>;
f30fb03d SG	481	dmas = <&dma_apbx 6>, <&dma_apbx 7>;
f30fb03d SG	482	dma-names = "rx", "tx";
2954ff39 SG	483	status = "disabled";
	484	};
	485
	486	auart1: serial@8006e000 {
a4508394	487	compatible = "fsl,imx23-auart";
2954ff39	488	reg = <0x8006e000 0x2000>;
7f2b9288	489	interrupts = <59>;
53f9443d	490	clocks = <&clks 32>;
f30fb03d SG	491	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
f30fb03d SG	492	dma-names = "rx", "tx";
2954ff39 SG	493	status = "disabled";
	494	};
	495
	496	duart: serial@80070000 {
	497	compatible = "arm,pl011", "arm,primecell";
	498	reg = <0x80070000 0x2000>;
	499	interrupts = <0>;
53f9443d SG	500	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	501	clock-names = "uart", "apb_pclk";
2954ff39 SG	502	status = "disabled";
	503	};
	504
d6475317 FE	505	usbphy0: usbphy@8007c000 {
d6475317 FE	506	compatible = "fsl,imx23-usbphy";
2954ff39	507	reg = <0x8007c000 0x2000>;
d6475317	508	clocks = <&clks 41>;
2954ff39 SG	509	status = "disabled";
	510	};
	511	};
	512	};
	513
	514	ahb@80080000 {
	515	compatible = "simple-bus";
	516	#address-cells = <1>;
	517	#size-cells = <1>;
	518	reg = <0x80080000 0x80000>;
	519	ranges;
	520
d6475317 FE	521	usb0: usb@80080000 {
d6475317 FE	522	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	523	reg = <0x80080000 0x40000>;
d6475317 FE	524	interrupts = <11>;
	525	fsl,usbphy = <&usbphy0>;
	526	clocks = <&clks 40>;
2954ff39 SG	527	status = "disabled";
	528	};
	529	};
bd798f9c AB	530
	531	iio_hwmon {
	532	compatible = "iio-hwmon";
	533	io-channels = <&lradc 8>;
	534	};
2954ff39	535	};