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2954ff39 SG |
1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * The code contained herein is licensed under the GNU General Public | |
5 | * License. You may obtain a copy of the GNU General Public License | |
6 | * Version 2 or later at the following locations: | |
7 | * | |
8 | * http://www.opensource.org/licenses/gpl-license.html | |
9 | * http://www.gnu.org/copyleft/gpl.html | |
10 | */ | |
11 | ||
12 | /include/ "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | interrupt-parent = <&icoll>; | |
16 | ||
ce4c6f9b SG |
17 | aliases { |
18 | gpio0 = &gpio0; | |
19 | gpio1 = &gpio1; | |
20 | gpio2 = &gpio2; | |
a4508394 SG |
21 | serial0 = &auart0; |
22 | serial1 = &auart1; | |
ce4c6f9b SG |
23 | }; |
24 | ||
2954ff39 SG |
25 | cpus { |
26 | cpu@0 { | |
27 | compatible = "arm,arm926ejs"; | |
28 | }; | |
29 | }; | |
30 | ||
31 | apb@80000000 { | |
32 | compatible = "simple-bus"; | |
33 | #address-cells = <1>; | |
34 | #size-cells = <1>; | |
35 | reg = <0x80000000 0x80000>; | |
36 | ranges; | |
37 | ||
38 | apbh@80000000 { | |
39 | compatible = "simple-bus"; | |
40 | #address-cells = <1>; | |
41 | #size-cells = <1>; | |
42 | reg = <0x80000000 0x40000>; | |
43 | ranges; | |
44 | ||
45 | icoll: interrupt-controller@80000000 { | |
46 | compatible = "fsl,imx23-icoll", "fsl,mxs-icoll"; | |
47 | interrupt-controller; | |
48 | #interrupt-cells = <1>; | |
49 | reg = <0x80000000 0x2000>; | |
50 | }; | |
51 | ||
52 | dma-apbh@80004000 { | |
84f3570a | 53 | compatible = "fsl,imx23-dma-apbh"; |
640bf060 | 54 | reg = <0x80004000 0x2000>; |
2954ff39 SG |
55 | }; |
56 | ||
57 | ecc@80008000 { | |
640bf060 | 58 | reg = <0x80008000 0x2000>; |
2954ff39 SG |
59 | status = "disabled"; |
60 | }; | |
61 | ||
a217c46c | 62 | gpmi-nand@8000c000 { |
b9f25f86 HS |
63 | compatible = "fsl,imx23-gpmi-nand"; |
64 | #address-cells = <1>; | |
65 | #size-cells = <1>; | |
640bf060 | 66 | reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>; |
b9f25f86 HS |
67 | reg-names = "gpmi-nand", "bch"; |
68 | interrupts = <13>, <56>; | |
69 | interrupt-names = "gpmi-dma", "bch"; | |
70 | fsl,gpmi-dma-channel = <4>; | |
2954ff39 SG |
71 | status = "disabled"; |
72 | }; | |
73 | ||
74 | ssp0: ssp@80010000 { | |
640bf060 | 75 | reg = <0x80010000 0x2000>; |
be1ce308 SG |
76 | interrupts = <15 14>; |
77 | fsl,ssp-dma-channel = <1>; | |
2954ff39 SG |
78 | status = "disabled"; |
79 | }; | |
80 | ||
81 | etm@80014000 { | |
640bf060 | 82 | reg = <0x80014000 0x2000>; |
2954ff39 SG |
83 | status = "disabled"; |
84 | }; | |
85 | ||
86 | pinctrl@80018000 { | |
87 | #address-cells = <1>; | |
88 | #size-cells = <0>; | |
ce4c6f9b | 89 | compatible = "fsl,imx23-pinctrl", "simple-bus"; |
640bf060 | 90 | reg = <0x80018000 0x2000>; |
2954ff39 | 91 | |
ce4c6f9b SG |
92 | gpio0: gpio@0 { |
93 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
94 | interrupts = <16>; | |
95 | gpio-controller; | |
96 | #gpio-cells = <2>; | |
97 | interrupt-controller; | |
98 | #interrupt-cells = <2>; | |
99 | }; | |
100 | ||
101 | gpio1: gpio@1 { | |
102 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
103 | interrupts = <17>; | |
104 | gpio-controller; | |
105 | #gpio-cells = <2>; | |
106 | interrupt-controller; | |
107 | #interrupt-cells = <2>; | |
108 | }; | |
109 | ||
110 | gpio2: gpio@2 { | |
111 | compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; | |
112 | interrupts = <18>; | |
113 | gpio-controller; | |
114 | #gpio-cells = <2>; | |
115 | interrupt-controller; | |
116 | #interrupt-cells = <2>; | |
117 | }; | |
118 | ||
2954ff39 SG |
119 | duart_pins_a: duart@0 { |
120 | reg = <0>; | |
f14da767 SG |
121 | fsl,pinmux-ids = < |
122 | 0x11a2 /* MX23_PAD_PWM0__DUART_RX */ | |
123 | 0x11b2 /* MX23_PAD_PWM1__DUART_TX */ | |
124 | >; | |
2954ff39 SG |
125 | fsl,drive-strength = <0>; |
126 | fsl,voltage = <1>; | |
127 | fsl,pull-up = <0>; | |
128 | }; | |
be1ce308 | 129 | |
a4508394 SG |
130 | auart0_pins_a: auart0@0 { |
131 | reg = <0>; | |
132 | fsl,pinmux-ids = < | |
133 | 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */ | |
134 | 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */ | |
135 | 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */ | |
136 | 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */ | |
137 | >; | |
138 | fsl,drive-strength = <0>; | |
139 | fsl,voltage = <1>; | |
140 | fsl,pull-up = <0>; | |
141 | }; | |
142 | ||
b9f25f86 HS |
143 | gpmi_pins_a: gpmi-nand@0 { |
144 | reg = <0>; | |
145 | fsl,pinmux-ids = < | |
146 | 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */ | |
147 | 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */ | |
148 | 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */ | |
149 | 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */ | |
150 | 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */ | |
151 | 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */ | |
152 | 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */ | |
153 | 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */ | |
154 | 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */ | |
155 | 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */ | |
156 | 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */ | |
157 | 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */ | |
158 | 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ | |
159 | 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ | |
160 | 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ | |
161 | 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */ | |
162 | 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */ | |
163 | >; | |
164 | fsl,drive-strength = <0>; | |
165 | fsl,voltage = <1>; | |
166 | fsl,pull-up = <0>; | |
167 | }; | |
168 | ||
169 | gpmi_pins_fixup: gpmi-pins-fixup { | |
170 | fsl,pinmux-ids = < | |
171 | 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */ | |
172 | 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */ | |
173 | 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */ | |
174 | >; | |
175 | fsl,drive-strength = <2>; | |
176 | }; | |
177 | ||
72beabae SG |
178 | mmc0_4bit_pins_a: mmc0-4bit@0 { |
179 | reg = <0>; | |
180 | fsl,pinmux-ids = < | |
181 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | |
182 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | |
183 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | |
184 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | |
185 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | |
186 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
187 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
188 | >; | |
189 | fsl,drive-strength = <1>; | |
190 | fsl,voltage = <1>; | |
191 | fsl,pull-up = <1>; | |
192 | }; | |
193 | ||
be1ce308 SG |
194 | mmc0_8bit_pins_a: mmc0-8bit@0 { |
195 | reg = <0>; | |
f14da767 SG |
196 | fsl,pinmux-ids = < |
197 | 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */ | |
198 | 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */ | |
199 | 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */ | |
200 | 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */ | |
201 | 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */ | |
202 | 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */ | |
203 | 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */ | |
204 | 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */ | |
205 | 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */ | |
206 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
207 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
208 | >; | |
be1ce308 SG |
209 | fsl,drive-strength = <1>; |
210 | fsl,voltage = <1>; | |
211 | fsl,pull-up = <1>; | |
212 | }; | |
213 | ||
214 | mmc0_pins_fixup: mmc0-pins-fixup { | |
f14da767 SG |
215 | fsl,pinmux-ids = < |
216 | 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */ | |
217 | 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */ | |
218 | >; | |
be1ce308 SG |
219 | fsl,pull-up = <0>; |
220 | }; | |
52f7176b SG |
221 | |
222 | pwm2_pins_a: pwm2@0 { | |
223 | reg = <0>; | |
224 | fsl,pinmux-ids = < | |
225 | 0x11c0 /* MX23_PAD_PWM2__PWM2 */ | |
226 | >; | |
227 | fsl,drive-strength = <0>; | |
228 | fsl,voltage = <1>; | |
229 | fsl,pull-up = <0>; | |
230 | }; | |
a915ee42 SG |
231 | |
232 | lcdif_24bit_pins_a: lcdif-24bit@0 { | |
233 | reg = <0>; | |
234 | fsl,pinmux-ids = < | |
235 | 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */ | |
236 | 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */ | |
237 | 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */ | |
238 | 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */ | |
239 | 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */ | |
240 | 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */ | |
241 | 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */ | |
242 | 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */ | |
243 | 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */ | |
244 | 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */ | |
245 | 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */ | |
246 | 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */ | |
247 | 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */ | |
248 | 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */ | |
249 | 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */ | |
250 | 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */ | |
251 | 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */ | |
252 | 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */ | |
253 | 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */ | |
254 | 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */ | |
255 | 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */ | |
256 | 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */ | |
257 | 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */ | |
258 | 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */ | |
259 | 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */ | |
260 | 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */ | |
261 | 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */ | |
262 | 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */ | |
263 | >; | |
264 | fsl,drive-strength = <0>; | |
265 | fsl,voltage = <1>; | |
266 | fsl,pull-up = <0>; | |
267 | }; | |
2954ff39 SG |
268 | }; |
269 | ||
270 | digctl@8001c000 { | |
271 | reg = <0x8001c000 2000>; | |
272 | status = "disabled"; | |
273 | }; | |
274 | ||
275 | emi@80020000 { | |
640bf060 | 276 | reg = <0x80020000 0x2000>; |
2954ff39 SG |
277 | status = "disabled"; |
278 | }; | |
279 | ||
280 | dma-apbx@80024000 { | |
84f3570a | 281 | compatible = "fsl,imx23-dma-apbx"; |
640bf060 | 282 | reg = <0x80024000 0x2000>; |
2954ff39 SG |
283 | }; |
284 | ||
285 | dcp@80028000 { | |
640bf060 | 286 | reg = <0x80028000 0x2000>; |
2954ff39 SG |
287 | status = "disabled"; |
288 | }; | |
289 | ||
290 | pxp@8002a000 { | |
640bf060 | 291 | reg = <0x8002a000 0x2000>; |
2954ff39 SG |
292 | status = "disabled"; |
293 | }; | |
294 | ||
295 | ocotp@8002c000 { | |
640bf060 | 296 | reg = <0x8002c000 0x2000>; |
2954ff39 SG |
297 | status = "disabled"; |
298 | }; | |
299 | ||
300 | axi-ahb@8002e000 { | |
640bf060 | 301 | reg = <0x8002e000 0x2000>; |
2954ff39 SG |
302 | status = "disabled"; |
303 | }; | |
304 | ||
305 | lcdif@80030000 { | |
a915ee42 | 306 | compatible = "fsl,imx23-lcdif"; |
2954ff39 | 307 | reg = <0x80030000 2000>; |
a915ee42 | 308 | interrupts = <46 45>; |
2954ff39 SG |
309 | status = "disabled"; |
310 | }; | |
311 | ||
312 | ssp1: ssp@80034000 { | |
640bf060 | 313 | reg = <0x80034000 0x2000>; |
be1ce308 SG |
314 | interrupts = <2 20>; |
315 | fsl,ssp-dma-channel = <2>; | |
2954ff39 SG |
316 | status = "disabled"; |
317 | }; | |
318 | ||
319 | tvenc@80038000 { | |
640bf060 | 320 | reg = <0x80038000 0x2000>; |
2954ff39 SG |
321 | status = "disabled"; |
322 | }; | |
323 | }; | |
324 | ||
325 | apbx@80040000 { | |
326 | compatible = "simple-bus"; | |
327 | #address-cells = <1>; | |
328 | #size-cells = <1>; | |
329 | reg = <0x80040000 0x40000>; | |
330 | ranges; | |
331 | ||
332 | clkctl@80040000 { | |
640bf060 | 333 | reg = <0x80040000 0x2000>; |
2954ff39 SG |
334 | status = "disabled"; |
335 | }; | |
336 | ||
337 | saif0: saif@80042000 { | |
640bf060 | 338 | reg = <0x80042000 0x2000>; |
2954ff39 SG |
339 | status = "disabled"; |
340 | }; | |
341 | ||
342 | power@80044000 { | |
640bf060 | 343 | reg = <0x80044000 0x2000>; |
2954ff39 SG |
344 | status = "disabled"; |
345 | }; | |
346 | ||
347 | saif1: saif@80046000 { | |
640bf060 | 348 | reg = <0x80046000 0x2000>; |
2954ff39 SG |
349 | status = "disabled"; |
350 | }; | |
351 | ||
352 | audio-out@80048000 { | |
640bf060 | 353 | reg = <0x80048000 0x2000>; |
2954ff39 SG |
354 | status = "disabled"; |
355 | }; | |
356 | ||
357 | audio-in@8004c000 { | |
640bf060 | 358 | reg = <0x8004c000 0x2000>; |
2954ff39 SG |
359 | status = "disabled"; |
360 | }; | |
361 | ||
362 | lradc@80050000 { | |
640bf060 | 363 | reg = <0x80050000 0x2000>; |
2954ff39 SG |
364 | status = "disabled"; |
365 | }; | |
366 | ||
367 | spdif@80054000 { | |
368 | reg = <0x80054000 2000>; | |
369 | status = "disabled"; | |
370 | }; | |
371 | ||
372 | i2c@80058000 { | |
640bf060 | 373 | reg = <0x80058000 0x2000>; |
2954ff39 SG |
374 | status = "disabled"; |
375 | }; | |
376 | ||
377 | rtc@8005c000 { | |
f98c990c | 378 | compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; |
640bf060 | 379 | reg = <0x8005c000 0x2000>; |
f98c990c | 380 | interrupts = <22>; |
2954ff39 SG |
381 | }; |
382 | ||
52f7176b SG |
383 | pwm: pwm@80064000 { |
384 | compatible = "fsl,imx23-pwm"; | |
640bf060 | 385 | reg = <0x80064000 0x2000>; |
52f7176b SG |
386 | #pwm-cells = <2>; |
387 | fsl,pwm-number = <5>; | |
2954ff39 SG |
388 | status = "disabled"; |
389 | }; | |
390 | ||
391 | timrot@80068000 { | |
640bf060 | 392 | reg = <0x80068000 0x2000>; |
2954ff39 SG |
393 | status = "disabled"; |
394 | }; | |
395 | ||
396 | auart0: serial@8006c000 { | |
a4508394 | 397 | compatible = "fsl,imx23-auart"; |
2954ff39 | 398 | reg = <0x8006c000 0x2000>; |
a4508394 | 399 | interrupts = <24 25 23>; |
2954ff39 SG |
400 | status = "disabled"; |
401 | }; | |
402 | ||
403 | auart1: serial@8006e000 { | |
a4508394 | 404 | compatible = "fsl,imx23-auart"; |
2954ff39 | 405 | reg = <0x8006e000 0x2000>; |
a4508394 | 406 | interrupts = <59 60 58>; |
2954ff39 SG |
407 | status = "disabled"; |
408 | }; | |
409 | ||
410 | duart: serial@80070000 { | |
411 | compatible = "arm,pl011", "arm,primecell"; | |
412 | reg = <0x80070000 0x2000>; | |
413 | interrupts = <0>; | |
414 | status = "disabled"; | |
415 | }; | |
416 | ||
417 | usbphy@8007c000 { | |
418 | reg = <0x8007c000 0x2000>; | |
419 | status = "disabled"; | |
420 | }; | |
421 | }; | |
422 | }; | |
423 | ||
424 | ahb@80080000 { | |
425 | compatible = "simple-bus"; | |
426 | #address-cells = <1>; | |
427 | #size-cells = <1>; | |
428 | reg = <0x80080000 0x80000>; | |
429 | ranges; | |
430 | ||
431 | usbctrl@80080000 { | |
640bf060 | 432 | reg = <0x80080000 0x40000>; |
2954ff39 SG |
433 | status = "disabled"; |
434 | }; | |
435 | }; | |
436 | }; |