[deliverable/linux.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
	};

	cpus {
		#address-cells = <0>;
		#size-cells = <0>;

		cpu {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma_apbh: dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 0x2000>;
				interrupts = <0 14 20 0
					      13 13 13 13>;
				interrupt-names = "empty", "ssp0", "ssp1", "empty",
						  "gpmi0", "gpmi1", "gpmi2", "gpmi3";
				#dma-cells = <1>;
				dma-channels = <8>;
				clocks = <&clks 15>;
			};

			ecc@80008000 {
				reg = <0x80008000 0x2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx23-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <56>;
				interrupt-names = "bch";
				clocks = <&clks 34>;
				clock-names = "gpmi_io";
				dmas = <&dma_apbh 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 0x2000>;
				interrupts = <15>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 1>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 0x2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 0x2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11a2 /* MX23_PAD_PWM0__DUART_RX */
						0x11b2 /* MX23_PAD_PWM1__DUART_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
						0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
						0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
						0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_2pins_a: auart0-2pins@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
						0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
						0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
						0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
						0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
						0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
						0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
						0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
						0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
						0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
						0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
						0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
						0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
						0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
						0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
						0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
						0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
						0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N	*/
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_pins_fixup: gpmi-pins-fixup {
					fsl,pinmux-ids = <
						0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
						0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
						0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
					>;
					fsl,drive-strength = <2>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
						0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
						0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
						0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
						0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,pull-up = <0>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11c0 /* MX23_PAD_PWM2__PWM2 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				lcdif_24bit_pins_a: lcdif-24bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
						0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
						0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
						0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
						0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
						0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
						0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
						0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
						0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
						0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
						0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
						0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
						0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
						0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
						0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
						0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
						0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
						0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
						0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
						0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
						0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
						0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
						0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
						0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
						0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
						0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
						0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
						0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				spi2_pins_a: spi2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
						0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
						0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
						0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
			};

			digctl@8001c000 {
				compatible = "fsl,imx23-digctl";
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 0x2000>;
				status = "disabled";
			};

			dma_apbx: dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 0x2000>;
				interrupts = <7 5 9 26
					      19 0 25 23
					      60 58 9 0
					      0 0 0 0>;
				interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
						  "saif0", "empty", "auart0-rx", "auart0-tx",
						  "auart1-rx", "auart1-tx", "saif1", "empty",
						  "empty", "empty", "empty", "empty";
				#dma-cells = <1>;
				dma-channels = <16>;
				clocks = <&clks 16>;
			};

			dcp@80028000 {
				reg = <0x80028000 0x2000>;
				status = "disabled";
			};

			pxp@8002a000 {
				reg = <0x8002a000 0x2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				compatible = "fsl,ocotp";
				reg = <0x8002c000 0x2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 0x2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				compatible = "fsl,imx23-lcdif";
				reg = <0x80030000 2000>;
				interrupts = <46 45>;
				clocks = <&clks 38>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 0x2000>;
				interrupts = <2>;
				clocks = <&clks 33>;
				dmas = <&dma_apbh 2>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 0x2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clks: clkctrl@80040000 {
				compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
				reg = <0x80040000 0x2000>;
				#clock-cells = <1>;
			};

			saif0: saif@80042000 {
				reg = <0x80042000 0x2000>;
				dmas = <&dma_apbx 4>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 0x2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 0x2000>;
				dmas = <&dma_apbx 10>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 0x2000>;
				dmas = <&dma_apbx 1>;
				dma-names = "tx";
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 0x2000>;
				dmas = <&dma_apbx 0>;
				dma-names = "rx";
				status = "disabled";
			};

			lradc@80050000 {
				compatible = "fsl,imx23-lradc";
				reg = <0x80050000 0x2000>;
				interrupts = <36 37 38 39 40 41 42 43 44>;
				status = "disabled";
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				dmas = <&dma_apbx 2>;
				dma-names = "tx";
				status = "disabled";
			};

			i2c@80058000 {
				reg = <0x80058000 0x2000>;
				dmas = <&dma_apbx 3>;
				dma-names = "rx-tx";
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 0x2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 0x2000>;
				clocks = <&clks 30>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				compatible = "fsl,imx23-timrot", "fsl,timrot";
				reg = <0x80068000 0x2000>;
				interrupts = <28 29 30 31>;
				clocks = <&clks 28>;
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 6>, <&dma_apbx 7>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59>;
				clocks = <&clks 32>;
				dmas = <&dma_apbx 8>, <&dma_apbx 9>;
				dma-names = "rx", "tx";
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				clocks = <&clks 32>, <&clks 16>;
				clock-names = "uart", "apb_pclk";
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				compatible = "fsl,imx23-usbphy";
				reg = <0x8007c000 0x2000>;
				clocks = <&clks 41>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usb0: usb@80080000 {
			compatible = "fsl,imx23-usb", "fsl,imx27-usb";
			reg = <0x80080000 0x40000>;
			interrupts = <11>;
			fsl,usbphy = <&usbphy0>;
			clocks = <&clks 40>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	interrupt-parent = <&icoll>;
	16
ce4c6f9b SG	17	aliases {
	18	gpio0 = &gpio0;
	19	gpio1 = &gpio1;
	20	gpio2 = &gpio2;
a4508394 SG	21	serial0 = &auart0;
a4508394 SG	22	serial1 = &auart1;
ce4c6f9b SG	23	};
ce4c6f9b SG	24
2954ff39	25	cpus {
7925e89f LP	26	#address-cells = <0>;
	27	#size-cells = <0>;
	28
	29	cpu {
	30	compatible = "arm,arm926ej-s";
	31	device_type = "cpu";
2954ff39 SG	32	};
	33	};
	34
	35	apb@80000000 {
	36	compatible = "simple-bus";
	37	#address-cells = <1>;
	38	#size-cells = <1>;
	39	reg = <0x80000000 0x80000>;
	40	ranges;
	41
	42	apbh@80000000 {
	43	compatible = "simple-bus";
	44	#address-cells = <1>;
	45	#size-cells = <1>;
	46	reg = <0x80000000 0x40000>;
	47	ranges;
	48
	49	icoll: interrupt-controller@80000000 {
83a84efc	50	compatible = "fsl,imx23-icoll", "fsl,icoll";
2954ff39 SG	51	interrupt-controller;
	52	#interrupt-cells = <1>;
	53	reg = <0x80000000 0x2000>;
	54	};
	55
f30fb03d	56	dma_apbh: dma-apbh@80004000 {
84f3570a	57	compatible = "fsl,imx23-dma-apbh";
640bf060	58	reg = <0x80004000 0x2000>;
f30fb03d SG	59	interrupts = <0 14 20 0
	60	13 13 13 13>;
	61	interrupt-names = "empty", "ssp0", "ssp1", "empty",
	62	"gpmi0", "gpmi1", "gpmi2", "gpmi3";
	63	#dma-cells = <1>;
	64	dma-channels = <8>;
53f9443d	65	clocks = <&clks 15>;
2954ff39 SG	66	};
	67
	68	ecc@80008000 {
640bf060	69	reg = <0x80008000 0x2000>;
2954ff39 SG	70	status = "disabled";
	71	};
	72
a217c46c	73	gpmi-nand@8000c000 {
b9f25f86 HS	74	compatible = "fsl,imx23-gpmi-nand";
	75	#address-cells = <1>;
	76	#size-cells = <1>;
640bf060	77	reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
b9f25f86	78	reg-names = "gpmi-nand", "bch";
7f2b9288 SG	79	interrupts = <56>;
7f2b9288 SG	80	interrupt-names = "bch";
53f9443d	81	clocks = <&clks 34>;
b6442559	82	clock-names = "gpmi_io";
f30fb03d SG	83	dmas = <&dma_apbh 4>;
f30fb03d SG	84	dma-names = "rx-tx";
2954ff39 SG	85	status = "disabled";
	86	};
	87
	88	ssp0: ssp@80010000 {
640bf060	89	reg = <0x80010000 0x2000>;
7f2b9288	90	interrupts = <15>;
53f9443d	91	clocks = <&clks 33>;
f30fb03d SG	92	dmas = <&dma_apbh 1>;
f30fb03d SG	93	dma-names = "rx-tx";
2954ff39 SG	94	status = "disabled";
	95	};
	96
	97	etm@80014000 {
640bf060	98	reg = <0x80014000 0x2000>;
2954ff39 SG	99	status = "disabled";
	100	};
	101
	102	pinctrl@80018000 {
	103	#address-cells = <1>;
	104	#size-cells = <0>;
ce4c6f9b	105	compatible = "fsl,imx23-pinctrl", "simple-bus";
640bf060	106	reg = <0x80018000 0x2000>;
2954ff39	107
ce4c6f9b SG	108	gpio0: gpio@0 {
	109	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	110	interrupts = <16>;
	111	gpio-controller;
	112	#gpio-cells = <2>;
	113	interrupt-controller;
	114	#interrupt-cells = <2>;
	115	};
	116
	117	gpio1: gpio@1 {
	118	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	119	interrupts = <17>;
	120	gpio-controller;
	121	#gpio-cells = <2>;
	122	interrupt-controller;
	123	#interrupt-cells = <2>;
	124	};
	125
	126	gpio2: gpio@2 {
	127	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	128	interrupts = <18>;
	129	gpio-controller;
	130	#gpio-cells = <2>;
	131	interrupt-controller;
	132	#interrupt-cells = <2>;
	133	};
	134
2954ff39 SG	135	duart_pins_a: duart@0 {
2954ff39 SG	136	reg = <0>;
f14da767 SG	137	fsl,pinmux-ids = <
	138	0x11a2 /* MX23_PAD_PWM0__DUART_RX */
	139	0x11b2 /* MX23_PAD_PWM1__DUART_TX */
	140	>;
2954ff39 SG	141	fsl,drive-strength = <0>;
	142	fsl,voltage = <1>;
	143	fsl,pull-up = <0>;
	144	};
be1ce308	145
a4508394 SG	146	auart0_pins_a: auart0@0 {
	147	reg = <0>;
	148	fsl,pinmux-ids = <
	149	0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
	150	0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
	151	0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
	152	0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
	153	>;
	154	fsl,drive-strength = <0>;
	155	fsl,voltage = <1>;
	156	fsl,pull-up = <0>;
	157	};
	158
98916a2f FE	159	auart0_2pins_a: auart0-2pins@0 {
	160	reg = <0>;
	161	fsl,pinmux-ids = <
	162	0x01e2 /* MX23_PAD_I2C_SCL__AUART1_TX */
	163	0x01f2 /* MX23_PAD_I2C_SDA__AUART1_RX */
	164	>;
	165	fsl,drive-strength = <0>;
	166	fsl,voltage = <1>;
	167	fsl,pull-up = <0>;
	168	};
	169
b9f25f86 HS	170	gpmi_pins_a: gpmi-nand@0 {
	171	reg = <0>;
	172	fsl,pinmux-ids = <
	173	0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
	174	0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
	175	0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
	176	0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
	177	0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
	178	0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
	179	0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
	180	0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
	181	0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
	182	0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
	183	0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
	184	0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
	185	0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
	186	0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
	187	0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
	188	0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
	189	0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
	190	>;
	191	fsl,drive-strength = <0>;
	192	fsl,voltage = <1>;
	193	fsl,pull-up = <0>;
	194	};
	195
	196	gpmi_pins_fixup: gpmi-pins-fixup {
	197	fsl,pinmux-ids = <
	198	0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
	199	0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
	200	0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
	201	>;
	202	fsl,drive-strength = <2>;
	203	};
	204
72beabae SG	205	mmc0_4bit_pins_a: mmc0-4bit@0 {
	206	reg = <0>;
	207	fsl,pinmux-ids = <
	208	0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
	209	0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
	210	0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
	211	0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
	212	0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
72beabae SG	213	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	214	>;
	215	fsl,drive-strength = <1>;
	216	fsl,voltage = <1>;
	217	fsl,pull-up = <1>;
	218	};
	219
be1ce308 SG	220	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	221	reg = <0>;
f14da767 SG	222	fsl,pinmux-ids = <
	223	0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
	224	0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
	225	0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
	226	0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
	227	0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
	228	0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
	229	0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
	230	0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
	231	0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
	232	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	233	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	234	>;
be1ce308 SG	235	fsl,drive-strength = <1>;
	236	fsl,voltage = <1>;
	237	fsl,pull-up = <1>;
	238	};
	239
	240	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767 SG	241	fsl,pinmux-ids = <
	242	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	243	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	244	>;
be1ce308 SG	245	fsl,pull-up = <0>;
be1ce308 SG	246	};
52f7176b SG	247
	248	pwm2_pins_a: pwm2@0 {
	249	reg = <0>;
	250	fsl,pinmux-ids = <
	251	0x11c0 /* MX23_PAD_PWM2__PWM2 */
	252	>;
	253	fsl,drive-strength = <0>;
	254	fsl,voltage = <1>;
	255	fsl,pull-up = <0>;
	256	};
a915ee42 SG	257
	258	lcdif_24bit_pins_a: lcdif-24bit@0 {
	259	reg = <0>;
	260	fsl,pinmux-ids = <
	261	0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
	262	0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
	263	0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
	264	0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
	265	0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
	266	0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
	267	0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
	268	0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
	269	0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
	270	0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
	271	0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
	272	0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
	273	0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
	274	0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
	275	0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
	276	0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
	277	0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
	278	0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
	279	0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
	280	0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
	281	0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
	282	0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
	283	0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
	284	0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
	285	0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
	286	0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
	287	0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
	288	0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
	289	>;
	290	fsl,drive-strength = <0>;
	291	fsl,voltage = <1>;
	292	fsl,pull-up = <0>;
	293	};
a0487864 FB	294
	295	spi2_pins_a: spi2@0 {
	296	reg = <0>;
	297	fsl,pinmux-ids = <
	298	0x0182 /* MX23_PAD_GPMI_WRN__SSP2_SCK */
	299	0x0142 /* MX23_PAD_GPMI_RDY1__SSP2_CMD */
	300	0x0002 /* MX23_PAD_GPMI_D00__SSP2_DATA0 */
	301	0x0032 /* MX23_PAD_GPMI_D03__SSP2_DATA3 */
	302	>;
	303	fsl,drive-strength = <1>;
	304	fsl,voltage = <1>;
	305	fsl,pull-up = <1>;
	306	};
2954ff39 SG	307	};
	308
	309	digctl@8001c000 {
38d6590f	310	compatible = "fsl,imx23-digctl";
2954ff39 SG	311	reg = <0x8001c000 2000>;
	312	status = "disabled";
	313	};
	314
	315	emi@80020000 {
640bf060	316	reg = <0x80020000 0x2000>;
2954ff39 SG	317	status = "disabled";
	318	};
	319
f30fb03d	320	dma_apbx: dma-apbx@80024000 {
84f3570a	321	compatible = "fsl,imx23-dma-apbx";
640bf060	322	reg = <0x80024000 0x2000>;
f30fb03d SG	323	interrupts = <7 5 9 26
	324	19 0 25 23
	325	60 58 9 0
	326	0 0 0 0>;
	327	interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
	328	"saif0", "empty", "auart0-rx", "auart0-tx",
	329	"auart1-rx", "auart1-tx", "saif1", "empty",
	330	"empty", "empty", "empty", "empty";
	331	#dma-cells = <1>;
	332	dma-channels = <16>;
53f9443d	333	clocks = <&clks 16>;
2954ff39 SG	334	};
	335
	336	dcp@80028000 {
640bf060	337	reg = <0x80028000 0x2000>;
2954ff39 SG	338	status = "disabled";
	339	};
	340
	341	pxp@8002a000 {
640bf060	342	reg = <0x8002a000 0x2000>;
2954ff39 SG	343	status = "disabled";
	344	};
	345
	346	ocotp@8002c000 {
69d75a02	347	compatible = "fsl,ocotp";
640bf060	348	reg = <0x8002c000 0x2000>;
2954ff39 SG	349	status = "disabled";
	350	};
	351
	352	axi-ahb@8002e000 {
640bf060	353	reg = <0x8002e000 0x2000>;
2954ff39 SG	354	status = "disabled";
	355	};
	356
	357	lcdif@80030000 {
a915ee42	358	compatible = "fsl,imx23-lcdif";
2954ff39	359	reg = <0x80030000 2000>;
a915ee42	360	interrupts = <46 45>;
53f9443d	361	clocks = <&clks 38>;
2954ff39 SG	362	status = "disabled";
	363	};
	364
	365	ssp1: ssp@80034000 {
640bf060	366	reg = <0x80034000 0x2000>;
7f2b9288	367	interrupts = <2>;
53f9443d	368	clocks = <&clks 33>;
f30fb03d SG	369	dmas = <&dma_apbh 2>;
f30fb03d SG	370	dma-names = "rx-tx";
2954ff39 SG	371	status = "disabled";
	372	};
	373
	374	tvenc@80038000 {
640bf060	375	reg = <0x80038000 0x2000>;
2954ff39 SG	376	status = "disabled";
	377	};
	378	};
	379
	380	apbx@80040000 {
	381	compatible = "simple-bus";
	382	#address-cells = <1>;
	383	#size-cells = <1>;
	384	reg = <0x80040000 0x40000>;
	385	ranges;
	386
53f9443d	387	clks: clkctrl@80040000 {
8f7cf881	388	compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
640bf060	389	reg = <0x80040000 0x2000>;
53f9443d	390	#clock-cells = <1>;
2954ff39 SG	391	};
	392
	393	saif0: saif@80042000 {
640bf060	394	reg = <0x80042000 0x2000>;
f30fb03d SG	395	dmas = <&dma_apbx 4>;
f30fb03d SG	396	dma-names = "rx-tx";
2954ff39 SG	397	status = "disabled";
	398	};
	399
	400	power@80044000 {
640bf060	401	reg = <0x80044000 0x2000>;
2954ff39 SG	402	status = "disabled";
	403	};
	404
	405	saif1: saif@80046000 {
640bf060	406	reg = <0x80046000 0x2000>;
f30fb03d SG	407	dmas = <&dma_apbx 10>;
f30fb03d SG	408	dma-names = "rx-tx";
2954ff39 SG	409	status = "disabled";
	410	};
	411
	412	audio-out@80048000 {
640bf060	413	reg = <0x80048000 0x2000>;
f30fb03d SG	414	dmas = <&dma_apbx 1>;
f30fb03d SG	415	dma-names = "tx";
2954ff39 SG	416	status = "disabled";
	417	};
	418
	419	audio-in@8004c000 {
640bf060	420	reg = <0x8004c000 0x2000>;
f30fb03d SG	421	dmas = <&dma_apbx 0>;
f30fb03d SG	422	dma-names = "rx";
2954ff39 SG	423	status = "disabled";
	424	};
	425
	426	lradc@80050000 {
1f45188c	427	compatible = "fsl,imx23-lradc";
640bf060	428	reg = <0x80050000 0x2000>;
1f45188c	429	interrupts = <36 37 38 39 40 41 42 43 44>;
2954ff39 SG	430	status = "disabled";
	431	};
	432
	433	spdif@80054000 {
	434	reg = <0x80054000 2000>;
f30fb03d SG	435	dmas = <&dma_apbx 2>;
f30fb03d SG	436	dma-names = "tx";
2954ff39 SG	437	status = "disabled";
	438	};
	439
	440	i2c@80058000 {
640bf060	441	reg = <0x80058000 0x2000>;
f30fb03d SG	442	dmas = <&dma_apbx 3>;
f30fb03d SG	443	dma-names = "rx-tx";
2954ff39 SG	444	status = "disabled";
	445	};
	446
	447	rtc@8005c000 {
f98c990c	448	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
640bf060	449	reg = <0x8005c000 0x2000>;
f98c990c	450	interrupts = <22>;
2954ff39 SG	451	};
2954ff39 SG	452
52f7176b SG	453	pwm: pwm@80064000 {
52f7176b SG	454	compatible = "fsl,imx23-pwm";
640bf060	455	reg = <0x80064000 0x2000>;
53f9443d	456	clocks = <&clks 30>;
52f7176b SG	457	#pwm-cells = <2>;
52f7176b SG	458	fsl,pwm-number = <5>;
2954ff39 SG	459	status = "disabled";
	460	};
	461
	462	timrot@80068000 {
eeca6e60	463	compatible = "fsl,imx23-timrot", "fsl,timrot";
640bf060	464	reg = <0x80068000 0x2000>;
eeca6e60	465	interrupts = <28 29 30 31>;
2efb9504	466	clocks = <&clks 28>;
2954ff39 SG	467	};
	468
	469	auart0: serial@8006c000 {
a4508394	470	compatible = "fsl,imx23-auart";
2954ff39	471	reg = <0x8006c000 0x2000>;
7f2b9288	472	interrupts = <24>;
53f9443d	473	clocks = <&clks 32>;
f30fb03d SG	474	dmas = <&dma_apbx 6>, <&dma_apbx 7>;
f30fb03d SG	475	dma-names = "rx", "tx";
2954ff39 SG	476	status = "disabled";
	477	};
	478
	479	auart1: serial@8006e000 {
a4508394	480	compatible = "fsl,imx23-auart";
2954ff39	481	reg = <0x8006e000 0x2000>;
7f2b9288	482	interrupts = <59>;
53f9443d	483	clocks = <&clks 32>;
f30fb03d SG	484	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
f30fb03d SG	485	dma-names = "rx", "tx";
2954ff39 SG	486	status = "disabled";
	487	};
	488
	489	duart: serial@80070000 {
	490	compatible = "arm,pl011", "arm,primecell";
	491	reg = <0x80070000 0x2000>;
	492	interrupts = <0>;
53f9443d SG	493	clocks = <&clks 32>, <&clks 16>;
53f9443d SG	494	clock-names = "uart", "apb_pclk";
2954ff39 SG	495	status = "disabled";
	496	};
	497
d6475317 FE	498	usbphy0: usbphy@8007c000 {
d6475317 FE	499	compatible = "fsl,imx23-usbphy";
2954ff39	500	reg = <0x8007c000 0x2000>;
d6475317	501	clocks = <&clks 41>;
2954ff39 SG	502	status = "disabled";
	503	};
	504	};
	505	};
	506
	507	ahb@80080000 {
	508	compatible = "simple-bus";
	509	#address-cells = <1>;
	510	#size-cells = <1>;
	511	reg = <0x80080000 0x80000>;
	512	ranges;
	513
d6475317 FE	514	usb0: usb@80080000 {
d6475317 FE	515	compatible = "fsl,imx23-usb", "fsl,imx27-usb";
640bf060	516	reg = <0x80080000 0x40000>;
d6475317 FE	517	interrupts = <11>;
	518	fsl,usbphy = <&usbphy0>;
	519	clocks = <&clks 40>;
2954ff39 SG	520	status = "disabled";
	521	};
	522	};
	523	};