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ARM: dts: i.MX25: Add mmc aliases
[deliverable/linux.git] / arch / arm / boot / dts / imx25.dtsi
CommitLineData
5658a68f
SH		 1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
36dffd8f 12#include "skeleton.dtsi"
f4db4bc5 13#include "imx25-pinfunc.h"
5658a68f
SH		 14
15/ {
16 aliases {
22970070 17 ethernet0 = &fec;
6ed1a0e5
SH		 18 gpio0 = &gpio1;
19 gpio1 = &gpio2;
20 gpio2 = &gpio3;
21 gpio3 = &gpio4;
22 i2c0 = &i2c1;
23 i2c1 = &i2c2;
24 i2c2 = &i2c3;
9e3a424b
SH		 25 mmc0 = &esdhc1;
26 mmc1 = &esdhc2;
5658a68f
SH		 27 serial0 = &uart1;
28 serial1 = &uart2;
29 serial2 = &uart3;
30 serial3 = &uart4;
31 serial4 = &uart5;
6ed1a0e5
SH		 32 spi0 = &spi1;
33 spi1 = &spi2;
34 spi2 = &spi3;
5658a68f
SH		 35 usb0 = &usbotg;
36 usb1 = &usbhost1;
37 };
38
070bd7e4
FE		 39 cpus {
40 #address-cells = <0>;
41 #size-cells = <0>;
42
43 cpu {
44 compatible = "arm,arm926ej-s";
45 device_type = "cpu";
46 };
47 };
48
5658a68f
SH		 49 asic: asic-interrupt-controller@68000000 {
50 compatible = "fsl,imx25-asic", "fsl,avic";
51 interrupt-controller;
52 #interrupt-cells = <1>;
53 reg = <0x68000000 0x8000000>;
54 };
55
56 clocks {
57 #address-cells = <1>;
58 #size-cells = <0>;
59
60 osc {
61 compatible = "fsl,imx-osc", "fixed-clock";
4b2b4043 62 #clock-cells = <0>;
5658a68f
SH		 63 clock-frequency = <24000000>;
64 };
65 };
66
67 soc {
68 #address-cells = <1>;
69 #size-cells = <1>;
70 compatible = "simple-bus";
71 interrupt-parent = <&asic>;
72 ranges;
73
74 aips@43f00000 { /* AIPS1 */
75 compatible = "fsl,aips-bus", "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 reg = <0x43f00000 0x100000>;
79 ranges;
80
81 i2c1: i2c@43f80000 {
82 #address-cells = <1>;
83 #size-cells = <0>;
84 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
85 reg = <0x43f80000 0x4000>;
86 clocks = <&clks 48>;
87 clock-names = "";
88 interrupts = <3>;
89 status = "disabled";
90 };
91
92 i2c3: i2c@43f84000 {
93 #address-cells = <1>;
94 #size-cells = <0>;
95 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
96 reg = <0x43f84000 0x4000>;
97 clocks = <&clks 48>;
98 clock-names = "";
99 interrupts = <10>;
100 status = "disabled";
101 };
102
103 can1: can@43f88000 {
104 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
105 reg = <0x43f88000 0x4000>;
106 interrupts = <43>;
107 clocks = <&clks 75>, <&clks 75>;
108 clock-names = "ipg", "per";
109 status = "disabled";
110 };
111
112 can2: can@43f8c000 {
113 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
114 reg = <0x43f8c000 0x4000>;
115 interrupts = <44>;
116 clocks = <&clks 76>, <&clks 76>;
117 clock-names = "ipg", "per";
118 status = "disabled";
119 };
120
121 uart1: serial@43f90000 {
122 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
123 reg = <0x43f90000 0x4000>;
124 interrupts = <45>;
125 clocks = <&clks 120>, <&clks 57>;
126 clock-names = "ipg", "per";
127 status = "disabled";
128 };
129
130 uart2: serial@43f94000 {
131 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
132 reg = <0x43f94000 0x4000>;
133 interrupts = <32>;
134 clocks = <&clks 121>, <&clks 57>;
135 clock-names = "ipg", "per";
136 status = "disabled";
137 };
138
139 i2c2: i2c@43f98000 {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
143 reg = <0x43f98000 0x4000>;
144 clocks = <&clks 48>;
145 clock-names = "";
146 interrupts = <4>;
147 status = "disabled";
148 };
149
150 owire@43f9c000 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0x43f9c000 0x4000>;
154 clocks = <&clks 51>;
155 clock-names = "";
156 interrupts = <2>;
157 status = "disabled";
158 };
159
160 spi1: cspi@43fa4000 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
164 reg = <0x43fa4000 0x4000>;
37523dc5
JA		 165 clocks = <&clks 62>, <&clks 62>;
166 clock-names = "ipg", "per";
5658a68f
SH		 167 interrupts = <14>;
168 status = "disabled";
169 };
170
9223dd87 171 kpp: kpp@43fa8000 {
5658a68f
SH		 172 #address-cells = <1>;
173 #size-cells = <0>;
9223dd87 174 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
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SH		 175 reg = <0x43fa8000 0x4000>;
176 clocks = <&clks 102>;
177 clock-names = "";
178 interrupts = <24>;
179 status = "disabled";
180 };
181
53110aa0 182 iomuxc: iomuxc@43fac000 {
5658a68f
SH		 183 compatible = "fsl,imx25-iomuxc";
184 reg = <0x43fac000 0x4000>;
185 };
186
ec2ea8c1 187 audmux: audmux@43fb0000 {
5658a68f
SH		 188 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
189 reg = <0x43fb0000 0x4000>;
190 status = "disabled";
191 };
192 };
193
194 spba@50000000 {
195 compatible = "fsl,spba-bus", "simple-bus";
196 #address-cells = <1>;
197 #size-cells = <1>;
198 reg = <0x50000000 0x40000>;
199 ranges;
200
201 spi3: cspi@50004000 {
202 #address-cells = <1>;
203 #size-cells = <0>;
204 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
205 reg = <0x50004000 0x4000>;
206 interrupts = <0>;
37523dc5
JA		 207 clocks = <&clks 80>, <&clks 80>;
208 clock-names = "ipg", "per";
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SH		 209 status = "disabled";
210 };
211
212 uart4: serial@50008000 {
213 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
214 reg = <0x50008000 0x4000>;
215 interrupts = <5>;
216 clocks = <&clks 123>, <&clks 57>;
217 clock-names = "ipg", "per";
218 status = "disabled";
219 };
220
221 uart3: serial@5000c000 {
222 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
223 reg = <0x5000c000 0x4000>;
224 interrupts = <18>;
225 clocks = <&clks 122>, <&clks 57>;
226 clock-names = "ipg", "per";
227 status = "disabled";
228 };
229
230 spi2: cspi@50010000 {
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
234 reg = <0x50010000 0x4000>;
37523dc5
JA		 235 clocks = <&clks 79>, <&clks 79>;
236 clock-names = "ipg", "per";
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SH		 237 interrupts = <13>;
238 status = "disabled";
239 };
240
241 ssi2: ssi@50014000 {
242 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
243 reg = <0x50014000 0x4000>;
244 interrupts = <11>;
7803c620
DC		 245 clocks = <&clks 118>;
246 clock-names = "ipg";
247 dmas = <&sdma 24 1 0>,
248 <&sdma 25 1 0>;
249 dma-names = "rx", "tx";
5658a68f
SH		 250 status = "disabled";
251 };
252
253 esai@50018000 {
254 reg = <0x50018000 0x4000>;
255 interrupts = <7>;
256 };
257
258 uart5: serial@5002c000 {
259 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
260 reg = <0x5002c000 0x4000>;
261 interrupts = <40>;
262 clocks = <&clks 124>, <&clks 57>;
263 clock-names = "ipg", "per";
264 status = "disabled";
265 };
266
267 tsc: tsc@50030000 {
268 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
269 reg = <0x50030000 0x4000>;
270 interrupts = <46>;
271 clocks = <&clks 119>;
272 clock-names = "ipg";
273 status = "disabled";
274 };
275
276 ssi1: ssi@50034000 {
277 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
278 reg = <0x50034000 0x4000>;
279 interrupts = <12>;
7803c620
DC		 280 clocks = <&clks 117>;
281 clock-names = "ipg";
282 dmas = <&sdma 28 1 0>,
283 <&sdma 29 1 0>;
284 dma-names = "rx", "tx";
5658a68f
SH		 285 status = "disabled";
286 };
287
288 fec: ethernet@50038000 {
289 compatible = "fsl,imx25-fec";
290 reg = <0x50038000 0x4000>;
291 interrupts = <57>;
292 clocks = <&clks 88>, <&clks 65>;
293 clock-names = "ipg", "ahb";
294 status = "disabled";
295 };
296 };
297
298 aips@53f00000 { /* AIPS2 */
299 compatible = "fsl,aips-bus", "simple-bus";
300 #address-cells = <1>;
301 #size-cells = <1>;
302 reg = <0x53f00000 0x100000>;
303 ranges;
304
305 clks: ccm@53f80000 {
306 compatible = "fsl,imx25-ccm";
307 reg = <0x53f80000 0x4000>;
308 interrupts = <31>;
309 #clock-cells = <1>;
310 };
311
312 gpt4: timer@53f84000 {
313 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
314 reg = <0x53f84000 0x4000>;
315 clocks = <&clks 9>, <&clks 45>;
316 clock-names = "ipg", "per";
317 interrupts = <1>;
318 };
319
320 gpt3: timer@53f88000 {
321 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
322 reg = <0x53f88000 0x4000>;
323 clocks = <&clks 9>, <&clks 47>;
324 clock-names = "ipg", "per";
325 interrupts = <29>;
326 };
327
328 gpt2: timer@53f8c000 {
329 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
330 reg = <0x53f8c000 0x4000>;
331 clocks = <&clks 9>, <&clks 47>;
332 clock-names = "ipg", "per";
333 interrupts = <53>;
334 };
335
336 gpt1: timer@53f90000 {
337 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
338 reg = <0x53f90000 0x4000>;
339 clocks = <&clks 9>, <&clks 47>;
340 clock-names = "ipg", "per";
341 interrupts = <54>;
342 };
343
344 epit1: timer@53f94000 {
345 compatible = "fsl,imx25-epit";
346 reg = <0x53f94000 0x4000>;
347 interrupts = <28>;
348 };
349
350 epit2: timer@53f98000 {
351 compatible = "fsl,imx25-epit";
352 reg = <0x53f98000 0x4000>;
353 interrupts = <27>;
354 };
355
356 gpio4: gpio@53f9c000 {
357 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
358 reg = <0x53f9c000 0x4000>;
359 interrupts = <23>;
360 gpio-controller;
361 #gpio-cells = <2>;
362 interrupt-controller;
363 #interrupt-cells = <2>;
364 };
365
366 pwm2: pwm@53fa0000 {
367 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
368 #pwm-cells = <2>;
369 reg = <0x53fa0000 0x4000>;
370 clocks = <&clks 106>, <&clks 36>;
371 clock-names = "ipg", "per";
372 interrupts = <36>;
373 };
374
375 gpio3: gpio@53fa4000 {
376 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
377 reg = <0x53fa4000 0x4000>;
378 interrupts = <16>;
379 gpio-controller;
380 #gpio-cells = <2>;
381 interrupt-controller;
382 #interrupt-cells = <2>;
383 };
384
385 pwm3: pwm@53fa8000 {
386 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
387 #pwm-cells = <2>;
388 reg = <0x53fa8000 0x4000>;
389 clocks = <&clks 107>, <&clks 36>;
390 clock-names = "ipg", "per";
391 interrupts = <41>;
392 };
393
394 esdhc1: esdhc@53fb4000 {
395 compatible = "fsl,imx25-esdhc";
396 reg = <0x53fb4000 0x4000>;
397 interrupts = <9>;
398 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
399 clock-names = "ipg", "ahb", "per";
400 status = "disabled";
401 };
402
403 esdhc2: esdhc@53fb8000 {
404 compatible = "fsl,imx25-esdhc";
405 reg = <0x53fb8000 0x4000>;
406 interrupts = <8>;
407 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
408 clock-names = "ipg", "ahb", "per";
409 status = "disabled";
410 };
411
c770f7c0
MW		 412 lcdc: lcdc@53fbc000 {
413 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
5658a68f
SH		 414 reg = <0x53fbc000 0x4000>;
415 interrupts = <39>;
416 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
417 clock-names = "ipg", "ahb", "per";
418 status = "disabled";
419 };
420
421 slcdc@53fc0000 {
422 reg = <0x53fc0000 0x4000>;
423 interrupts = <38>;
424 status = "disabled";
425 };
426
427 pwm4: pwm@53fc8000 {
428 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
429 reg = <0x53fc8000 0x4000>;
430 clocks = <&clks 108>, <&clks 36>;
431 clock-names = "ipg", "per";
432 interrupts = <42>;
433 };
434
435 gpio1: gpio@53fcc000 {
436 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
437 reg = <0x53fcc000 0x4000>;
438 interrupts = <52>;
439 gpio-controller;
440 #gpio-cells = <2>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
443 };
444
445 gpio2: gpio@53fd0000 {
446 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
447 reg = <0x53fd0000 0x4000>;
448 interrupts = <51>;
449 gpio-controller;
450 #gpio-cells = <2>;
451 interrupt-controller;
452 #interrupt-cells = <2>;
453 };
454
7803c620 455 sdma: sdma@53fd4000 {
5658a68f
SH		 456 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
457 reg = <0x53fd4000 0x4000>;
458 clocks = <&clks 112>, <&clks 68>;
459 clock-names = "ipg", "ahb";
fb72bb21 460 #dma-cells = <3>;
5658a68f 461 interrupts = <34>;
cabd1b29 462 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
5658a68f
SH		 463 };
464
465 wdog@53fdc000 {
466 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
467 reg = <0x53fdc000 0x4000>;
468 clocks = <&clks 126>;
469 clock-names = "";
470 interrupts = <55>;
471 };
472
473 pwm1: pwm@53fe0000 {
474 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
475 #pwm-cells = <2>;
476 reg = <0x53fe0000 0x4000>;
477 clocks = <&clks 105>, <&clks 36>;
478 clock-names = "ipg", "per";
479 interrupts = <26>;
480 };
481
684f6a23
SH		 482 iim: iim@53ff0000 {
483 compatible = "fsl,imx25-iim", "fsl,imx27-iim";
484 reg = <0x53ff0000 0x4000>;
485 interrupts = <19>;
486 clocks = <&clks 99>;
487 };
488
5658a68f
SH		 489 usbotg: usb@53ff4000 {
490 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
491 reg = <0x53ff4000 0x0200>;
492 interrupts = <37>;
3937f66b 493 clocks = <&clks 70>;
5658a68f 494 fsl,usbmisc = <&usbmisc 0>;
f415153c 495 fsl,usbphy = <&usbphy0>;
5658a68f
SH		 496 status = "disabled";
497 };
498
499 usbhost1: usb@53ff4400 {
500 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
501 reg = <0x53ff4400 0x0200>;
502 interrupts = <35>;
3937f66b 503 clocks = <&clks 70>;
5658a68f 504 fsl,usbmisc = <&usbmisc 1>;
f415153c 505 fsl,usbphy = <&usbphy1>;
5658a68f
SH		 506 status = "disabled";
507 };
508
509 usbmisc: usbmisc@53ff4600 {
510 #index-cells = <1>;
511 compatible = "fsl,imx25-usbmisc";
512 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
513 clock-names = "ipg", "ahb", "per";
514 reg = <0x53ff4600 0x00f>;
5658a68f
SH		 515 };
516
517 dryice@53ffc000 {
518 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
519 reg = <0x53ffc000 0x4000>;
520 clocks = <&clks 81>;
521 clock-names = "ipg";
522 interrupts = <25>;
523 };
524 };
525
526 emi@80000000 {
527 compatible = "fsl,emi-bus", "simple-bus";
528 #address-cells = <1>;
529 #size-cells = <1>;
530 reg = <0x80000000 0x3b002000>;
531 ranges;
532
be4ccfce 533 nfc: nand@bb000000 {
5658a68f
SH		 534 #address-cells = <1>;
535 #size-cells = <1>;
536
537 compatible = "fsl,imx25-nand";
538 reg = <0xbb000000 0x2000>;
539 clocks = <&clks 50>;
540 clock-names = "";
541 interrupts = <33>;
542 status = "disabled";
543 };
544 };
545 };
f415153c
FE		 546
547 usbphy {
548 compatible = "simple-bus";
549 #address-cells = <1>;
550 #size-cells = <0>;
551
552 usbphy0: usb-phy@0 {
553 reg = <0>;
554 compatible = "usb-nop-xceiv";
555 };
556
557 usbphy1: usb-phy@1 {
558 reg = <1>;
559 compatible = "usb-nop-xceiv";
560 };
561 };
5658a68f 562};
Linux kernel - Deliverables
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