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db890dad MP |
1 | /* |
2 | * Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar | |
3 | * and Markus Pargmann, Pengutronix | |
4 | * | |
5 | * The code contained herein is licensed under the GNU General Public | |
6 | * License. You may obtain a copy of the GNU General Public License | |
7 | * Version 2 or later at the following locations: | |
8 | * | |
9 | * http://www.opensource.org/licenses/gpl-license.html | |
10 | * http://www.gnu.org/copyleft/gpl.html | |
11 | */ | |
12 | ||
13 | /dts-v1/; | |
14 | #include "imx27.dtsi" | |
15 | ||
16 | / { | |
17 | model = "Phytec pca100"; | |
18 | compatible = "phytec,imx27-pca100", "fsl,imx27"; | |
19 | ||
20 | memory { | |
21 | reg = <0xa0000000 0x08000000>; /* 128MB */ | |
22 | }; | |
23 | }; | |
24 | ||
25 | &cspi1 { | |
26 | fsl,spi-num-chipselects = <2>; | |
6ece55b3 AS |
27 | cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>, |
28 | <&gpio4 27 GPIO_ACTIVE_HIGH>; | |
db890dad MP |
29 | status = "okay"; |
30 | }; | |
31 | ||
f9fb9fc0 AS |
32 | &fec { |
33 | pinctrl-names = "default"; | |
34 | pinctrl-0 = <&pinctrl_fec1>; | |
35 | status = "okay"; | |
36 | }; | |
37 | ||
38 | &i2c2 { | |
39 | pinctrl-names = "default"; | |
40 | pinctrl-0 = <&pinctrl_i2c2>; | |
41 | status = "okay"; | |
42 | ||
43 | at24@52 { | |
44 | compatible = "at,24c32"; | |
45 | pagesize = <32>; | |
46 | reg = <0x52>; | |
47 | }; | |
48 | }; | |
49 | ||
61664d0b MP |
50 | &iomuxc { |
51 | imx27-phycard-s-som { | |
52 | pinctrl_fec1: fec1grp { | |
53 | fsl,pins = < | |
54 | MX27_PAD_SD3_CMD__FEC_TXD0 0x0 | |
55 | MX27_PAD_SD3_CLK__FEC_TXD1 0x0 | |
56 | MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 | |
57 | MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 | |
58 | MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 | |
59 | MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 | |
60 | MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 | |
61 | MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 | |
62 | MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 | |
63 | MX27_PAD_ATA_DATA7__FEC_MDC 0x0 | |
64 | MX27_PAD_ATA_DATA8__FEC_CRS 0x0 | |
65 | MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 | |
66 | MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 | |
67 | MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 | |
68 | MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 | |
69 | MX27_PAD_ATA_DATA13__FEC_COL 0x0 | |
70 | MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 | |
71 | MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 | |
72 | >; | |
73 | }; | |
74 | ||
75 | pinctrl_i2c2: i2c2grp { | |
76 | fsl,pins = < | |
77 | MX27_PAD_I2C2_SDA__I2C2_SDA 0x0 | |
78 | MX27_PAD_I2C2_SCL__I2C2_SCL 0x0 | |
79 | >; | |
80 | }; | |
b037b9a5 AS |
81 | |
82 | pinctrl_nfc: nfcgrp { | |
83 | fsl,pins = < | |
84 | MX27_PAD_NFRB__NFRB 0x0 | |
85 | MX27_PAD_NFCLE__NFCLE 0x0 | |
86 | MX27_PAD_NFWP_B__NFWP_B 0x0 | |
87 | MX27_PAD_NFCE_B__NFCE_B 0x0 | |
88 | MX27_PAD_NFALE__NFALE 0x0 | |
89 | MX27_PAD_NFRE_B__NFRE_B 0x0 | |
90 | MX27_PAD_NFWE_B__NFWE_B 0x0 | |
91 | >; | |
92 | }; | |
61664d0b MP |
93 | }; |
94 | }; | |
b037b9a5 AS |
95 | |
96 | &nfc { | |
97 | pinctrl-names = "default"; | |
98 | pinctrl-0 = <&pinctrl_nfc>; | |
99 | nand-bus-width = <8>; | |
100 | nand-ecc-mode = "hw"; | |
101 | nand-on-flash-bbt; | |
102 | status = "okay"; | |
103 | }; |