projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 10a9ba05 SH |
1 | /* |
| 2 | * Copyright 2012 Sascha Hauer, Pengutronix | |
| 3 | * | |
| 4 | * The code contained herein is licensed under the GNU General Public | |
| 5 | * License. You may obtain a copy of the GNU General Public License | |
| 6 | * Version 2 or later at the following locations: | |
| 7 | * | |
| 8 | * http://www.opensource.org/licenses/gpl-license.html | |
| 9 | * http://www.gnu.org/copyleft/gpl.html | |
| 10 | */ | |
| 11 | ||
| 12 | /dts-v1/; | |
| 36dffd8f | 13 | #include "imx27.dtsi" |
| 10a9ba05 SH |
14 | |
| 15 | / { | |
| 16 | model = "Phytec pcm038"; | |
| 17 | compatible = "phytec,imx27-pcm038", "fsl,imx27"; | |
| 18 | ||
| 19 | memory { | |
| 999f6818 | 20 | reg = <0xa0000000 0x08000000>; |
| 10a9ba05 | 21 | }; |
| 10a9ba05 | 22 | }; |
| 1b45aceb | 23 | |
| 5d3503cd AS |
24 | &cspi1 { |
| 25 | fsl,spi-num-chipselects = <1>; | |
| 26 | cs-gpios = <&gpio4 28 0>; | |
| 27 | status = "okay"; | |
| 28 | ||
| 29 | pmic: mc13783@0 { | |
| 30 | #address-cells = <1>; | |
| 31 | #size-cells = <0>; | |
| 32 | compatible = "fsl,mc13783"; | |
| 33 | spi-max-frequency = <20000000>; | |
| 34 | reg = <0>; | |
| 35 | interrupt-parent = <&gpio2>; | |
| 36 | interrupts = <23 0x4>; | |
| 37 | fsl,mc13xxx-uses-adc; | |
| 38 | fsl,mc13xxx-uses-rtc; | |
| 39 | ||
| 40 | regulators { | |
| 41 | sw1a_reg: sw1a { | |
| 42 | regulator-min-microvolt = <1200000>; | |
| 43 | regulator-max-microvolt = <1200000>; | |
| 44 | regulator-always-on; | |
| 45 | regulator-boot-on; | |
| 46 | }; | |
| 47 | ||
| 48 | sw1b_reg: sw1b { | |
| 49 | regulator-min-microvolt = <1200000>; | |
| 50 | regulator-max-microvolt = <1200000>; | |
| 51 | regulator-always-on; | |
| 52 | regulator-boot-on; | |
| 53 | }; | |
| 54 | ||
| 55 | sw2a_reg: sw2a { | |
| 56 | regulator-min-microvolt = <1800000>; | |
| 57 | regulator-max-microvolt = <1800000>; | |
| 58 | regulator-always-on; | |
| 59 | regulator-boot-on; | |
| 60 | }; | |
| 61 | ||
| 62 | sw2b_reg: sw2b { | |
| 63 | regulator-min-microvolt = <1800000>; | |
| 64 | regulator-max-microvolt = <1800000>; | |
| 65 | regulator-always-on; | |
| 66 | regulator-boot-on; | |
| 67 | }; | |
| 68 | ||
| 69 | sw3_reg: sw3 { | |
| 70 | regulator-min-microvolt = <5000000>; | |
| 71 | regulator-max-microvolt = <5000000>; | |
| 72 | regulator-always-on; | |
| 73 | regulator-boot-on; | |
| 74 | }; | |
| 75 | ||
| 76 | vaudio_reg: vaudio { | |
| 77 | regulator-always-on; | |
| 78 | regulator-boot-on; | |
| 79 | }; | |
| 80 | ||
| 81 | violo_reg: violo { | |
| 82 | regulator-min-microvolt = <1800000>; | |
| 83 | regulator-max-microvolt = <1800000>; | |
| 84 | regulator-always-on; | |
| 85 | regulator-boot-on; | |
| 86 | }; | |
| 87 | ||
| 88 | viohi_reg: viohi { | |
| 89 | regulator-always-on; | |
| 90 | regulator-boot-on; | |
| 91 | }; | |
| 92 | ||
| 93 | vgen_reg: vgen { | |
| 94 | regulator-min-microvolt = <1500000>; | |
| 95 | regulator-max-microvolt = <1500000>; | |
| 96 | regulator-always-on; | |
| 97 | regulator-boot-on; | |
| 98 | }; | |
| 99 | ||
| 100 | vcam_reg: vcam { | |
| 101 | regulator-min-microvolt = <2800000>; | |
| 102 | regulator-max-microvolt = <2800000>; | |
| 103 | }; | |
| 104 | ||
| 105 | vrf1_reg: vrf1 { | |
| 106 | regulator-min-microvolt = <2775000>; | |
| 107 | regulator-max-microvolt = <2775000>; | |
| 108 | regulator-always-on; | |
| 109 | regulator-boot-on; | |
| 110 | }; | |
| 111 | ||
| 112 | vrf2_reg: vrf2 { | |
| 113 | regulator-min-microvolt = <2775000>; | |
| 114 | regulator-max-microvolt = <2775000>; | |
| 115 | regulator-always-on; | |
| 116 | regulator-boot-on; | |
| 117 | }; | |
| 118 | ||
| 119 | vmmc1_reg: vmmc1 { | |
| 120 | regulator-min-microvolt = <1600000>; | |
| 121 | regulator-max-microvolt = <3000000>; | |
| 122 | }; | |
| 123 | ||
| 124 | gpo1_reg: gpo1 { }; | |
| 125 | ||
| 126 | pwgt1spi_reg: pwgt1spi { | |
| 127 | regulator-always-on; | |
| 128 | }; | |
| 129 | }; | |
| 130 | }; | |
| 131 | }; | |
| 132 | ||
| f0d8e3f1 AS |
133 | &fec { |
| 134 | phy-reset-gpios = <&gpio3 30 0>; | |
| 135 | status = "okay"; | |
| 136 | }; | |
| 137 | ||
| 138 | &i2c2 { | |
| 139 | clock-frequency = <400000>; | |
| 140 | status = "okay"; | |
| 141 | ||
| 142 | at24@52 { | |
| 143 | compatible = "at,24c32"; | |
| 144 | pagesize = <32>; | |
| 145 | reg = <0x52>; | |
| 146 | }; | |
| 147 | ||
| 148 | pcf8563@51 { | |
| 149 | compatible = "nxp,pcf8563"; | |
| 150 | reg = <0x51>; | |
| 151 | }; | |
| 152 | ||
| 153 | lm75@4a { | |
| 154 | compatible = "national,lm75"; | |
| 155 | reg = <0x4a>; | |
| 156 | }; | |
| 157 | }; | |
| 158 | ||
| 1b45aceb AS |
159 | &nfc { |
| 160 | nand-bus-width = <8>; | |
| 161 | nand-ecc-mode = "hw"; | |
| 162 | status = "okay"; | |
| 163 | }; | |
| 984d6fc3 | 164 | |
| f0d8e3f1 AS |
165 | &uart1 { |
| 166 | status = "okay"; | |
| 167 | }; | |
| 168 | ||
| 984d6fc3 AS |
169 | &weim { |
| 170 | status = "okay"; | |
| 171 | ||
| 172 | nor: nor@c0000000 { | |
| 173 | compatible = "cfi-flash"; | |
| 174 | reg = <0 0x00000000 0x02000000>; | |
| 175 | bank-width = <2>; | |
| 176 | linux,mtd-name = "physmap-flash.0"; | |
| 177 | fsl,weim-cs-timing = <0x22c2cf00 0x75000d01 0x00000900>; | |
| 178 | #address-cells = <1>; | |
| 179 | #size-cells = <1>; | |
| 180 | }; | |
| cff2a713 AS |
181 | |
| 182 | sram: sram@c8000000 { | |
| 183 | compatible = "mtd-ram"; | |
| 184 | reg = <1 0x00000000 0x00800000>; | |
| 185 | bank-width = <2>; | |
| 186 | linux,mtd-name = "mtd-ram.0"; | |
| 187 | fsl,weim-cs-timing = <0x0000d843 0x22252521 0x22220a00>; | |
| 188 | #address-cells = <1>; | |
| 189 | #size-cells = <1>; | |
| 190 | }; | |
| 984d6fc3 | 191 | }; |