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Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[deliverable/linux.git] / arch / arm / boot / dts / imx28.dtsi
CommitLineData
bc3a59c1
DA		 1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 interrupt-parent = <&icoll>;
16
ce4c6f9b
SG		 17 aliases {
18 gpio0 = &gpio0;
19 gpio1 = &gpio1;
20 gpio2 = &gpio2;
21 gpio3 = &gpio3;
22 gpio4 = &gpio4;
530f1d41
SG		 23 saif0 = &saif0;
24 saif1 = &saif1;
80d969e4
FE		 25 serial0 = &auart0;
26 serial1 = &auart1;
27 serial2 = &auart2;
28 serial3 = &auart3;
29 serial4 = &auart4;
8c41d573
MV		 30 ethernet0 = &mac0;
31 ethernet1 = &mac1;
ce4c6f9b
SG		 32 };
33
bc3a59c1 34 cpus {
7925e89f
LP		 35 #address-cells = <0>;
36 #size-cells = <0>;
37
38 cpu {
39 compatible = "arm,arm926ej-s";
40 device_type = "cpu";
bc3a59c1
DA		 41 };
42 };
43
44 apb@80000000 {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 reg = <0x80000000 0x80000>;
49 ranges;
50
51 apbh@80000000 {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 reg = <0x80000000 0x3c900>;
56 ranges;
57
58 icoll: interrupt-controller@80000000 {
83a84efc 59 compatible = "fsl,imx28-icoll", "fsl,icoll";
bc3a59c1
DA		 60 interrupt-controller;
61 #interrupt-cells = <1>;
62 reg = <0x80000000 0x2000>;
63 };
64
65 hsadc@80002000 {
0f06cde7 66 reg = <0x80002000 0x2000>;
bc3a59c1 67 interrupts = <13 87>;
f30fb03d
SG		 68 dmas = <&dma_apbh 12>;
69 dma-names = "rx";
bc3a59c1
DA		 70 status = "disabled";
71 };
72
f30fb03d 73 dma_apbh: dma-apbh@80004000 {
84f3570a 74 compatible = "fsl,imx28-dma-apbh";
0f06cde7 75 reg = <0x80004000 0x2000>;
f30fb03d
SG		 76 interrupts = <82 83 84 85
77 88 88 88 88
78 88 88 88 88
79 87 86 0 0>;
80 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
81 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
82 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
83 "hsadc", "lcdif", "empty", "empty";
84 #dma-cells = <1>;
85 dma-channels = <16>;
b598b9f3 86 clocks = <&clks 25>;
bc3a59c1
DA		 87 };
88
89 perfmon@80006000 {
0f06cde7 90 reg = <0x80006000 0x800>;
bc3a59c1
DA		 91 interrupts = <27>;
92 status = "disabled";
93 };
94
7a8e5149
HS		 95 gpmi-nand@8000c000 {
96 compatible = "fsl,imx28-gpmi-nand";
97 #address-cells = <1>;
98 #size-cells = <1>;
0f06cde7 99 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
7a8e5149
HS		 100 reg-names = "gpmi-nand", "bch";
101 interrupts = <88>, <41>;
102 interrupt-names = "gpmi-dma", "bch";
b598b9f3 103 clocks = <&clks 50>;
b6442559 104 clock-names = "gpmi_io";
f30fb03d
SG		 105 dmas = <&dma_apbh 4>;
106 dma-names = "rx-tx";
7a8e5149 107 fsl,gpmi-dma-channel = <4>;
bc3a59c1
DA		 108 status = "disabled";
109 };
110
111 ssp0: ssp@80010000 {
41bf5706
MR		 112 #address-cells = <1>;
113 #size-cells = <0>;
0f06cde7 114 reg = <0x80010000 0x2000>;
bc3a59c1 115 interrupts = <96 82>;
b598b9f3 116 clocks = <&clks 46>;
f30fb03d
SG		 117 dmas = <&dma_apbh 0>;
118 dma-names = "rx-tx";
35d23047 119 fsl,ssp-dma-channel = <0>;
bc3a59c1
DA		 120 status = "disabled";
121 };
122
123 ssp1: ssp@80012000 {
41bf5706
MR		 124 #address-cells = <1>;
125 #size-cells = <0>;
0f06cde7 126 reg = <0x80012000 0x2000>;
bc3a59c1 127 interrupts = <97 83>;
b598b9f3 128 clocks = <&clks 47>;
f30fb03d
SG		 129 dmas = <&dma_apbh 1>;
130 dma-names = "rx-tx";
35d23047 131 fsl,ssp-dma-channel = <1>;
bc3a59c1
DA		 132 status = "disabled";
133 };
134
135 ssp2: ssp@80014000 {
41bf5706
MR		 136 #address-cells = <1>;
137 #size-cells = <0>;
0f06cde7 138 reg = <0x80014000 0x2000>;
bc3a59c1 139 interrupts = <98 84>;
b598b9f3 140 clocks = <&clks 48>;
f30fb03d
SG		 141 dmas = <&dma_apbh 2>;
142 dma-names = "rx-tx";
35d23047 143 fsl,ssp-dma-channel = <2>;
bc3a59c1
DA		 144 status = "disabled";
145 };
146
147 ssp3: ssp@80016000 {
41bf5706
MR		 148 #address-cells = <1>;
149 #size-cells = <0>;
0f06cde7 150 reg = <0x80016000 0x2000>;
bc3a59c1 151 interrupts = <99 85>;
b598b9f3 152 clocks = <&clks 49>;
f30fb03d
SG		 153 dmas = <&dma_apbh 3>;
154 dma-names = "rx-tx";
35d23047 155 fsl,ssp-dma-channel = <3>;
bc3a59c1
DA		 156 status = "disabled";
157 };
158
159 pinctrl@80018000 {
160 #address-cells = <1>;
161 #size-cells = <0>;
ce4c6f9b 162 compatible = "fsl,imx28-pinctrl", "simple-bus";
0f06cde7 163 reg = <0x80018000 0x2000>;
bc3a59c1 164
ce4c6f9b
SG		 165 gpio0: gpio@0 {
166 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
167 interrupts = <127>;
168 gpio-controller;
169 #gpio-cells = <2>;
170 interrupt-controller;
171 #interrupt-cells = <2>;
172 };
173
174 gpio1: gpio@1 {
175 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
176 interrupts = <126>;
177 gpio-controller;
178 #gpio-cells = <2>;
179 interrupt-controller;
180 #interrupt-cells = <2>;
181 };
182
183 gpio2: gpio@2 {
184 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
185 interrupts = <125>;
186 gpio-controller;
187 #gpio-cells = <2>;
188 interrupt-controller;
189 #interrupt-cells = <2>;
190 };
191
192 gpio3: gpio@3 {
193 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
194 interrupts = <124>;
195 gpio-controller;
196 #gpio-cells = <2>;
197 interrupt-controller;
198 #interrupt-cells = <2>;
199 };
200
201 gpio4: gpio@4 {
202 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
203 interrupts = <123>;
204 gpio-controller;
205 #gpio-cells = <2>;
206 interrupt-controller;
207 #interrupt-cells = <2>;
208 };
209
bc3a59c1
DA		 210 duart_pins_a: duart@0 {
211 reg = <0>;
f14da767
SG		 212 fsl,pinmux-ids = <
213 0x3102 /* MX28_PAD_PWM0__DUART_RX */
214 0x3112 /* MX28_PAD_PWM1__DUART_TX */
215 >;
bc3a59c1
DA		 216 fsl,drive-strength = <0>;
217 fsl,voltage = <1>;
218 fsl,pull-up = <0>;
219 };
220
8385e7c1
MR		 221 duart_pins_b: duart@1 {
222 reg = <1>;
f14da767
SG		 223 fsl,pinmux-ids = <
224 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
225 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
226 >;
8385e7c1
MR		 227 fsl,drive-strength = <0>;
228 fsl,voltage = <1>;
229 fsl,pull-up = <0>;
230 };
231
e1a4d18f
SG		 232 duart_4pins_a: duart-4pins@0 {
233 reg = <0>;
234 fsl,pinmux-ids = <
235 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
236 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
237 0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
238 0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
239 >;
240 fsl,drive-strength = <0>;
241 fsl,voltage = <1>;
242 fsl,pull-up = <0>;
243 };
244
7a8e5149
HS		 245 gpmi_pins_a: gpmi-nand@0 {
246 reg = <0>;
f14da767
SG		 247 fsl,pinmux-ids = <
248 0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
249 0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
250 0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
251 0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
252 0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
253 0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
254 0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
255 0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
256 0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
f14da767 257 0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
f14da767
SG		 258 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
259 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
260 0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
261 0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
262 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
263 >;
7a8e5149
HS		 264 fsl,drive-strength = <0>;
265 fsl,voltage = <1>;
266 fsl,pull-up = <0>;
267 };
268
269 gpmi_status_cfg: gpmi-status-cfg {
f14da767
SG		 270 fsl,pinmux-ids = <
271 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
272 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
273 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
274 >;
7a8e5149
HS		 275 fsl,drive-strength = <2>;
276 };
277
80d969e4
FE		 278 auart0_pins_a: auart0@0 {
279 reg = <0>;
f14da767
SG		 280 fsl,pinmux-ids = <
281 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
282 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
283 0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
284 0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
285 >;
80d969e4 286 fsl,drive-strength = <0>;
8fa62e11
MV		 287 fsl,voltage = <1>;
288 fsl,pull-up = <0>;
289 };
290
291 auart0_2pins_a: auart0-2pins@0 {
292 reg = <0>;
293 fsl,pinmux-ids = <
294 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
295 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
296 >;
297 fsl,drive-strength = <0>;
80d969e4
FE		 298 fsl,voltage = <1>;
299 fsl,pull-up = <0>;
300 };
301
e1a4d18f
SG		 302 auart1_pins_a: auart1@0 {
303 reg = <0>;
304 fsl,pinmux-ids = <
305 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
306 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
307 0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
308 0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
309 >;
310 fsl,drive-strength = <0>;
311 fsl,voltage = <1>;
312 fsl,pull-up = <0>;
313 };
314
3143bbb4
SG		 315 auart1_2pins_a: auart1-2pins@0 {
316 reg = <0>;
317 fsl,pinmux-ids = <
318 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
319 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
320 >;
321 fsl,drive-strength = <0>;
322 fsl,voltage = <1>;
323 fsl,pull-up = <0>;
324 };
325
326 auart2_2pins_a: auart2-2pins@0 {
327 reg = <0>;
328 fsl,pinmux-ids = <
329 0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
330 0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
331 >;
332 fsl,drive-strength = <0>;
333 fsl,voltage = <1>;
334 fsl,pull-up = <0>;
335 };
336
f8040cf5
EB		 337 auart2_2pins_b: auart2-2pins@1 {
338 reg = <1>;
339 fsl,pinmux-ids = <
340 0x3080 /* MX28_PAD_AUART2_RX__AUART2_RX */
341 0x3090 /* MX28_PAD_AUART2_TX__AUART2_TX */
342 >;
343 fsl,drive-strength = <0>;
344 fsl,voltage = <1>;
345 fsl,pull-up = <0>;
346 };
347
80d969e4
FE		 348 auart3_pins_a: auart3@0 {
349 reg = <0>;
f14da767
SG		 350 fsl,pinmux-ids = <
351 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
352 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
353 0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
354 0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
355 >;
80d969e4
FE		 356 fsl,drive-strength = <0>;
357 fsl,voltage = <1>;
358 fsl,pull-up = <0>;
359 };
360
3143bbb4
SG		 361 auart3_2pins_a: auart3-2pins@0 {
362 reg = <0>;
363 fsl,pinmux-ids = <
364 0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
365 0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
366 >;
367 fsl,drive-strength = <0>;
368 fsl,voltage = <1>;
369 fsl,pull-up = <0>;
370 };
371
4812e746
EB		 372 auart3_2pins_b: auart3-2pins@1 {
373 reg = <1>;
374 fsl,pinmux-ids = <
375 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
376 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
377 >;
378 fsl,drive-strength = <0>;
379 fsl,voltage = <1>;
380 fsl,pull-up = <0>;
381 };
382
33678d12
EB		 383 auart4_2pins_a: auart4@0 {
384 reg = <0>;
385 fsl,pinmux-ids = <
386 0x2181 /* MX28_PAD_SSP3_SCK__AUART4_TX */
387 0x2191 /* MX28_PAD_SSP3_MOSI__AUART4_RX */
388 >;
389 fsl,drive-strength = <0>;
390 fsl,voltage = <1>;
391 fsl,pull-up = <0>;
392 };
393
bc3a59c1
DA		 394 mac0_pins_a: mac0@0 {
395 reg = <0>;
f14da767
SG		 396 fsl,pinmux-ids = <
397 0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
398 0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
399 0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
400 0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
401 0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
402 0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
403 0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
404 0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
405 0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
406 >;
bc3a59c1
DA		 407 fsl,drive-strength = <1>;
408 fsl,voltage = <1>;
409 fsl,pull-up = <1>;
410 };
411
412 mac1_pins_a: mac1@0 {
413 reg = <0>;
f14da767
SG		 414 fsl,pinmux-ids = <
415 0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
416 0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
417 0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
418 0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
419 0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
420 0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
421 >;
bc3a59c1
DA		 422 fsl,drive-strength = <1>;
423 fsl,voltage = <1>;
424 fsl,pull-up = <1>;
425 };
35d23047
SG		 426
427 mmc0_8bit_pins_a: mmc0-8bit@0 {
428 reg = <0>;
f14da767
SG		 429 fsl,pinmux-ids = <
430 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
431 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
432 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
433 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
434 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
435 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
436 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
437 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
438 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
439 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
440 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
441 >;
35d23047
SG		 442 fsl,drive-strength = <1>;
443 fsl,voltage = <1>;
444 fsl,pull-up = <1>;
445 };
446
8385e7c1
MR		 447 mmc0_4bit_pins_a: mmc0-4bit@0 {
448 reg = <0>;
f14da767
SG		 449 fsl,pinmux-ids = <
450 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
451 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
452 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
453 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
454 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
455 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
456 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
457 >;
8385e7c1
MR		 458 fsl,drive-strength = <1>;
459 fsl,voltage = <1>;
460 fsl,pull-up = <1>;
461 };
462
35d23047 463 mmc0_cd_cfg: mmc0-cd-cfg {
f14da767
SG		 464 fsl,pinmux-ids = <
465 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
466 >;
35d23047
SG		 467 fsl,pull-up = <0>;
468 };
469
470 mmc0_sck_cfg: mmc0-sck-cfg {
f14da767
SG		 471 fsl,pinmux-ids = <
472 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
473 >;
35d23047
SG		 474 fsl,drive-strength = <2>;
475 fsl,pull-up = <0>;
476 };
2a96e391
SG		 477
478 i2c0_pins_a: i2c0@0 {
479 reg = <0>;
f14da767
SG		 480 fsl,pinmux-ids = <
481 0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
482 0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
483 >;
2a96e391
SG		 484 fsl,drive-strength = <1>;
485 fsl,voltage = <1>;
486 fsl,pull-up = <1>;
487 };
530f1d41 488
5c697ea2
MR		 489 i2c0_pins_b: i2c0@1 {
490 reg = <1>;
491 fsl,pinmux-ids = <
492 0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */
493 0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */
494 >;
495 fsl,drive-strength = <1>;
496 fsl,voltage = <1>;
497 fsl,pull-up = <1>;
498 };
499
de7e934f
MR		 500 i2c1_pins_a: i2c1@0 {
501 reg = <0>;
502 fsl,pinmux-ids = <
503 0x3101 /* MX28_PAD_PWM0__I2C1_SCL */
504 0x3111 /* MX28_PAD_PWM1__I2C1_SDA */
505 >;
506 fsl,drive-strength = <1>;
507 fsl,voltage = <1>;
508 fsl,pull-up = <1>;
509 };
510
530f1d41
SG		 511 saif0_pins_a: saif0@0 {
512 reg = <0>;
f14da767
SG		 513 fsl,pinmux-ids = <
514 0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
515 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
516 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
517 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
518 >;
530f1d41
SG		 519 fsl,drive-strength = <2>;
520 fsl,voltage = <1>;
521 fsl,pull-up = <1>;
522 };
523
524 saif1_pins_a: saif1@0 {
525 reg = <0>;
f14da767
SG		 526 fsl,pinmux-ids = <
527 0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
528 >;
530f1d41
SG		 529 fsl,drive-strength = <2>;
530 fsl,voltage = <1>;
531 fsl,pull-up = <1>;
532 };
52f7176b 533
e1a4d18f
SG		 534 pwm0_pins_a: pwm0@0 {
535 reg = <0>;
536 fsl,pinmux-ids = <
537 0x3100 /* MX28_PAD_PWM0__PWM_0 */
538 >;
539 fsl,drive-strength = <0>;
540 fsl,voltage = <1>;
541 fsl,pull-up = <0>;
542 };
543
52f7176b
SG		 544 pwm2_pins_a: pwm2@0 {
545 reg = <0>;
546 fsl,pinmux-ids = <
547 0x3120 /* MX28_PAD_PWM2__PWM_2 */
548 >;
549 fsl,drive-strength = <0>;
550 fsl,voltage = <1>;
551 fsl,pull-up = <0>;
552 };
a915ee42 553
2bde51cb
JB		 554 pwm3_pins_a: pwm3@0 {
555 reg = <0>;
556 fsl,pinmux-ids = <
557 0x31c0 /* MX28_PAD_PWM3__PWM_3 */
558 >;
559 fsl,drive-strength = <0>;
560 fsl,voltage = <1>;
561 fsl,pull-up = <0>;
562 };
563
d248620c
MR		 564 pwm3_pins_b: pwm3@1 {
565 reg = <1>;
566 fsl,pinmux-ids = <
567 0x3141 /* MX28_PAD_SAIF0_MCLK__PWM3 */
568 >;
569 fsl,drive-strength = <0>;
570 fsl,voltage = <1>;
571 fsl,pull-up = <0>;
572 };
573
2f44211f
MR		 574 pwm4_pins_a: pwm4@0 {
575 reg = <0>;
576 fsl,pinmux-ids = <
577 0x31d0 /* MX28_PAD_PWM4__PWM_4 */
578 >;
579 fsl,drive-strength = <0>;
580 fsl,voltage = <1>;
581 fsl,pull-up = <0>;
582 };
583
a915ee42
SG		 584 lcdif_24bit_pins_a: lcdif-24bit@0 {
585 reg = <0>;
586 fsl,pinmux-ids = <
587 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
588 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
589 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
590 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
591 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
592 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
593 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
594 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
595 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
596 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
597 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
598 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
599 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
600 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
601 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
602 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
603 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
604 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
605 0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
606 0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
607 0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
608 0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
609 0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
610 0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
a915ee42
SG		 611 >;
612 fsl,drive-strength = <0>;
613 fsl,voltage = <1>;
614 fsl,pull-up = <0>;
615 };
6ca44acf 616
4ced2a40
GGM		 617 lcdif_16bit_pins_a: lcdif-16bit@0 {
618 reg = <0>;
619 fsl,pinmux-ids = <
620 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
621 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
622 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
623 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
624 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
625 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
626 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
627 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
628 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
629 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
630 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
631 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
632 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
633 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
634 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
635 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
636 >;
637 fsl,drive-strength = <0>;
638 fsl,voltage = <1>;
639 fsl,pull-up = <0>;
640 };
641
6ca44acf
SG		 642 can0_pins_a: can0@0 {
643 reg = <0>;
644 fsl,pinmux-ids = <
645 0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
646 0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
647 >;
648 fsl,drive-strength = <0>;
649 fsl,voltage = <1>;
650 fsl,pull-up = <0>;
651 };
652
653 can1_pins_a: can1@0 {
654 reg = <0>;
655 fsl,pinmux-ids = <
656 0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
657 0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
658 >;
659 fsl,drive-strength = <0>;
660 fsl,voltage = <1>;
661 fsl,pull-up = <0>;
662 };
7f122213
MV		 663
664 spi2_pins_a: spi2@0 {
665 reg = <0>;
666 fsl,pinmux-ids = <
667 0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */
668 0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */
669 0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */
670 0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */
671 >;
672 fsl,drive-strength = <1>;
673 fsl,voltage = <1>;
674 fsl,pull-up = <1>;
675 };
bb2f1261
MV		 676
677 usbphy0_pins_a: usbphy0@0 {
678 reg = <0>;
679 fsl,pinmux-ids = <
680 0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */
681 >;
682 fsl,drive-strength = <2>;
683 fsl,voltage = <1>;
684 fsl,pull-up = <0>;
685 };
686
687 usbphy0_pins_b: usbphy0@1 {
688 reg = <1>;
689 fsl,pinmux-ids = <
690 0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */
691 >;
692 fsl,drive-strength = <2>;
693 fsl,voltage = <1>;
694 fsl,pull-up = <0>;
695 };
696
697 usbphy1_pins_a: usbphy1@0 {
698 reg = <0>;
699 fsl,pinmux-ids = <
700 0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */
701 >;
702 fsl,drive-strength = <2>;
703 fsl,voltage = <1>;
704 fsl,pull-up = <0>;
705 };
bc3a59c1
DA		 706 };
707
708 digctl@8001c000 {
115581cf 709 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
0f06cde7 710 reg = <0x8001c000 0x2000>;
bc3a59c1
DA		 711 interrupts = <89>;
712 status = "disabled";
713 };
714
715 etm@80022000 {
0f06cde7 716 reg = <0x80022000 0x2000>;
bc3a59c1
DA		 717 status = "disabled";
718 };
719
f30fb03d 720 dma_apbx: dma-apbx@80024000 {
84f3570a 721 compatible = "fsl,imx28-dma-apbx";
0f06cde7 722 reg = <0x80024000 0x2000>;
f30fb03d
SG		 723 interrupts = <78 79 66 0
724 80 81 68 69
725 70 71 72 73
726 74 75 76 77>;
727 interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
728 "saif0", "saif1", "i2c0", "i2c1",
729 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
730 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
731 #dma-cells = <1>;
732 dma-channels = <16>;
b598b9f3 733 clocks = <&clks 26>;
bc3a59c1
DA		 734 };
735
736 dcp@80028000 {
0f06cde7 737 reg = <0x80028000 0x2000>;
bc3a59c1 738 interrupts = <52 53 54>;
519d8b1a 739 compatible = "fsl-dcp";
bc3a59c1
DA		 740 };
741
742 pxp@8002a000 {
0f06cde7 743 reg = <0x8002a000 0x2000>;
bc3a59c1
DA		 744 interrupts = <39>;
745 status = "disabled";
746 };
747
748 ocotp@8002c000 {
69d75a02 749 compatible = "fsl,ocotp";
0f06cde7 750 reg = <0x8002c000 0x2000>;
bc3a59c1
DA		 751 status = "disabled";
752 };
753
754 axi-ahb@8002e000 {
0f06cde7 755 reg = <0x8002e000 0x2000>;
bc3a59c1
DA		 756 status = "disabled";
757 };
758
759 lcdif@80030000 {
a915ee42 760 compatible = "fsl,imx28-lcdif";
0f06cde7 761 reg = <0x80030000 0x2000>;
bc3a59c1 762 interrupts = <38 86>;
b598b9f3 763 clocks = <&clks 55>;
f30fb03d
SG		 764 dmas = <&dma_apbh 13>;
765 dma-names = "rx";
bc3a59c1
DA		 766 status = "disabled";
767 };
768
769 can0: can@80032000 {
6ca44acf 770 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
0f06cde7 771 reg = <0x80032000 0x2000>;
bc3a59c1 772 interrupts = <8>;
b598b9f3
SG		 773 clocks = <&clks 58>, <&clks 58>;
774 clock-names = "ipg", "per";
bc3a59c1
DA		 775 status = "disabled";
776 };
777
778 can1: can@80034000 {
6ca44acf 779 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
0f06cde7 780 reg = <0x80034000 0x2000>;
bc3a59c1 781 interrupts = <9>;
b598b9f3
SG		 782 clocks = <&clks 59>, <&clks 59>;
783 clock-names = "ipg", "per";
bc3a59c1
DA		 784 status = "disabled";
785 };
786
787 simdbg@8003c000 {
0f06cde7 788 reg = <0x8003c000 0x200>;
bc3a59c1
DA		 789 status = "disabled";
790 };
791
792 simgpmisel@8003c200 {
0f06cde7 793 reg = <0x8003c200 0x100>;
bc3a59c1
DA		 794 status = "disabled";
795 };
796
797 simsspsel@8003c300 {
0f06cde7 798 reg = <0x8003c300 0x100>;
bc3a59c1
DA		 799 status = "disabled";
800 };
801
802 simmemsel@8003c400 {
0f06cde7 803 reg = <0x8003c400 0x100>;
bc3a59c1
DA		 804 status = "disabled";
805 };
806
807 gpiomon@8003c500 {
0f06cde7 808 reg = <0x8003c500 0x100>;
bc3a59c1
DA		 809 status = "disabled";
810 };
811
812 simenet@8003c700 {
0f06cde7 813 reg = <0x8003c700 0x100>;
bc3a59c1
DA		 814 status = "disabled";
815 };
816
817 armjtag@8003c800 {
0f06cde7 818 reg = <0x8003c800 0x100>;
bc3a59c1
DA		 819 status = "disabled";
820 };
821 };
822
823 apbx@80040000 {
824 compatible = "simple-bus";
825 #address-cells = <1>;
826 #size-cells = <1>;
827 reg = <0x80040000 0x40000>;
828 ranges;
829
b598b9f3 830 clks: clkctrl@80040000 {
8f7cf881 831 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
0f06cde7 832 reg = <0x80040000 0x2000>;
b598b9f3 833 #clock-cells = <1>;
bc3a59c1
DA		 834 };
835
836 saif0: saif@80042000 {
530f1d41 837 compatible = "fsl,imx28-saif";
0f06cde7 838 reg = <0x80042000 0x2000>;
bc3a59c1 839 interrupts = <59 80>;
b598b9f3 840 clocks = <&clks 53>;
f30fb03d
SG		 841 dmas = <&dma_apbx 4>;
842 dma-names = "rx-tx";
530f1d41 843 fsl,saif-dma-channel = <4>;
bc3a59c1
DA		 844 status = "disabled";
845 };
846
847 power@80044000 {
0f06cde7 848 reg = <0x80044000 0x2000>;
bc3a59c1
DA		 849 status = "disabled";
850 };
851
852 saif1: saif@80046000 {
530f1d41 853 compatible = "fsl,imx28-saif";
0f06cde7 854 reg = <0x80046000 0x2000>;
bc3a59c1 855 interrupts = <58 81>;
b598b9f3 856 clocks = <&clks 54>;
f30fb03d
SG		 857 dmas = <&dma_apbx 5>;
858 dma-names = "rx-tx";
530f1d41 859 fsl,saif-dma-channel = <5>;
bc3a59c1
DA		 860 status = "disabled";
861 };
862
863 lradc@80050000 {
aef35104 864 compatible = "fsl,imx28-lradc";
0f06cde7 865 reg = <0x80050000 0x2000>;
aef35104
MV		 866 interrupts = <10 14 15 16 17 18 19
867 20 21 22 23 24 25>;
bc3a59c1
DA		 868 status = "disabled";
869 };
870
871 spdif@80054000 {
0f06cde7 872 reg = <0x80054000 0x2000>;
bc3a59c1 873 interrupts = <45 66>;
f30fb03d
SG		 874 dmas = <&dma_apbx 2>;
875 dma-names = "tx";
bc3a59c1
DA		 876 status = "disabled";
877 };
878
879 rtc@80056000 {
f98c990c 880 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
0f06cde7 881 reg = <0x80056000 0x2000>;
f98c990c 882 interrupts = <29>;
bc3a59c1
DA		 883 };
884
885 i2c0: i2c@80058000 {
2a96e391
SG		 886 #address-cells = <1>;
887 #size-cells = <0>;
888 compatible = "fsl,imx28-i2c";
0f06cde7 889 reg = <0x80058000 0x2000>;
bc3a59c1 890 interrupts = <111 68>;
cd4f2d4a 891 clock-frequency = <100000>;
f30fb03d
SG		 892 dmas = <&dma_apbx 6>;
893 dma-names = "rx-tx";
62885f59 894 fsl,i2c-dma-channel = <6>;
bc3a59c1
DA		 895 status = "disabled";
896 };
897
898 i2c1: i2c@8005a000 {
2a96e391
SG		 899 #address-cells = <1>;
900 #size-cells = <0>;
901 compatible = "fsl,imx28-i2c";
0f06cde7 902 reg = <0x8005a000 0x2000>;
bc3a59c1 903 interrupts = <110 69>;
cd4f2d4a 904 clock-frequency = <100000>;
f30fb03d
SG		 905 dmas = <&dma_apbx 7>;
906 dma-names = "rx-tx";
62885f59 907 fsl,i2c-dma-channel = <7>;
bc3a59c1
DA		 908 status = "disabled";
909 };
910
52f7176b
SG		 911 pwm: pwm@80064000 {
912 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
0f06cde7 913 reg = <0x80064000 0x2000>;
b598b9f3 914 clocks = <&clks 44>;
52f7176b
SG		 915 #pwm-cells = <2>;
916 fsl,pwm-number = <8>;
bc3a59c1
DA		 917 status = "disabled";
918 };
919
920 timrot@80068000 {
eeca6e60 921 compatible = "fsl,imx28-timrot", "fsl,timrot";
0f06cde7 922 reg = <0x80068000 0x2000>;
eeca6e60 923 interrupts = <48 49 50 51>;
2efb9504 924 clocks = <&clks 26>;
bc3a59c1
DA		 925 };
926
927 auart0: serial@8006a000 {
80d969e4 928 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1
DA		 929 reg = <0x8006a000 0x2000>;
930 interrupts = <112 70 71>;
f30fb03d
SG		 931 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
932 dma-names = "rx", "tx";
77a807dc 933 fsl,auart-dma-channel = <8 9>;
b598b9f3 934 clocks = <&clks 45>;
bc3a59c1
DA		 935 status = "disabled";
936 };
937
938 auart1: serial@8006c000 {
80d969e4 939 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1
DA		 940 reg = <0x8006c000 0x2000>;
941 interrupts = <113 72 73>;
f30fb03d
SG		 942 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
943 dma-names = "rx", "tx";
b598b9f3 944 clocks = <&clks 45>;
bc3a59c1
DA		 945 status = "disabled";
946 };
947
948 auart2: serial@8006e000 {
80d969e4 949 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1
DA		 950 reg = <0x8006e000 0x2000>;
951 interrupts = <114 74 75>;
f30fb03d
SG		 952 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
953 dma-names = "rx", "tx";
b598b9f3 954 clocks = <&clks 45>;
bc3a59c1
DA		 955 status = "disabled";
956 };
957
958 auart3: serial@80070000 {
80d969e4 959 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1
DA		 960 reg = <0x80070000 0x2000>;
961 interrupts = <115 76 77>;
f30fb03d
SG		 962 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
963 dma-names = "rx", "tx";
b598b9f3 964 clocks = <&clks 45>;
bc3a59c1
DA		 965 status = "disabled";
966 };
967
968 auart4: serial@80072000 {
80d969e4 969 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1
DA		 970 reg = <0x80072000 0x2000>;
971 interrupts = <116 78 79>;
f30fb03d
SG		 972 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
973 dma-names = "rx", "tx";
b598b9f3 974 clocks = <&clks 45>;
bc3a59c1
DA		 975 status = "disabled";
976 };
977
978 duart: serial@80074000 {
979 compatible = "arm,pl011", "arm,primecell";
980 reg = <0x80074000 0x1000>;
981 interrupts = <47>;
b598b9f3
SG		 982 clocks = <&clks 45>, <&clks 26>;
983 clock-names = "uart", "apb_pclk";
bc3a59c1
DA		 984 status = "disabled";
985 };
986
987 usbphy0: usbphy@8007c000 {
5da01270 988 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
bc3a59c1 989 reg = <0x8007c000 0x2000>;
b598b9f3 990 clocks = <&clks 62>;
bc3a59c1
DA		 991 status = "disabled";
992 };
993
994 usbphy1: usbphy@8007e000 {
5da01270 995 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
bc3a59c1 996 reg = <0x8007e000 0x2000>;
b598b9f3 997 clocks = <&clks 63>;
bc3a59c1
DA		 998 status = "disabled";
999 };
1000 };
1001 };
1002
1003 ahb@80080000 {
1004 compatible = "simple-bus";
1005 #address-cells = <1>;
1006 #size-cells = <1>;
1007 reg = <0x80080000 0x80000>;
1008 ranges;
1009
5da01270
RZ		 1010 usb0: usb@80080000 {
1011 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
bc3a59c1 1012 reg = <0x80080000 0x10000>;
5da01270 1013 interrupts = <93>;
b598b9f3 1014 clocks = <&clks 60>;
5da01270 1015 fsl,usbphy = <&usbphy0>;
bc3a59c1
DA		 1016 status = "disabled";
1017 };
1018
5da01270
RZ		 1019 usb1: usb@80090000 {
1020 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
bc3a59c1 1021 reg = <0x80090000 0x10000>;
5da01270 1022 interrupts = <92>;
b598b9f3 1023 clocks = <&clks 61>;
5da01270 1024 fsl,usbphy = <&usbphy1>;
bc3a59c1
DA		 1025 status = "disabled";
1026 };
1027
1028 dflpt@800c0000 {
1029 reg = <0x800c0000 0x10000>;
1030 status = "disabled";
1031 };
1032
1033 mac0: ethernet@800f0000 {
1034 compatible = "fsl,imx28-fec";
1035 reg = <0x800f0000 0x4000>;
1036 interrupts = <101>;
f231a9fe
WS		 1037 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1038 clock-names = "ipg", "ahb", "enet_out";
bc3a59c1
DA		 1039 status = "disabled";
1040 };
1041
1042 mac1: ethernet@800f4000 {
1043 compatible = "fsl,imx28-fec";
1044 reg = <0x800f4000 0x4000>;
1045 interrupts = <102>;
b598b9f3
SG		 1046 clocks = <&clks 57>, <&clks 57>;
1047 clock-names = "ipg", "ahb";
bc3a59c1
DA		 1048 status = "disabled";
1049 };
1050
1051 switch@800f8000 {
1052 reg = <0x800f8000 0x8000>;
1053 status = "disabled";
1054 };
1055
1056 };
1057};
Linux kernel - Deliverables
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