projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| bc3a59c1 DA |
1 | /* |
| 2 | * Copyright 2012 Freescale Semiconductor, Inc. | |
| 3 | * | |
| 4 | * The code contained herein is licensed under the GNU General Public | |
| 5 | * License. You may obtain a copy of the GNU General Public License | |
| 6 | * Version 2 or later at the following locations: | |
| 7 | * | |
| 8 | * http://www.opensource.org/licenses/gpl-license.html | |
| 9 | * http://www.gnu.org/copyleft/gpl.html | |
| 10 | */ | |
| 11 | ||
| 12 | /include/ "skeleton.dtsi" | |
| 13 | ||
| 14 | / { | |
| 15 | interrupt-parent = <&icoll>; | |
| 16 | ||
| ce4c6f9b SG |
17 | aliases { |
| 18 | gpio0 = &gpio0; | |
| 19 | gpio1 = &gpio1; | |
| 20 | gpio2 = &gpio2; | |
| 21 | gpio3 = &gpio3; | |
| 22 | gpio4 = &gpio4; | |
| 530f1d41 SG |
23 | saif0 = &saif0; |
| 24 | saif1 = &saif1; | |
| 80d969e4 FE |
25 | serial0 = &auart0; |
| 26 | serial1 = &auart1; | |
| 27 | serial2 = &auart2; | |
| 28 | serial3 = &auart3; | |
| 29 | serial4 = &auart4; | |
| ce4c6f9b SG |
30 | }; |
| 31 | ||
| bc3a59c1 DA |
32 | cpus { |
| 33 | cpu@0 { | |
| 34 | compatible = "arm,arm926ejs"; | |
| 35 | }; | |
| 36 | }; | |
| 37 | ||
| 38 | apb@80000000 { | |
| 39 | compatible = "simple-bus"; | |
| 40 | #address-cells = <1>; | |
| 41 | #size-cells = <1>; | |
| 42 | reg = <0x80000000 0x80000>; | |
| 43 | ranges; | |
| 44 | ||
| 45 | apbh@80000000 { | |
| 46 | compatible = "simple-bus"; | |
| 47 | #address-cells = <1>; | |
| 48 | #size-cells = <1>; | |
| 49 | reg = <0x80000000 0x3c900>; | |
| 50 | ranges; | |
| 51 | ||
| 52 | icoll: interrupt-controller@80000000 { | |
| 53 | compatible = "fsl,imx28-icoll", "fsl,mxs-icoll"; | |
| 54 | interrupt-controller; | |
| 55 | #interrupt-cells = <1>; | |
| 56 | reg = <0x80000000 0x2000>; | |
| 57 | }; | |
| 58 | ||
| 59 | hsadc@80002000 { | |
| 60 | reg = <0x80002000 2000>; | |
| 61 | interrupts = <13 87>; | |
| 62 | status = "disabled"; | |
| 63 | }; | |
| 64 | ||
| 65 | dma-apbh@80004000 { | |
| 84f3570a | 66 | compatible = "fsl,imx28-dma-apbh"; |
| bc3a59c1 | 67 | reg = <0x80004000 2000>; |
| bc3a59c1 DA |
68 | }; |
| 69 | ||
| 70 | perfmon@80006000 { | |
| 71 | reg = <0x80006000 800>; | |
| 72 | interrupts = <27>; | |
| 73 | status = "disabled"; | |
| 74 | }; | |
| 75 | ||
| 7a8e5149 HS |
76 | gpmi-nand@8000c000 { |
| 77 | compatible = "fsl,imx28-gpmi-nand"; | |
| 78 | #address-cells = <1>; | |
| 79 | #size-cells = <1>; | |
| 80 | reg = <0x8000c000 2000>, <0x8000a000 2000>; | |
| 81 | reg-names = "gpmi-nand", "bch"; | |
| 82 | interrupts = <88>, <41>; | |
| 83 | interrupt-names = "gpmi-dma", "bch"; | |
| 84 | fsl,gpmi-dma-channel = <4>; | |
| bc3a59c1 DA |
85 | status = "disabled"; |
| 86 | }; | |
| 87 | ||
| 88 | ssp0: ssp@80010000 { | |
| 89 | reg = <0x80010000 2000>; | |
| 90 | interrupts = <96 82>; | |
| 35d23047 | 91 | fsl,ssp-dma-channel = <0>; |
| bc3a59c1 DA |
92 | status = "disabled"; |
| 93 | }; | |
| 94 | ||
| 95 | ssp1: ssp@80012000 { | |
| 96 | reg = <0x80012000 2000>; | |
| 97 | interrupts = <97 83>; | |
| 35d23047 | 98 | fsl,ssp-dma-channel = <1>; |
| bc3a59c1 DA |
99 | status = "disabled"; |
| 100 | }; | |
| 101 | ||
| 102 | ssp2: ssp@80014000 { | |
| 103 | reg = <0x80014000 2000>; | |
| 104 | interrupts = <98 84>; | |
| 35d23047 | 105 | fsl,ssp-dma-channel = <2>; |
| bc3a59c1 DA |
106 | status = "disabled"; |
| 107 | }; | |
| 108 | ||
| 109 | ssp3: ssp@80016000 { | |
| 110 | reg = <0x80016000 2000>; | |
| 111 | interrupts = <99 85>; | |
| 35d23047 | 112 | fsl,ssp-dma-channel = <3>; |
| bc3a59c1 DA |
113 | status = "disabled"; |
| 114 | }; | |
| 115 | ||
| 116 | pinctrl@80018000 { | |
| 117 | #address-cells = <1>; | |
| 118 | #size-cells = <0>; | |
| ce4c6f9b | 119 | compatible = "fsl,imx28-pinctrl", "simple-bus"; |
| bc3a59c1 DA |
120 | reg = <0x80018000 2000>; |
| 121 | ||
| ce4c6f9b SG |
122 | gpio0: gpio@0 { |
| 123 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
| 124 | interrupts = <127>; | |
| 125 | gpio-controller; | |
| 126 | #gpio-cells = <2>; | |
| 127 | interrupt-controller; | |
| 128 | #interrupt-cells = <2>; | |
| 129 | }; | |
| 130 | ||
| 131 | gpio1: gpio@1 { | |
| 132 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
| 133 | interrupts = <126>; | |
| 134 | gpio-controller; | |
| 135 | #gpio-cells = <2>; | |
| 136 | interrupt-controller; | |
| 137 | #interrupt-cells = <2>; | |
| 138 | }; | |
| 139 | ||
| 140 | gpio2: gpio@2 { | |
| 141 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
| 142 | interrupts = <125>; | |
| 143 | gpio-controller; | |
| 144 | #gpio-cells = <2>; | |
| 145 | interrupt-controller; | |
| 146 | #interrupt-cells = <2>; | |
| 147 | }; | |
| 148 | ||
| 149 | gpio3: gpio@3 { | |
| 150 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
| 151 | interrupts = <124>; | |
| 152 | gpio-controller; | |
| 153 | #gpio-cells = <2>; | |
| 154 | interrupt-controller; | |
| 155 | #interrupt-cells = <2>; | |
| 156 | }; | |
| 157 | ||
| 158 | gpio4: gpio@4 { | |
| 159 | compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; | |
| 160 | interrupts = <123>; | |
| 161 | gpio-controller; | |
| 162 | #gpio-cells = <2>; | |
| 163 | interrupt-controller; | |
| 164 | #interrupt-cells = <2>; | |
| 165 | }; | |
| 166 | ||
| bc3a59c1 DA |
167 | duart_pins_a: duart@0 { |
| 168 | reg = <0>; | |
| 169 | fsl,pinmux-ids = <0x3102 0x3112>; | |
| 170 | fsl,drive-strength = <0>; | |
| 171 | fsl,voltage = <1>; | |
| 172 | fsl,pull-up = <0>; | |
| 173 | }; | |
| 174 | ||
| 7a8e5149 HS |
175 | gpmi_pins_a: gpmi-nand@0 { |
| 176 | reg = <0>; | |
| 177 | fsl,pinmux-ids = <0x0000 0x0010 0x0020 | |
| 178 | 0x0030 0x0040 0x0050 0x0060 | |
| 179 | 0x0070 0x0100 0x0110 0x0140 | |
| 180 | 0x0150 0x0180 0x0190 0x01a0 | |
| 181 | 0x01b0 0x01c0>; | |
| 182 | fsl,drive-strength = <0>; | |
| 183 | fsl,voltage = <1>; | |
| 184 | fsl,pull-up = <0>; | |
| 185 | }; | |
| 186 | ||
| 187 | gpmi_status_cfg: gpmi-status-cfg { | |
| 188 | fsl,pinmux-ids = <0x0180 0x0190 0x01c0>; | |
| 189 | fsl,drive-strength = <2>; | |
| 190 | }; | |
| 191 | ||
| 80d969e4 FE |
192 | auart0_pins_a: auart0@0 { |
| 193 | reg = <0>; | |
| 194 | fsl,pinmux-ids = <0x3000 0x3010 0x3020 0x3030>; | |
| 195 | fsl,drive-strength = <0>; | |
| 196 | fsl,voltage = <1>; | |
| 197 | fsl,pull-up = <0>; | |
| 198 | }; | |
| 199 | ||
| 200 | auart3_pins_a: auart3@0 { | |
| 201 | reg = <0>; | |
| 202 | fsl,pinmux-ids = <0x30c0 0x30d0 0x30e0 0x30f0>; | |
| 203 | fsl,drive-strength = <0>; | |
| 204 | fsl,voltage = <1>; | |
| 205 | fsl,pull-up = <0>; | |
| 206 | }; | |
| 207 | ||
| bc3a59c1 DA |
208 | mac0_pins_a: mac0@0 { |
| 209 | reg = <0>; | |
| 210 | fsl,pinmux-ids = <0x4000 0x4010 0x4020 | |
| 211 | 0x4030 0x4040 0x4060 0x4070 | |
| 212 | 0x4080 0x4100>; | |
| 213 | fsl,drive-strength = <1>; | |
| 214 | fsl,voltage = <1>; | |
| 215 | fsl,pull-up = <1>; | |
| 216 | }; | |
| 217 | ||
| 218 | mac1_pins_a: mac1@0 { | |
| 219 | reg = <0>; | |
| 220 | fsl,pinmux-ids = <0x40f1 0x4091 0x40a1 | |
| 221 | 0x40e1 0x40b1 0x40c1>; | |
| 222 | fsl,drive-strength = <1>; | |
| 223 | fsl,voltage = <1>; | |
| 224 | fsl,pull-up = <1>; | |
| 225 | }; | |
| 35d23047 SG |
226 | |
| 227 | mmc0_8bit_pins_a: mmc0-8bit@0 { | |
| 228 | reg = <0>; | |
| 229 | fsl,pinmux-ids = <0x2000 0x2010 0x2020 | |
| 230 | 0x2030 0x2040 0x2050 0x2060 | |
| 231 | 0x2070 0x2080 0x2090 0x20a0>; | |
| 232 | fsl,drive-strength = <1>; | |
| 233 | fsl,voltage = <1>; | |
| 234 | fsl,pull-up = <1>; | |
| 235 | }; | |
| 236 | ||
| 237 | mmc0_cd_cfg: mmc0-cd-cfg { | |
| 238 | fsl,pinmux-ids = <0x2090>; | |
| 239 | fsl,pull-up = <0>; | |
| 240 | }; | |
| 241 | ||
| 242 | mmc0_sck_cfg: mmc0-sck-cfg { | |
| 243 | fsl,pinmux-ids = <0x20a0>; | |
| 244 | fsl,drive-strength = <2>; | |
| 245 | fsl,pull-up = <0>; | |
| 246 | }; | |
| 2a96e391 SG |
247 | |
| 248 | i2c0_pins_a: i2c0@0 { | |
| 249 | reg = <0>; | |
| 250 | fsl,pinmux-ids = <0x3180 0x3190>; | |
| 251 | fsl,drive-strength = <1>; | |
| 252 | fsl,voltage = <1>; | |
| 253 | fsl,pull-up = <1>; | |
| 254 | }; | |
| 530f1d41 SG |
255 | |
| 256 | saif0_pins_a: saif0@0 { | |
| 257 | reg = <0>; | |
| 258 | fsl,pinmux-ids = | |
| 259 | <0x3140 0x3150 0x3160 0x3170>; | |
| 260 | fsl,drive-strength = <2>; | |
| 261 | fsl,voltage = <1>; | |
| 262 | fsl,pull-up = <1>; | |
| 263 | }; | |
| 264 | ||
| 265 | saif1_pins_a: saif1@0 { | |
| 266 | reg = <0>; | |
| 267 | fsl,pinmux-ids = <0x31a0>; | |
| 268 | fsl,drive-strength = <2>; | |
| 269 | fsl,voltage = <1>; | |
| 270 | fsl,pull-up = <1>; | |
| 271 | }; | |
| bc3a59c1 DA |
272 | }; |
| 273 | ||
| 274 | digctl@8001c000 { | |
| 275 | reg = <0x8001c000 2000>; | |
| 276 | interrupts = <89>; | |
| 277 | status = "disabled"; | |
| 278 | }; | |
| 279 | ||
| 280 | etm@80022000 { | |
| 281 | reg = <0x80022000 2000>; | |
| 282 | status = "disabled"; | |
| 283 | }; | |
| 284 | ||
| 285 | dma-apbx@80024000 { | |
| 84f3570a | 286 | compatible = "fsl,imx28-dma-apbx"; |
| bc3a59c1 | 287 | reg = <0x80024000 2000>; |
| bc3a59c1 DA |
288 | }; |
| 289 | ||
| 290 | dcp@80028000 { | |
| 291 | reg = <0x80028000 2000>; | |
| 292 | interrupts = <52 53 54>; | |
| 293 | status = "disabled"; | |
| 294 | }; | |
| 295 | ||
| 296 | pxp@8002a000 { | |
| 297 | reg = <0x8002a000 2000>; | |
| 298 | interrupts = <39>; | |
| 299 | status = "disabled"; | |
| 300 | }; | |
| 301 | ||
| 302 | ocotp@8002c000 { | |
| 303 | reg = <0x8002c000 2000>; | |
| 304 | status = "disabled"; | |
| 305 | }; | |
| 306 | ||
| 307 | axi-ahb@8002e000 { | |
| 308 | reg = <0x8002e000 2000>; | |
| 309 | status = "disabled"; | |
| 310 | }; | |
| 311 | ||
| 312 | lcdif@80030000 { | |
| 313 | reg = <0x80030000 2000>; | |
| 314 | interrupts = <38 86>; | |
| 315 | status = "disabled"; | |
| 316 | }; | |
| 317 | ||
| 318 | can0: can@80032000 { | |
| 319 | reg = <0x80032000 2000>; | |
| 320 | interrupts = <8>; | |
| 321 | status = "disabled"; | |
| 322 | }; | |
| 323 | ||
| 324 | can1: can@80034000 { | |
| 325 | reg = <0x80034000 2000>; | |
| 326 | interrupts = <9>; | |
| 327 | status = "disabled"; | |
| 328 | }; | |
| 329 | ||
| 330 | simdbg@8003c000 { | |
| 331 | reg = <0x8003c000 200>; | |
| 332 | status = "disabled"; | |
| 333 | }; | |
| 334 | ||
| 335 | simgpmisel@8003c200 { | |
| 336 | reg = <0x8003c200 100>; | |
| 337 | status = "disabled"; | |
| 338 | }; | |
| 339 | ||
| 340 | simsspsel@8003c300 { | |
| 341 | reg = <0x8003c300 100>; | |
| 342 | status = "disabled"; | |
| 343 | }; | |
| 344 | ||
| 345 | simmemsel@8003c400 { | |
| 346 | reg = <0x8003c400 100>; | |
| 347 | status = "disabled"; | |
| 348 | }; | |
| 349 | ||
| 350 | gpiomon@8003c500 { | |
| 351 | reg = <0x8003c500 100>; | |
| 352 | status = "disabled"; | |
| 353 | }; | |
| 354 | ||
| 355 | simenet@8003c700 { | |
| 356 | reg = <0x8003c700 100>; | |
| 357 | status = "disabled"; | |
| 358 | }; | |
| 359 | ||
| 360 | armjtag@8003c800 { | |
| 361 | reg = <0x8003c800 100>; | |
| 362 | status = "disabled"; | |
| 363 | }; | |
| 364 | }; | |
| 365 | ||
| 366 | apbx@80040000 { | |
| 367 | compatible = "simple-bus"; | |
| 368 | #address-cells = <1>; | |
| 369 | #size-cells = <1>; | |
| 370 | reg = <0x80040000 0x40000>; | |
| 371 | ranges; | |
| 372 | ||
| 373 | clkctl@80040000 { | |
| 374 | reg = <0x80040000 2000>; | |
| 375 | status = "disabled"; | |
| 376 | }; | |
| 377 | ||
| 378 | saif0: saif@80042000 { | |
| 530f1d41 | 379 | compatible = "fsl,imx28-saif"; |
| bc3a59c1 DA |
380 | reg = <0x80042000 2000>; |
| 381 | interrupts = <59 80>; | |
| 530f1d41 | 382 | fsl,saif-dma-channel = <4>; |
| bc3a59c1 DA |
383 | status = "disabled"; |
| 384 | }; | |
| 385 | ||
| 386 | power@80044000 { | |
| 387 | reg = <0x80044000 2000>; | |
| 388 | status = "disabled"; | |
| 389 | }; | |
| 390 | ||
| 391 | saif1: saif@80046000 { | |
| 530f1d41 | 392 | compatible = "fsl,imx28-saif"; |
| bc3a59c1 DA |
393 | reg = <0x80046000 2000>; |
| 394 | interrupts = <58 81>; | |
| 530f1d41 | 395 | fsl,saif-dma-channel = <5>; |
| bc3a59c1 DA |
396 | status = "disabled"; |
| 397 | }; | |
| 398 | ||
| 399 | lradc@80050000 { | |
| 400 | reg = <0x80050000 2000>; | |
| 401 | status = "disabled"; | |
| 402 | }; | |
| 403 | ||
| 404 | spdif@80054000 { | |
| 405 | reg = <0x80054000 2000>; | |
| 406 | interrupts = <45 66>; | |
| 407 | status = "disabled"; | |
| 408 | }; | |
| 409 | ||
| 410 | rtc@80056000 { | |
| 411 | reg = <0x80056000 2000>; | |
| 412 | interrupts = <28 29>; | |
| 413 | status = "disabled"; | |
| 414 | }; | |
| 415 | ||
| 416 | i2c0: i2c@80058000 { | |
| 2a96e391 SG |
417 | #address-cells = <1>; |
| 418 | #size-cells = <0>; | |
| 419 | compatible = "fsl,imx28-i2c"; | |
| bc3a59c1 DA |
420 | reg = <0x80058000 2000>; |
| 421 | interrupts = <111 68>; | |
| 422 | status = "disabled"; | |
| 423 | }; | |
| 424 | ||
| 425 | i2c1: i2c@8005a000 { | |
| 2a96e391 SG |
426 | #address-cells = <1>; |
| 427 | #size-cells = <0>; | |
| 428 | compatible = "fsl,imx28-i2c"; | |
| bc3a59c1 DA |
429 | reg = <0x8005a000 2000>; |
| 430 | interrupts = <110 69>; | |
| 431 | status = "disabled"; | |
| 432 | }; | |
| 433 | ||
| 434 | pwm@80064000 { | |
| 435 | reg = <0x80064000 2000>; | |
| 436 | status = "disabled"; | |
| 437 | }; | |
| 438 | ||
| 439 | timrot@80068000 { | |
| 440 | reg = <0x80068000 2000>; | |
| 441 | status = "disabled"; | |
| 442 | }; | |
| 443 | ||
| 444 | auart0: serial@8006a000 { | |
| 80d969e4 | 445 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
| bc3a59c1 DA |
446 | reg = <0x8006a000 0x2000>; |
| 447 | interrupts = <112 70 71>; | |
| 448 | status = "disabled"; | |
| 449 | }; | |
| 450 | ||
| 451 | auart1: serial@8006c000 { | |
| 80d969e4 | 452 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
| bc3a59c1 DA |
453 | reg = <0x8006c000 0x2000>; |
| 454 | interrupts = <113 72 73>; | |
| 455 | status = "disabled"; | |
| 456 | }; | |
| 457 | ||
| 458 | auart2: serial@8006e000 { | |
| 80d969e4 | 459 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
| bc3a59c1 DA |
460 | reg = <0x8006e000 0x2000>; |
| 461 | interrupts = <114 74 75>; | |
| 462 | status = "disabled"; | |
| 463 | }; | |
| 464 | ||
| 465 | auart3: serial@80070000 { | |
| 80d969e4 | 466 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
| bc3a59c1 DA |
467 | reg = <0x80070000 0x2000>; |
| 468 | interrupts = <115 76 77>; | |
| 469 | status = "disabled"; | |
| 470 | }; | |
| 471 | ||
| 472 | auart4: serial@80072000 { | |
| 80d969e4 | 473 | compatible = "fsl,imx28-auart", "fsl,imx23-auart"; |
| bc3a59c1 DA |
474 | reg = <0x80072000 0x2000>; |
| 475 | interrupts = <116 78 79>; | |
| 476 | status = "disabled"; | |
| 477 | }; | |
| 478 | ||
| 479 | duart: serial@80074000 { | |
| 480 | compatible = "arm,pl011", "arm,primecell"; | |
| 481 | reg = <0x80074000 0x1000>; | |
| 482 | interrupts = <47>; | |
| 483 | status = "disabled"; | |
| 484 | }; | |
| 485 | ||
| 486 | usbphy0: usbphy@8007c000 { | |
| 487 | reg = <0x8007c000 0x2000>; | |
| 488 | status = "disabled"; | |
| 489 | }; | |
| 490 | ||
| 491 | usbphy1: usbphy@8007e000 { | |
| 492 | reg = <0x8007e000 0x2000>; | |
| 493 | status = "disabled"; | |
| 494 | }; | |
| 495 | }; | |
| 496 | }; | |
| 497 | ||
| 498 | ahb@80080000 { | |
| 499 | compatible = "simple-bus"; | |
| 500 | #address-cells = <1>; | |
| 501 | #size-cells = <1>; | |
| 502 | reg = <0x80080000 0x80000>; | |
| 503 | ranges; | |
| 504 | ||
| 505 | usbctrl0: usbctrl@80080000 { | |
| 506 | reg = <0x80080000 0x10000>; | |
| 507 | status = "disabled"; | |
| 508 | }; | |
| 509 | ||
| 510 | usbctrl1: usbctrl@80090000 { | |
| 511 | reg = <0x80090000 0x10000>; | |
| 512 | status = "disabled"; | |
| 513 | }; | |
| 514 | ||
| 515 | dflpt@800c0000 { | |
| 516 | reg = <0x800c0000 0x10000>; | |
| 517 | status = "disabled"; | |
| 518 | }; | |
| 519 | ||
| 520 | mac0: ethernet@800f0000 { | |
| 521 | compatible = "fsl,imx28-fec"; | |
| 522 | reg = <0x800f0000 0x4000>; | |
| 523 | interrupts = <101>; | |
| 524 | status = "disabled"; | |
| 525 | }; | |
| 526 | ||
| 527 | mac1: ethernet@800f4000 { | |
| 528 | compatible = "fsl,imx28-fec"; | |
| 529 | reg = <0x800f4000 0x4000>; | |
| 530 | interrupts = <102>; | |
| 531 | status = "disabled"; | |
| 532 | }; | |
| 533 | ||
| 534 | switch@800f8000 { | |
| 535 | reg = <0x800f8000 0x8000>; | |
| 536 | status = "disabled"; | |
| 537 | }; | |
| 538 | ||
| 539 | }; | |
| 540 | }; |