[deliverable/linux.git] / arch / arm / boot / dts / imx28.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		saif0 = &saif0;
		saif1 = &saif1;
		serial0 = &auart0;
		serial1 = &auart1;
		serial2 = &auart2;
		serial3 = &auart3;
		serial4 = &auart4;
	};

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			hsadc@80002000 {
				reg = <0x80002000 2000>;
				interrupts = <13 87>;
				status = "disabled";
			};

			dma-apbh@80004000 {
				compatible = "fsl,imx28-dma-apbh";
				reg = <0x80004000 2000>;
			};

			perfmon@80006000 {
				reg = <0x80006000 800>;
				interrupts = <27>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				compatible = "fsl,imx28-gpmi-nand";
				#address-cells = <1>;
				#size-cells = <1>;
				reg = <0x8000c000 2000>, <0x8000a000 2000>;
				reg-names = "gpmi-nand", "bch";
				interrupts = <88>, <41>;
				interrupt-names = "gpmi-dma", "bch";
				fsl,gpmi-dma-channel = <4>;
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 2000>;
				interrupts = <96 82>;
				fsl,ssp-dma-channel = <0>;
				status = "disabled";
			};

			ssp1: ssp@80012000 {
				reg = <0x80012000 2000>;
				interrupts = <97 83>;
				fsl,ssp-dma-channel = <1>;
				status = "disabled";
			};

			ssp2: ssp@80014000 {
				reg = <0x80014000 2000>;
				interrupts = <98 84>;
				fsl,ssp-dma-channel = <2>;
				status = "disabled";
			};

			ssp3: ssp@80016000 {
				reg = <0x80016000 2000>;
				interrupts = <99 85>;
				fsl,ssp-dma-channel = <3>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-pinctrl", "simple-bus";
				reg = <0x80018000 2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <126>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <125>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio3: gpio@3 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <124>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio4: gpio@4 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <123>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x3102 0x3112>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				duart_pins_b: duart@1 {
					reg = <1>;
					fsl,pinmux-ids = <0x3022 0x3032>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_pins_a: gpmi-nand@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x0000 0x0010 0x0020
						0x0030 0x0040 0x0050 0x0060
						0x0070 0x0100 0x0110 0x0140
						0x0150 0x0180 0x0190 0x01a0
						0x01b0 0x01c0>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				gpmi_status_cfg: gpmi-status-cfg {
					fsl,pinmux-ids = <0x0180 0x0190 0x01c0>;
					fsl,drive-strength = <2>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x3000 0x3010 0x3020 0x3030>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart3_pins_a: auart3@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x30c0 0x30d0 0x30e0 0x30f0>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				mac0_pins_a: mac0@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x4000 0x4010 0x4020
						0x4030 0x4040 0x4060 0x4070
						0x4080 0x4100>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mac1_pins_a: mac1@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
						0x40e1 0x40b1 0x40c1>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x2000 0x2010 0x2020
						0x2030 0x2040 0x2050 0x2060
						0x2070 0x2080 0x2090 0x20a0>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x2000 0x2010 0x2020
						0x2030 0x2080 0x2090 0x20a0>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_cd_cfg: mmc0-cd-cfg {
					fsl,pinmux-ids = <0x2090>;
					fsl,pull-up = <0>;
				};

				mmc0_sck_cfg: mmc0-sck-cfg {
					fsl,pinmux-ids = <0x20a0>;
					fsl,drive-strength = <2>;
					fsl,pull-up = <0>;
				};

				i2c0_pins_a: i2c0@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x3180 0x3190>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif0_pins_a: saif0@0 {
					reg = <0>;
					fsl,pinmux-ids =
						<0x3140 0x3150 0x3160 0x3170>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif1_pins_a: saif1@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x31a0>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
			};

			digctl@8001c000 {
				reg = <0x8001c000 2000>;
				interrupts = <89>;
				status = "disabled";
			};

			etm@80022000 {
				reg = <0x80022000 2000>;
				status = "disabled";
			};

			dma-apbx@80024000 {
				compatible = "fsl,imx28-dma-apbx";
				reg = <0x80024000 2000>;
			};

			dcp@80028000 {
				reg = <0x80028000 2000>;
				interrupts = <52 53 54>;
				status = "disabled";
			};

			pxp@8002a000 {
				reg = <0x8002a000 2000>;
				interrupts = <39>;
				status = "disabled";
			};

			ocotp@8002c000 {
				reg = <0x8002c000 2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				reg = <0x80030000 2000>;
				interrupts = <38 86>;
				status = "disabled";
			};

			can0: can@80032000 {
				reg = <0x80032000 2000>;
				interrupts = <8>;
				status = "disabled";
			};

			can1: can@80034000 {
				reg = <0x80034000 2000>;
				interrupts = <9>;
				status = "disabled";
			};

			simdbg@8003c000 {
				reg = <0x8003c000 200>;
				status = "disabled";
			};

			simgpmisel@8003c200 {
				reg = <0x8003c200 100>;
				status = "disabled";
			};

			simsspsel@8003c300 {
				reg = <0x8003c300 100>;
				status = "disabled";
			};

			simmemsel@8003c400 {
				reg = <0x8003c400 100>;
				status = "disabled";
			};

			gpiomon@8003c500 {
				reg = <0x8003c500 100>;
				status = "disabled";
			};

			simenet@8003c700 {
				reg = <0x8003c700 100>;
				status = "disabled";
			};

			armjtag@8003c800 {
				reg = <0x8003c800 100>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clkctl@80040000 {
				reg = <0x80040000 2000>;
				status = "disabled";
			};

			saif0: saif@80042000 {
				compatible = "fsl,imx28-saif";
				reg = <0x80042000 2000>;
				interrupts = <59 80>;
				fsl,saif-dma-channel = <4>;
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				compatible = "fsl,imx28-saif";
				reg = <0x80046000 2000>;
				interrupts = <58 81>;
				fsl,saif-dma-channel = <5>;
				status = "disabled";
			};

			lradc@80050000 {
				reg = <0x80050000 2000>;
				status = "disabled";
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				interrupts = <45 66>;
				status = "disabled";
			};

			rtc@80056000 {
				reg = <0x80056000 2000>;
				interrupts = <28 29>;
				status = "disabled";
			};

			i2c0: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x80058000 2000>;
				interrupts = <111 68>;
				status = "disabled";
			};

			i2c1: i2c@8005a000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x8005a000 2000>;
				interrupts = <110 69>;
				status = "disabled";
			};

			pwm@80064000 {
				reg = <0x80064000 2000>;
				status = "disabled";
			};

			timrot@80068000 {
				reg = <0x80068000 2000>;
				status = "disabled";
			};

			auart0: serial@8006a000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006a000 0x2000>;
				interrupts = <112 70 71>;
				status = "disabled";
			};

			auart1: serial@8006c000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <113 72 73>;
				status = "disabled";
			};

			auart2: serial@8006e000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <114 74 75>;
				status = "disabled";
			};

			auart3: serial@80070000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x80070000 0x2000>;
				interrupts = <115 76 77>;
				status = "disabled";
			};

			auart4: serial@80072000 {
				compatible = "fsl,imx28-auart", "fsl,imx23-auart";
				reg = <0x80072000 0x2000>;
				interrupts = <116 78 79>;
				status = "disabled";
			};

			duart: serial@80074000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80074000 0x1000>;
				interrupts = <47>;
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				reg = <0x8007c000 0x2000>;
				status = "disabled";
			};

			usbphy1: usbphy@8007e000 {
				reg = <0x8007e000 0x2000>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usbctrl0: usbctrl@80080000 {
			reg = <0x80080000 0x10000>;
			status = "disabled";
		};

		usbctrl1: usbctrl@80090000 {
			reg = <0x80090000 0x10000>;
			status = "disabled";
		};

		dflpt@800c0000 {
			reg = <0x800c0000 0x10000>;
			status = "disabled";
		};

		mac0: ethernet@800f0000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f0000 0x4000>;
			interrupts = <101>;
			status = "disabled";
		};

		mac1: ethernet@800f4000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f4000 0x4000>;
			interrupts = <102>;
			status = "disabled";
		};

		switch@800f8000 {
			reg = <0x800f8000 0x8000>;
			status = "disabled";
		};

	};
};
Commit	Line	Data
bc3a59c1 DA	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	interrupt-parent = <&icoll>;
	16
ce4c6f9b SG	17	aliases {
	18	gpio0 = &gpio0;
	19	gpio1 = &gpio1;
	20	gpio2 = &gpio2;
	21	gpio3 = &gpio3;
	22	gpio4 = &gpio4;
530f1d41 SG	23	saif0 = &saif0;
530f1d41 SG	24	saif1 = &saif1;
80d969e4 FE	25	serial0 = &auart0;
	26	serial1 = &auart1;
	27	serial2 = &auart2;
	28	serial3 = &auart3;
	29	serial4 = &auart4;
ce4c6f9b SG	30	};
ce4c6f9b SG	31
bc3a59c1 DA	32	cpus {
	33	cpu@0 {
	34	compatible = "arm,arm926ejs";
	35	};
	36	};
	37
	38	apb@80000000 {
	39	compatible = "simple-bus";
	40	#address-cells = <1>;
	41	#size-cells = <1>;
	42	reg = <0x80000000 0x80000>;
	43	ranges;
	44
	45	apbh@80000000 {
	46	compatible = "simple-bus";
	47	#address-cells = <1>;
	48	#size-cells = <1>;
	49	reg = <0x80000000 0x3c900>;
	50	ranges;
	51
	52	icoll: interrupt-controller@80000000 {
	53	compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
	54	interrupt-controller;
	55	#interrupt-cells = <1>;
	56	reg = <0x80000000 0x2000>;
	57	};
	58
	59	hsadc@80002000 {
	60	reg = <0x80002000 2000>;
	61	interrupts = <13 87>;
	62	status = "disabled";
	63	};
	64
	65	dma-apbh@80004000 {
84f3570a	66	compatible = "fsl,imx28-dma-apbh";
bc3a59c1	67	reg = <0x80004000 2000>;
bc3a59c1 DA	68	};
	69
	70	perfmon@80006000 {
	71	reg = <0x80006000 800>;
	72	interrupts = <27>;
	73	status = "disabled";
	74	};
	75
7a8e5149 HS	76	gpmi-nand@8000c000 {
	77	compatible = "fsl,imx28-gpmi-nand";
	78	#address-cells = <1>;
	79	#size-cells = <1>;
	80	reg = <0x8000c000 2000>, <0x8000a000 2000>;
	81	reg-names = "gpmi-nand", "bch";
	82	interrupts = <88>, <41>;
	83	interrupt-names = "gpmi-dma", "bch";
	84	fsl,gpmi-dma-channel = <4>;
bc3a59c1 DA	85	status = "disabled";
	86	};
	87
	88	ssp0: ssp@80010000 {
	89	reg = <0x80010000 2000>;
	90	interrupts = <96 82>;
35d23047	91	fsl,ssp-dma-channel = <0>;
bc3a59c1 DA	92	status = "disabled";
	93	};
	94
	95	ssp1: ssp@80012000 {
	96	reg = <0x80012000 2000>;
	97	interrupts = <97 83>;
35d23047	98	fsl,ssp-dma-channel = <1>;
bc3a59c1 DA	99	status = "disabled";
	100	};
	101
	102	ssp2: ssp@80014000 {
	103	reg = <0x80014000 2000>;
	104	interrupts = <98 84>;
35d23047	105	fsl,ssp-dma-channel = <2>;
bc3a59c1 DA	106	status = "disabled";
	107	};
	108
	109	ssp3: ssp@80016000 {
	110	reg = <0x80016000 2000>;
	111	interrupts = <99 85>;
35d23047	112	fsl,ssp-dma-channel = <3>;
bc3a59c1 DA	113	status = "disabled";
	114	};
	115
	116	pinctrl@80018000 {
	117	#address-cells = <1>;
	118	#size-cells = <0>;
ce4c6f9b	119	compatible = "fsl,imx28-pinctrl", "simple-bus";
bc3a59c1 DA	120	reg = <0x80018000 2000>;
bc3a59c1 DA	121
ce4c6f9b SG	122	gpio0: gpio@0 {
	123	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	124	interrupts = <127>;
	125	gpio-controller;
	126	#gpio-cells = <2>;
	127	interrupt-controller;
	128	#interrupt-cells = <2>;
	129	};
	130
	131	gpio1: gpio@1 {
	132	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	133	interrupts = <126>;
	134	gpio-controller;
	135	#gpio-cells = <2>;
	136	interrupt-controller;
	137	#interrupt-cells = <2>;
	138	};
	139
	140	gpio2: gpio@2 {
	141	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	142	interrupts = <125>;
	143	gpio-controller;
	144	#gpio-cells = <2>;
	145	interrupt-controller;
	146	#interrupt-cells = <2>;
	147	};
	148
	149	gpio3: gpio@3 {
	150	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	151	interrupts = <124>;
	152	gpio-controller;
	153	#gpio-cells = <2>;
	154	interrupt-controller;
	155	#interrupt-cells = <2>;
	156	};
	157
	158	gpio4: gpio@4 {
	159	compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
	160	interrupts = <123>;
	161	gpio-controller;
	162	#gpio-cells = <2>;
	163	interrupt-controller;
	164	#interrupt-cells = <2>;
	165	};
	166
bc3a59c1 DA	167	duart_pins_a: duart@0 {
	168	reg = <0>;
	169	fsl,pinmux-ids = <0x3102 0x3112>;
	170	fsl,drive-strength = <0>;
	171	fsl,voltage = <1>;
	172	fsl,pull-up = <0>;
	173	};
	174
8385e7c1 MR	175	duart_pins_b: duart@1 {
	176	reg = <1>;
	177	fsl,pinmux-ids = <0x3022 0x3032>;
	178	fsl,drive-strength = <0>;
	179	fsl,voltage = <1>;
	180	fsl,pull-up = <0>;
	181	};
	182
7a8e5149 HS	183	gpmi_pins_a: gpmi-nand@0 {
	184	reg = <0>;
	185	fsl,pinmux-ids = <0x0000 0x0010 0x0020
	186	0x0030 0x0040 0x0050 0x0060
	187	0x0070 0x0100 0x0110 0x0140
	188	0x0150 0x0180 0x0190 0x01a0
	189	0x01b0 0x01c0>;
	190	fsl,drive-strength = <0>;
	191	fsl,voltage = <1>;
	192	fsl,pull-up = <0>;
	193	};
	194
	195	gpmi_status_cfg: gpmi-status-cfg {
	196	fsl,pinmux-ids = <0x0180 0x0190 0x01c0>;
	197	fsl,drive-strength = <2>;
	198	};
	199
80d969e4 FE	200	auart0_pins_a: auart0@0 {
	201	reg = <0>;
	202	fsl,pinmux-ids = <0x3000 0x3010 0x3020 0x3030>;
	203	fsl,drive-strength = <0>;
	204	fsl,voltage = <1>;
	205	fsl,pull-up = <0>;
	206	};
	207
	208	auart3_pins_a: auart3@0 {
	209	reg = <0>;
	210	fsl,pinmux-ids = <0x30c0 0x30d0 0x30e0 0x30f0>;
	211	fsl,drive-strength = <0>;
	212	fsl,voltage = <1>;
	213	fsl,pull-up = <0>;
	214	};
	215
bc3a59c1 DA	216	mac0_pins_a: mac0@0 {
	217	reg = <0>;
	218	fsl,pinmux-ids = <0x4000 0x4010 0x4020
	219	0x4030 0x4040 0x4060 0x4070
	220	0x4080 0x4100>;
	221	fsl,drive-strength = <1>;
	222	fsl,voltage = <1>;
	223	fsl,pull-up = <1>;
	224	};
	225
	226	mac1_pins_a: mac1@0 {
	227	reg = <0>;
	228	fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
	229	0x40e1 0x40b1 0x40c1>;
	230	fsl,drive-strength = <1>;
	231	fsl,voltage = <1>;
	232	fsl,pull-up = <1>;
	233	};
35d23047 SG	234
	235	mmc0_8bit_pins_a: mmc0-8bit@0 {
	236	reg = <0>;
	237	fsl,pinmux-ids = <0x2000 0x2010 0x2020
	238	0x2030 0x2040 0x2050 0x2060
	239	0x2070 0x2080 0x2090 0x20a0>;
	240	fsl,drive-strength = <1>;
	241	fsl,voltage = <1>;
	242	fsl,pull-up = <1>;
	243	};
	244
8385e7c1 MR	245	mmc0_4bit_pins_a: mmc0-4bit@0 {
	246	reg = <0>;
	247	fsl,pinmux-ids = <0x2000 0x2010 0x2020
	248	0x2030 0x2080 0x2090 0x20a0>;
	249	fsl,drive-strength = <1>;
	250	fsl,voltage = <1>;
	251	fsl,pull-up = <1>;
	252	};
	253
35d23047 SG	254	mmc0_cd_cfg: mmc0-cd-cfg {
	255	fsl,pinmux-ids = <0x2090>;
	256	fsl,pull-up = <0>;
	257	};
	258
	259	mmc0_sck_cfg: mmc0-sck-cfg {
	260	fsl,pinmux-ids = <0x20a0>;
	261	fsl,drive-strength = <2>;
	262	fsl,pull-up = <0>;
	263	};
2a96e391 SG	264
	265	i2c0_pins_a: i2c0@0 {
	266	reg = <0>;
	267	fsl,pinmux-ids = <0x3180 0x3190>;
	268	fsl,drive-strength = <1>;
	269	fsl,voltage = <1>;
	270	fsl,pull-up = <1>;
	271	};
530f1d41 SG	272
	273	saif0_pins_a: saif0@0 {
	274	reg = <0>;
	275	fsl,pinmux-ids =
	276	<0x3140 0x3150 0x3160 0x3170>;
	277	fsl,drive-strength = <2>;
	278	fsl,voltage = <1>;
	279	fsl,pull-up = <1>;
	280	};
	281
	282	saif1_pins_a: saif1@0 {
	283	reg = <0>;
	284	fsl,pinmux-ids = <0x31a0>;
	285	fsl,drive-strength = <2>;
	286	fsl,voltage = <1>;
	287	fsl,pull-up = <1>;
	288	};
bc3a59c1 DA	289	};
	290
	291	digctl@8001c000 {
	292	reg = <0x8001c000 2000>;
	293	interrupts = <89>;
	294	status = "disabled";
	295	};
	296
	297	etm@80022000 {
	298	reg = <0x80022000 2000>;
	299	status = "disabled";
	300	};
	301
	302	dma-apbx@80024000 {
84f3570a	303	compatible = "fsl,imx28-dma-apbx";
bc3a59c1	304	reg = <0x80024000 2000>;
bc3a59c1 DA	305	};
	306
	307	dcp@80028000 {
	308	reg = <0x80028000 2000>;
	309	interrupts = <52 53 54>;
	310	status = "disabled";
	311	};
	312
	313	pxp@8002a000 {
	314	reg = <0x8002a000 2000>;
	315	interrupts = <39>;
	316	status = "disabled";
	317	};
	318
	319	ocotp@8002c000 {
	320	reg = <0x8002c000 2000>;
	321	status = "disabled";
	322	};
	323
	324	axi-ahb@8002e000 {
	325	reg = <0x8002e000 2000>;
	326	status = "disabled";
	327	};
	328
	329	lcdif@80030000 {
	330	reg = <0x80030000 2000>;
	331	interrupts = <38 86>;
	332	status = "disabled";
	333	};
	334
	335	can0: can@80032000 {
	336	reg = <0x80032000 2000>;
	337	interrupts = <8>;
	338	status = "disabled";
	339	};
	340
	341	can1: can@80034000 {
	342	reg = <0x80034000 2000>;
	343	interrupts = <9>;
	344	status = "disabled";
	345	};
	346
	347	simdbg@8003c000 {
	348	reg = <0x8003c000 200>;
	349	status = "disabled";
	350	};
	351
	352	simgpmisel@8003c200 {
	353	reg = <0x8003c200 100>;
	354	status = "disabled";
	355	};
	356
	357	simsspsel@8003c300 {
	358	reg = <0x8003c300 100>;
	359	status = "disabled";
	360	};
	361
	362	simmemsel@8003c400 {
	363	reg = <0x8003c400 100>;
	364	status = "disabled";
	365	};
	366
	367	gpiomon@8003c500 {
	368	reg = <0x8003c500 100>;
369	status = "disabled";
370	};
371
372	simenet@8003c700 {
373	reg = <0x8003c700 100>;
374	status = "disabled";
375	};
376
377	armjtag@8003c800 {
378	reg = <0x8003c800 100>;
379	status = "disabled";
380	};
381	};
382
383	apbx@80040000 {
384	compatible = "simple-bus";
385	#address-cells = <1>;
386	#size-cells = <1>;
387	reg = <0x80040000 0x40000>;
388	ranges;
389
390	clkctl@80040000 {
391	reg = <0x80040000 2000>;
392	status = "disabled";
393	};
394
395	saif0: saif@80042000 {
530f1d41	396	compatible = "fsl,imx28-saif";
bc3a59c1 DA	397	reg = <0x80042000 2000>;
bc3a59c1 DA	398	interrupts = <59 80>;
530f1d41	399	fsl,saif-dma-channel = <4>;
bc3a59c1 DA	400	status = "disabled";
	401	};
	402
	403	power@80044000 {
	404	reg = <0x80044000 2000>;
	405	status = "disabled";
	406	};
	407
	408	saif1: saif@80046000 {
530f1d41	409	compatible = "fsl,imx28-saif";
bc3a59c1 DA	410	reg = <0x80046000 2000>;
bc3a59c1 DA	411	interrupts = <58 81>;
530f1d41	412	fsl,saif-dma-channel = <5>;
bc3a59c1 DA	413	status = "disabled";
	414	};
	415
	416	lradc@80050000 {
	417	reg = <0x80050000 2000>;
	418	status = "disabled";
	419	};
	420
	421	spdif@80054000 {
	422	reg = <0x80054000 2000>;
	423	interrupts = <45 66>;
	424	status = "disabled";
	425	};
	426
	427	rtc@80056000 {
	428	reg = <0x80056000 2000>;
	429	interrupts = <28 29>;
	430	status = "disabled";
	431	};
	432
	433	i2c0: i2c@80058000 {
2a96e391 SG	434	#address-cells = <1>;
	435	#size-cells = <0>;
	436	compatible = "fsl,imx28-i2c";
bc3a59c1 DA	437	reg = <0x80058000 2000>;
	438	interrupts = <111 68>;
	439	status = "disabled";
	440	};
	441
	442	i2c1: i2c@8005a000 {
2a96e391 SG	443	#address-cells = <1>;
	444	#size-cells = <0>;
	445	compatible = "fsl,imx28-i2c";
bc3a59c1 DA	446	reg = <0x8005a000 2000>;
	447	interrupts = <110 69>;
	448	status = "disabled";
	449	};
	450
	451	pwm@80064000 {
	452	reg = <0x80064000 2000>;
	453	status = "disabled";
	454	};
	455
	456	timrot@80068000 {
	457	reg = <0x80068000 2000>;
	458	status = "disabled";
	459	};
	460
	461	auart0: serial@8006a000 {
80d969e4	462	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	463	reg = <0x8006a000 0x2000>;
	464	interrupts = <112 70 71>;
	465	status = "disabled";
	466	};
	467
	468	auart1: serial@8006c000 {
80d969e4	469	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	470	reg = <0x8006c000 0x2000>;
	471	interrupts = <113 72 73>;
	472	status = "disabled";
	473	};
	474
	475	auart2: serial@8006e000 {
80d969e4	476	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	477	reg = <0x8006e000 0x2000>;
	478	interrupts = <114 74 75>;
	479	status = "disabled";
	480	};
	481
	482	auart3: serial@80070000 {
80d969e4	483	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	484	reg = <0x80070000 0x2000>;
	485	interrupts = <115 76 77>;
	486	status = "disabled";
	487	};
	488
	489	auart4: serial@80072000 {
80d969e4	490	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
bc3a59c1 DA	491	reg = <0x80072000 0x2000>;
	492	interrupts = <116 78 79>;
	493	status = "disabled";
	494	};
	495
	496	duart: serial@80074000 {
	497	compatible = "arm,pl011", "arm,primecell";
	498	reg = <0x80074000 0x1000>;
	499	interrupts = <47>;
	500	status = "disabled";
	501	};
	502
	503	usbphy0: usbphy@8007c000 {
	504	reg = <0x8007c000 0x2000>;
	505	status = "disabled";
	506	};
	507
	508	usbphy1: usbphy@8007e000 {
	509	reg = <0x8007e000 0x2000>;
	510	status = "disabled";
	511	};
	512	};
	513	};
	514
	515	ahb@80080000 {
	516	compatible = "simple-bus";
	517	#address-cells = <1>;
	518	#size-cells = <1>;
	519	reg = <0x80080000 0x80000>;
	520	ranges;
	521
	522	usbctrl0: usbctrl@80080000 {
	523	reg = <0x80080000 0x10000>;
	524	status = "disabled";
	525	};
	526
	527	usbctrl1: usbctrl@80090000 {
	528	reg = <0x80090000 0x10000>;
	529	status = "disabled";
	530	};
	531
	532	dflpt@800c0000 {
	533	reg = <0x800c0000 0x10000>;
	534	status = "disabled";
	535	};
	536
	537	mac0: ethernet@800f0000 {
	538	compatible = "fsl,imx28-fec";
	539	reg = <0x800f0000 0x4000>;
	540	interrupts = <101>;
	541	status = "disabled";
	542	};
	543
	544	mac1: ethernet@800f4000 {
	545	compatible = "fsl,imx28-fec";
	546	reg = <0x800f4000 0x4000>;
	547	interrupts = <102>;
	548	status = "disabled";
	549	};
	550
	551	switch@800f8000 {
	552	reg = <0x800f8000 0x8000>;
	553	status = "disabled";
	554	};
555
556	};
557	};